* [PATCH RESEND v5 3/8] dt-bindings: mfd: Add compatible for the MediaTek MT6359 PMIC [not found] <1611913781-23460-1-git-send-email-hsin-hsiung.wang@mediatek.com> @ 2021-01-29 9:49 ` Hsin-Hsiung Wang 2021-02-05 22:04 ` Rob Herring 2021-01-29 9:49 ` [PATCH RESEND v5 6/8] regulator: mt6359: Add support for MT6359 regulator Hsin-Hsiung Wang ` (4 subsequent siblings) 5 siblings, 1 reply; 11+ messages in thread From: Hsin-Hsiung Wang @ 2021-01-29 9:49 UTC (permalink / raw) To: Lee Jones, Rob Herring, Matthias Brugger, Liam Girdwood, Mark Brown, Alessandro Zummo, Alexandre Belloni, Fei Shao Cc: Eddie Huang, Sean Wang, Hsin-Hsiung Wang, Yuchen Huang, Ran Bi, devicetree, linux-arm-kernel, linux-mediatek, linux-kernel, linux-rtc, srv_heupstream, Project_Global_Chrome_Upstream_Group This adds compatible for the MediaTek MT6359 PMIC. Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> --- changes since v4: - remove unused compatible name. --- Documentation/devicetree/bindings/mfd/mt6397.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/mt6397.txt b/Documentation/devicetree/bindings/mfd/mt6397.txt index 2661775a3825..99a84b69a29f 100644 --- a/Documentation/devicetree/bindings/mfd/mt6397.txt +++ b/Documentation/devicetree/bindings/mfd/mt6397.txt @@ -21,6 +21,7 @@ Required properties: compatible: "mediatek,mt6323" for PMIC MT6323 "mediatek,mt6358" for PMIC MT6358 + "mediatek,mt6359" for PMIC MT6359 "mediatek,mt6397" for PMIC MT6397 Optional subnodes: -- 2.18.0 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH RESEND v5 3/8] dt-bindings: mfd: Add compatible for the MediaTek MT6359 PMIC 2021-01-29 9:49 ` [PATCH RESEND v5 3/8] dt-bindings: mfd: Add compatible for the MediaTek MT6359 PMIC Hsin-Hsiung Wang @ 2021-02-05 22:04 ` Rob Herring 0 siblings, 0 replies; 11+ messages in thread From: Rob Herring @ 2021-02-05 22:04 UTC (permalink / raw) To: Hsin-Hsiung Wang Cc: linux-kernel, Ran Bi, Mark Brown, devicetree, srv_heupstream, Liam Girdwood, Alessandro Zummo, Alexandre Belloni, Fei Shao, Matthias Brugger, Sean Wang, Eddie Huang, linux-mediatek, Lee Jones, linux-rtc, linux-arm-kernel, Rob Herring, Yuchen Huang, Project_Global_Chrome_Upstream_Group On Fri, 29 Jan 2021 17:49:36 +0800, Hsin-Hsiung Wang wrote: > This adds compatible for the MediaTek MT6359 PMIC. > > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > --- > changes since v4: > - remove unused compatible name. > --- > Documentation/devicetree/bindings/mfd/mt6397.txt | 1 + > 1 file changed, 1 insertion(+) > Acked-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH RESEND v5 6/8] regulator: mt6359: Add support for MT6359 regulator [not found] <1611913781-23460-1-git-send-email-hsin-hsiung.wang@mediatek.com> 2021-01-29 9:49 ` [PATCH RESEND v5 3/8] dt-bindings: mfd: Add compatible for the MediaTek MT6359 PMIC Hsin-Hsiung Wang @ 2021-01-29 9:49 ` Hsin-Hsiung Wang 2021-01-29 9:49 ` [PATCH RESEND v5 8/8] arm64: dts: mt6359: add PMIC MT6359 related nodes Hsin-Hsiung Wang ` (3 subsequent siblings) 5 siblings, 0 replies; 11+ messages in thread From: Hsin-Hsiung Wang @ 2021-01-29 9:49 UTC (permalink / raw) To: Lee Jones, Rob Herring, Matthias Brugger, Liam Girdwood, Mark Brown, Alessandro Zummo, Alexandre Belloni, Fei Shao Cc: Eddie Huang, Sean Wang, Hsin-Hsiung Wang, Yuchen Huang, Ran Bi, devicetree, linux-arm-kernel, linux-mediatek, linux-kernel, linux-rtc, srv_heupstream, Project_Global_Chrome_Upstream_Group, Wen Su From: Wen Su <wen.su@mediatek.com> The MT6359 is a regulator found on boards based on MediaTek MT6779 and probably other SoCs. It is a so called pmic and connects as a slave to SoC using SPI, wrapped inside the pmic-wrapper. Signed-off-by: Wen Su <wen.su@mediatek.com> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> --- changes since v4: - add enable time of ldo. - use the device of mfd driver for the regulator_config. - add the regulators_node support. --- drivers/regulator/Kconfig | 9 + drivers/regulator/Makefile | 1 + drivers/regulator/mt6359-regulator.c | 669 +++++++++++++++++++++ include/linux/regulator/mt6359-regulator.h | 58 ++ 4 files changed, 737 insertions(+) create mode 100644 drivers/regulator/mt6359-regulator.c create mode 100644 include/linux/regulator/mt6359-regulator.h diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 53fa84f4d1e1..3de7bb5be8ac 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -750,6 +750,15 @@ config REGULATOR_MT6358 This driver supports the control of different power rails of device through regulator interface. +config REGULATOR_MT6359 + tristate "MediaTek MT6359 PMIC" + depends on MFD_MT6397 + help + Say y here to select this option to enable the power regulator of + MediaTek MT6359 PMIC. + This driver supports the control of different power rails of device + through regulator interface. + config REGULATOR_MT6360 tristate "MT6360 SubPMIC Regulator" depends on MFD_MT6360 diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index 680e539f6579..4f65eaead82d 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -91,6 +91,7 @@ obj-$(CONFIG_REGULATOR_MPQ7920) += mpq7920.o obj-$(CONFIG_REGULATOR_MT6311) += mt6311-regulator.o obj-$(CONFIG_REGULATOR_MT6323) += mt6323-regulator.o obj-$(CONFIG_REGULATOR_MT6358) += mt6358-regulator.o +obj-$(CONFIG_REGULATOR_MT6359) += mt6359-regulator.o obj-$(CONFIG_REGULATOR_MT6360) += mt6360-regulator.o obj-$(CONFIG_REGULATOR_MT6380) += mt6380-regulator.o obj-$(CONFIG_REGULATOR_MT6397) += mt6397-regulator.o diff --git a/drivers/regulator/mt6359-regulator.c b/drivers/regulator/mt6359-regulator.c new file mode 100644 index 000000000000..fabc3f57f334 --- /dev/null +++ b/drivers/regulator/mt6359-regulator.c @@ -0,0 +1,669 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2020 MediaTek Inc. + +#include <linux/platform_device.h> +#include <linux/mfd/mt6359/registers.h> +#include <linux/mfd/mt6397/core.h> +#include <linux/module.h> +#include <linux/of_device.h> +#include <linux/regmap.h> +#include <linux/regulator/driver.h> +#include <linux/regulator/machine.h> +#include <linux/regulator/mt6359-regulator.h> +#include <linux/regulator/of_regulator.h> + +#define MT6359_BUCK_MODE_AUTO 0 +#define MT6359_BUCK_MODE_FORCE_PWM 1 +#define MT6359_BUCK_MODE_NORMAL 0 +#define MT6359_BUCK_MODE_LP 2 + +/* + * MT6359 regulators' information + * + * @desc: standard fields of regulator description. + * @status_reg: for query status of regulators. + * @qi: Mask for query enable signal status of regulators. + * @modeset_reg: for operating AUTO/PWM mode register. + * @modeset_mask: MASK for operating modeset register. + * @modeset_shift: SHIFT for operating modeset register. + */ +struct mt6359_regulator_info { + struct regulator_desc desc; + u32 status_reg; + u32 qi; + u32 modeset_reg; + u32 modeset_mask; + u32 modeset_shift; + u32 lp_mode_reg; + u32 lp_mode_mask; + u32 lp_mode_shift; +}; + +#define MT6359_BUCK(match, _name, min, max, step, min_sel, \ + volt_ranges, _enable_reg, _status_reg, \ + _vsel_reg, _vsel_mask, \ + _lp_mode_reg, _lp_mode_shift, \ + _modeset_reg, _modeset_shift) \ +[MT6359_ID_##_name] = { \ + .desc = { \ + .name = #_name, \ + .of_match = of_match_ptr(match), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &mt6359_volt_range_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6359_ID_##_name, \ + .owner = THIS_MODULE, \ + .uV_step = (step), \ + .linear_min_sel = (min_sel), \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .min_uV = (min), \ + .linear_ranges = volt_ranges, \ + .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ + .vsel_reg = _vsel_reg, \ + .vsel_mask = _vsel_mask, \ + .enable_reg = _enable_reg, \ + .enable_mask = BIT(0), \ + .of_map_mode = mt6359_map_mode, \ + }, \ + .status_reg = _status_reg, \ + .qi = BIT(0), \ + .lp_mode_reg = _lp_mode_reg, \ + .lp_mode_mask = BIT(_lp_mode_shift), \ + .lp_mode_shift = _lp_mode_shift, \ + .modeset_reg = _modeset_reg, \ + .modeset_mask = BIT(_modeset_shift), \ + .modeset_shift = _modeset_shift \ +} + +#define MT6359_LDO_LINEAR(match, _name, min, max, step, min_sel,\ + volt_ranges, _enable_reg, _status_reg, \ + _vsel_reg, _vsel_mask) \ +[MT6359_ID_##_name] = { \ + .desc = { \ + .name = #_name, \ + .of_match = of_match_ptr(match), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &mt6359_volt_range_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6359_ID_##_name, \ + .owner = THIS_MODULE, \ + .uV_step = (step), \ + .linear_min_sel = (min_sel), \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .min_uV = (min), \ + .linear_ranges = volt_ranges, \ + .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ + .vsel_reg = _vsel_reg, \ + .vsel_mask = _vsel_mask, \ + .enable_reg = _enable_reg, \ + .enable_mask = BIT(0), \ + }, \ + .status_reg = _status_reg, \ + .qi = BIT(0), \ +} + +#define MT6359_LDO(match, _name, _volt_table, \ + _enable_reg, _enable_mask, _status_reg, \ + _vsel_reg, _vsel_mask, _en_delay) \ +[MT6359_ID_##_name] = { \ + .desc = { \ + .name = #_name, \ + .of_match = of_match_ptr(match), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &mt6359_volt_table_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6359_ID_##_name, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(_volt_table), \ + .volt_table = _volt_table, \ + .vsel_reg = _vsel_reg, \ + .vsel_mask = _vsel_mask, \ + .enable_reg = _enable_reg, \ + .enable_mask = BIT(_enable_mask), \ + .enable_time = _en_delay, \ + }, \ + .status_reg = _status_reg, \ + .qi = BIT(0), \ +} + +#define MT6359_REG_FIXED(match, _name, _enable_reg, \ + _status_reg, _fixed_volt) \ +[MT6359_ID_##_name] = { \ + .desc = { \ + .name = #_name, \ + .of_match = of_match_ptr(match), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &mt6359_volt_fixed_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6359_ID_##_name, \ + .owner = THIS_MODULE, \ + .n_voltages = 1, \ + .enable_reg = _enable_reg, \ + .enable_mask = BIT(0), \ + .fixed_uV = (_fixed_volt), \ + }, \ + .status_reg = _status_reg, \ + .qi = BIT(0), \ +} + +static const struct linear_range mt_volt_range1[] = { + REGULATOR_LINEAR_RANGE(800000, 0, 0x70, 12500), +}; + +static const struct linear_range mt_volt_range2[] = { + REGULATOR_LINEAR_RANGE(400000, 0, 0x7f, 6250), +}; + +static const struct linear_range mt_volt_range3[] = { + REGULATOR_LINEAR_RANGE(400000, 0, 0x70, 6250), +}; + +static const struct linear_range mt_volt_range4[] = { + REGULATOR_LINEAR_RANGE(800000, 0, 0x40, 12500), +}; + +static const struct linear_range mt_volt_range5[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 0x3F, 50000), +}; + +static const struct linear_range mt_volt_range6[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 0x7f, 6250), +}; + +static const struct linear_range mt_volt_range7[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 0x7f, 6250), +}; + +static const u32 vsim1_voltages[] = { + 0, 0, 0, 1700000, 1800000, 0, 0, 0, 2700000, 0, 0, 3000000, 3100000, +}; + +static const u32 vibr_voltages[] = { + 1200000, 1300000, 1500000, 0, 1800000, 2000000, 0, 0, 2700000, 2800000, + 0, 3000000, 0, 3300000, +}; + +static const u32 vrf12_voltages[] = { + 0, 0, 1100000, 1200000, 1300000, +}; + +static const u32 volt18_voltages[] = { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1700000, 1800000, 1900000, +}; + +static const u32 vcn13_voltages[] = { + 900000, 1000000, 0, 1200000, 1300000, +}; + +static const u32 vcn33_voltages[] = { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 2800000, 0, 0, 0, 3300000, 3400000, 3500000, +}; + +static const u32 vefuse_voltages[] = { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1700000, 1800000, 1900000, 2000000, +}; + +static const u32 vxo22_voltages[] = { + 1800000, 0, 0, 0, 2200000, +}; + +static const u32 vrfck_voltages[] = { + 0, 0, 1500000, 0, 0, 0, 0, 1600000, 0, 0, 0, 0, 1700000, +}; + +static const u32 vio28_voltages[] = { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 2800000, 2900000, 3000000, 3100000, 3300000, +}; + +static const u32 vemc_voltages[] = { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2900000, 3000000, 0, 3300000, +}; + +static const u32 va12_voltages[] = { + 0, 0, 0, 0, 0, 0, 1200000, 1300000, +}; + +static const u32 va09_voltages[] = { + 0, 0, 800000, 900000, 0, 0, 1200000, +}; + +static const u32 vrf18_voltages[] = { + 0, 0, 0, 0, 0, 1700000, 1800000, 1810000, +}; + +static const u32 vbbck_voltages[] = { + 0, 0, 0, 0, 1100000, 0, 0, 0, 1150000, 0, 0, 0, 1200000, +}; + +static const u32 vsim2_voltages[] = { + 0, 0, 0, 1700000, 1800000, 0, 0, 0, 2700000, 0, 0, 3000000, 3100000, +}; + +static inline unsigned int mt6359_map_mode(unsigned int mode) +{ + switch (mode) { + case MT6359_BUCK_MODE_NORMAL: + return REGULATOR_MODE_NORMAL; + case MT6359_BUCK_MODE_FORCE_PWM: + return REGULATOR_MODE_FAST; + case MT6359_BUCK_MODE_LP: + return REGULATOR_MODE_IDLE; + default: + return REGULATOR_MODE_INVALID; + } +} + +static int mt6359_get_status(struct regulator_dev *rdev) +{ + int ret; + u32 regval; + struct mt6359_regulator_info *info = rdev_get_drvdata(rdev); + + ret = regmap_read(rdev->regmap, info->status_reg, ®val); + if (ret != 0) { + dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret); + return ret; + } + + if (regval & info->qi) + return REGULATOR_STATUS_ON; + else + return REGULATOR_STATUS_OFF; +} + +static unsigned int mt6359_regulator_get_mode(struct regulator_dev *rdev) +{ + struct mt6359_regulator_info *info = rdev_get_drvdata(rdev); + int ret, regval; + + ret = regmap_read(rdev->regmap, info->modeset_reg, ®val); + if (ret != 0) { + dev_err(&rdev->dev, + "Failed to get mt6359 buck mode: %d\n", ret); + return ret; + } + + if ((regval & info->modeset_mask) >> info->modeset_shift == + MT6359_BUCK_MODE_FORCE_PWM) + return REGULATOR_MODE_FAST; + + ret = regmap_read(rdev->regmap, info->lp_mode_reg, ®val); + if (ret != 0) { + dev_err(&rdev->dev, + "Failed to get mt6359 buck lp mode: %d\n", ret); + return ret; + } + + if (regval & info->lp_mode_mask) + return REGULATOR_MODE_IDLE; + else + return REGULATOR_MODE_NORMAL; +} + +static int mt6359_regulator_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct mt6359_regulator_info *info = rdev_get_drvdata(rdev); + int ret = 0, val; + int curr_mode; + + curr_mode = mt6359_regulator_get_mode(rdev); + switch (mode) { + case REGULATOR_MODE_FAST: + val = MT6359_BUCK_MODE_FORCE_PWM; + val <<= info->modeset_shift; + ret = regmap_update_bits(rdev->regmap, + info->modeset_reg, + info->modeset_mask, + val); + break; + case REGULATOR_MODE_NORMAL: + if (curr_mode == REGULATOR_MODE_FAST) { + val = MT6359_BUCK_MODE_AUTO; + val <<= info->modeset_shift; + ret = regmap_update_bits(rdev->regmap, + info->modeset_reg, + info->modeset_mask, + val); + } else if (curr_mode == REGULATOR_MODE_IDLE) { + val = MT6359_BUCK_MODE_NORMAL; + val <<= info->lp_mode_shift; + ret = regmap_update_bits(rdev->regmap, + info->lp_mode_reg, + info->lp_mode_mask, + val); + udelay(100); + } + break; + case REGULATOR_MODE_IDLE: + val = MT6359_BUCK_MODE_LP >> 1; + val <<= info->lp_mode_shift; + ret = regmap_update_bits(rdev->regmap, + info->lp_mode_reg, + info->lp_mode_mask, + val); + break; + default: + return -EINVAL; + } + + if (ret != 0) { + dev_err(&rdev->dev, + "Failed to set mt6359 buck mode: %d\n", ret); + } + + return ret; +} + +static const struct regulator_ops mt6359_volt_range_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6359_get_status, + .set_mode = mt6359_regulator_set_mode, + .get_mode = mt6359_regulator_get_mode, +}; + +static const struct regulator_ops mt6359_volt_table_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6359_get_status, +}; + +static const struct regulator_ops mt6359_volt_fixed_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6359_get_status, +}; + +/* The array is indexed by id(MT6359_ID_XXX) */ +static struct mt6359_regulator_info mt6359_regulators[] = { + MT6359_BUCK("buck_vs1", VS1, 800000, 2200000, 12500, 0, + mt_volt_range1, MT6359_RG_BUCK_VS1_EN_ADDR, + MT6359_DA_VS1_EN_ADDR, MT6359_RG_BUCK_VS1_VOSEL_ADDR, + MT6359_RG_BUCK_VS1_VOSEL_MASK << + MT6359_RG_BUCK_VS1_VOSEL_SHIFT, + MT6359_RG_BUCK_VS1_LP_ADDR, MT6359_RG_BUCK_VS1_LP_SHIFT, + MT6359_RG_VS1_FPWM_ADDR, MT6359_RG_VS1_FPWM_SHIFT), + MT6359_BUCK("buck_vgpu11", VGPU11, 400000, 1193750, 6250, 0, + mt_volt_range2, MT6359_RG_BUCK_VGPU11_EN_ADDR, + MT6359_DA_VGPU11_EN_ADDR, MT6359_RG_BUCK_VGPU11_VOSEL_ADDR, + MT6359_RG_BUCK_VGPU11_VOSEL_MASK << + MT6359_RG_BUCK_VGPU11_VOSEL_SHIFT, + MT6359_RG_BUCK_VGPU11_LP_ADDR, + MT6359_RG_BUCK_VGPU11_LP_SHIFT, + MT6359_RG_VGPU11_FCCM_ADDR, MT6359_RG_VGPU11_FCCM_SHIFT), + MT6359_BUCK("buck_vmodem", VMODEM, 400000, 1100000, 6250, 0, + mt_volt_range3, MT6359_RG_BUCK_VMODEM_EN_ADDR, + MT6359_DA_VMODEM_EN_ADDR, MT6359_RG_BUCK_VMODEM_VOSEL_ADDR, + MT6359_RG_BUCK_VMODEM_VOSEL_MASK << + MT6359_RG_BUCK_VMODEM_VOSEL_SHIFT, + MT6359_RG_BUCK_VMODEM_LP_ADDR, + MT6359_RG_BUCK_VMODEM_LP_SHIFT, + MT6359_RG_VMODEM_FCCM_ADDR, MT6359_RG_VMODEM_FCCM_SHIFT), + MT6359_BUCK("buck_vpu", VPU, 400000, 1193750, 6250, 0, + mt_volt_range2, MT6359_RG_BUCK_VPU_EN_ADDR, + MT6359_DA_VPU_EN_ADDR, MT6359_RG_BUCK_VPU_VOSEL_ADDR, + MT6359_RG_BUCK_VPU_VOSEL_MASK << + MT6359_RG_BUCK_VPU_VOSEL_SHIFT, + MT6359_RG_BUCK_VPU_LP_ADDR, MT6359_RG_BUCK_VPU_LP_SHIFT, + MT6359_RG_VPU_FCCM_ADDR, MT6359_RG_VPU_FCCM_SHIFT), + MT6359_BUCK("buck_vcore", VCORE, 400000, 1193750, 6250, 0, + mt_volt_range2, MT6359_RG_BUCK_VCORE_EN_ADDR, + MT6359_DA_VCORE_EN_ADDR, MT6359_RG_BUCK_VCORE_VOSEL_ADDR, + MT6359_RG_BUCK_VCORE_VOSEL_MASK << + MT6359_RG_BUCK_VCORE_VOSEL_SHIFT, + MT6359_RG_BUCK_VCORE_LP_ADDR, MT6359_RG_BUCK_VCORE_LP_SHIFT, + MT6359_RG_VCORE_FCCM_ADDR, MT6359_RG_VCORE_FCCM_SHIFT), + MT6359_BUCK("buck_vs2", VS2, 800000, 1600000, 12500, 0, + mt_volt_range4, MT6359_RG_BUCK_VS2_EN_ADDR, + MT6359_DA_VS2_EN_ADDR, MT6359_RG_BUCK_VS2_VOSEL_ADDR, + MT6359_RG_BUCK_VS2_VOSEL_MASK << + MT6359_RG_BUCK_VS2_VOSEL_SHIFT, + MT6359_RG_BUCK_VS2_LP_ADDR, MT6359_RG_BUCK_VS2_LP_SHIFT, + MT6359_RG_VS2_FPWM_ADDR, MT6359_RG_VS2_FPWM_SHIFT), + MT6359_BUCK("buck_vpa", VPA, 500000, 3650000, 50000, 0, + mt_volt_range5, MT6359_RG_BUCK_VPA_EN_ADDR, + MT6359_DA_VPA_EN_ADDR, MT6359_RG_BUCK_VPA_VOSEL_ADDR, + MT6359_RG_BUCK_VPA_VOSEL_MASK << + MT6359_RG_BUCK_VPA_VOSEL_SHIFT, + MT6359_RG_BUCK_VPA_LP_ADDR, MT6359_RG_BUCK_VPA_LP_SHIFT, + MT6359_RG_VPA_MODESET_ADDR, MT6359_RG_VPA_MODESET_SHIFT), + MT6359_BUCK("buck_vproc2", VPROC2, 400000, 1193750, 6250, 0, + mt_volt_range2, MT6359_RG_BUCK_VPROC2_EN_ADDR, + MT6359_DA_VPROC2_EN_ADDR, MT6359_RG_BUCK_VPROC2_VOSEL_ADDR, + MT6359_RG_BUCK_VPROC2_VOSEL_MASK << + MT6359_RG_BUCK_VPROC2_VOSEL_SHIFT, + MT6359_RG_BUCK_VPROC2_LP_ADDR, + MT6359_RG_BUCK_VPROC2_LP_SHIFT, + MT6359_RG_VPROC2_FCCM_ADDR, MT6359_RG_VPROC2_FCCM_SHIFT), + MT6359_BUCK("buck_vproc1", VPROC1, 400000, 1193750, 6250, 0, + mt_volt_range2, MT6359_RG_BUCK_VPROC1_EN_ADDR, + MT6359_DA_VPROC1_EN_ADDR, MT6359_RG_BUCK_VPROC1_VOSEL_ADDR, + MT6359_RG_BUCK_VPROC1_VOSEL_MASK << + MT6359_RG_BUCK_VPROC1_VOSEL_SHIFT, + MT6359_RG_BUCK_VPROC1_LP_ADDR, + MT6359_RG_BUCK_VPROC1_LP_SHIFT, + MT6359_RG_VPROC1_FCCM_ADDR, MT6359_RG_VPROC1_FCCM_SHIFT), + MT6359_BUCK("buck_vcore_sshub", VCORE_SSHUB, 400000, 1193750, 6250, 0, + mt_volt_range2, MT6359_RG_BUCK_VCORE_SSHUB_EN_ADDR, + MT6359_DA_VCORE_EN_ADDR, + MT6359_RG_BUCK_VCORE_SSHUB_VOSEL_ADDR, + MT6359_RG_BUCK_VCORE_SSHUB_VOSEL_MASK << + MT6359_RG_BUCK_VCORE_SSHUB_VOSEL_SHIFT, + MT6359_RG_BUCK_VCORE_LP_ADDR, MT6359_RG_BUCK_VCORE_LP_SHIFT, + MT6359_RG_VCORE_FCCM_ADDR, MT6359_RG_VCORE_FCCM_SHIFT), + MT6359_REG_FIXED("ldo_vaud18", VAUD18, MT6359_RG_LDO_VAUD18_EN_ADDR, + MT6359_DA_VAUD18_B_EN_ADDR, 1800000), + MT6359_LDO("ldo_vsim1", VSIM1, vsim1_voltages, + MT6359_RG_LDO_VSIM1_EN_ADDR, MT6359_RG_LDO_VSIM1_EN_SHIFT, + MT6359_DA_VSIM1_B_EN_ADDR, MT6359_RG_VSIM1_VOSEL_ADDR, + MT6359_RG_VSIM1_VOSEL_MASK << MT6359_RG_VSIM1_VOSEL_SHIFT, + 480), + MT6359_LDO("ldo_vibr", VIBR, vibr_voltages, + MT6359_RG_LDO_VIBR_EN_ADDR, MT6359_RG_LDO_VIBR_EN_SHIFT, + MT6359_DA_VIBR_B_EN_ADDR, MT6359_RG_VIBR_VOSEL_ADDR, + MT6359_RG_VIBR_VOSEL_MASK << MT6359_RG_VIBR_VOSEL_SHIFT, + 240), + MT6359_LDO("ldo_vrf12", VRF12, vrf12_voltages, + MT6359_RG_LDO_VRF12_EN_ADDR, MT6359_RG_LDO_VRF12_EN_SHIFT, + MT6359_DA_VRF12_B_EN_ADDR, MT6359_RG_VRF12_VOSEL_ADDR, + MT6359_RG_VRF12_VOSEL_MASK << MT6359_RG_VRF12_VOSEL_SHIFT, + 120), + MT6359_REG_FIXED("ldo_vusb", VUSB, MT6359_RG_LDO_VUSB_EN_0_ADDR, + MT6359_DA_VUSB_B_EN_ADDR, 3000000), + MT6359_LDO_LINEAR("ldo_vsram_proc2", VSRAM_PROC2, 500000, 1293750, 6250, + 0, mt_volt_range6, MT6359_RG_LDO_VSRAM_PROC2_EN_ADDR, + MT6359_DA_VSRAM_PROC2_B_EN_ADDR, + MT6359_RG_LDO_VSRAM_PROC2_VOSEL_ADDR, + MT6359_RG_LDO_VSRAM_PROC2_VOSEL_MASK << + MT6359_RG_LDO_VSRAM_PROC2_VOSEL_SHIFT), + MT6359_LDO("ldo_vio18", VIO18, volt18_voltages, + MT6359_RG_LDO_VIO18_EN_ADDR, MT6359_RG_LDO_VIO18_EN_SHIFT, + MT6359_DA_VIO18_B_EN_ADDR, MT6359_RG_VIO18_VOSEL_ADDR, + MT6359_RG_VIO18_VOSEL_MASK << MT6359_RG_VIO18_VOSEL_SHIFT, + 960), + MT6359_LDO("ldo_vcamio", VCAMIO, volt18_voltages, + MT6359_RG_LDO_VCAMIO_EN_ADDR, MT6359_RG_LDO_VCAMIO_EN_SHIFT, + MT6359_DA_VCAMIO_B_EN_ADDR, MT6359_RG_VCAMIO_VOSEL_ADDR, + MT6359_RG_VCAMIO_VOSEL_MASK << MT6359_RG_VCAMIO_VOSEL_SHIFT, + 1290), + MT6359_REG_FIXED("ldo_vcn18", VCN18, MT6359_RG_LDO_VCN18_EN_ADDR, + MT6359_DA_VCN18_B_EN_ADDR, 1800000), + MT6359_REG_FIXED("ldo_vfe28", VFE28, MT6359_RG_LDO_VFE28_EN_ADDR, + MT6359_DA_VFE28_B_EN_ADDR, 2800000), + MT6359_LDO("ldo_vcn13", VCN13, vcn13_voltages, + MT6359_RG_LDO_VCN13_EN_ADDR, MT6359_RG_LDO_VCN13_EN_SHIFT, + MT6359_DA_VCN13_B_EN_ADDR, MT6359_RG_VCN13_VOSEL_ADDR, + MT6359_RG_VCN13_VOSEL_MASK << MT6359_RG_VCN13_VOSEL_SHIFT, + 240), + MT6359_LDO("ldo_vcn33_1_bt", VCN33_1_BT, vcn33_voltages, + MT6359_RG_LDO_VCN33_1_EN_0_ADDR, + MT6359_RG_LDO_VCN33_1_EN_0_SHIFT, + MT6359_DA_VCN33_1_B_EN_ADDR, MT6359_RG_VCN33_1_VOSEL_ADDR, + MT6359_RG_VCN33_1_VOSEL_MASK << + MT6359_RG_VCN33_1_VOSEL_SHIFT, 240), + MT6359_LDO("ldo_vcn33_1_wifi", VCN33_1_WIFI, vcn33_voltages, + MT6359_RG_LDO_VCN33_1_EN_1_ADDR, + MT6359_RG_LDO_VCN33_1_EN_1_SHIFT, + MT6359_DA_VCN33_1_B_EN_ADDR, MT6359_RG_VCN33_1_VOSEL_ADDR, + MT6359_RG_VCN33_1_VOSEL_MASK << + MT6359_RG_VCN33_1_VOSEL_SHIFT, 240), + MT6359_REG_FIXED("ldo_vaux18", VAUX18, MT6359_RG_LDO_VAUX18_EN_ADDR, + MT6359_DA_VAUX18_B_EN_ADDR, 1800000), + MT6359_LDO_LINEAR("ldo_vsram_others", VSRAM_OTHERS, 500000, 1293750, + 6250, 0, mt_volt_range6, + MT6359_RG_LDO_VSRAM_OTHERS_EN_ADDR, + MT6359_DA_VSRAM_OTHERS_B_EN_ADDR, + MT6359_RG_LDO_VSRAM_OTHERS_VOSEL_ADDR, + MT6359_RG_LDO_VSRAM_OTHERS_VOSEL_MASK << + MT6359_RG_LDO_VSRAM_OTHERS_VOSEL_SHIFT), + MT6359_LDO("ldo_vefuse", VEFUSE, vefuse_voltages, + MT6359_RG_LDO_VEFUSE_EN_ADDR, MT6359_RG_LDO_VEFUSE_EN_SHIFT, + MT6359_DA_VEFUSE_B_EN_ADDR, MT6359_RG_VEFUSE_VOSEL_ADDR, + MT6359_RG_VEFUSE_VOSEL_MASK << MT6359_RG_VEFUSE_VOSEL_SHIFT, + 240), + MT6359_LDO("ldo_vxo22", VXO22, vxo22_voltages, + MT6359_RG_LDO_VXO22_EN_ADDR, MT6359_RG_LDO_VXO22_EN_SHIFT, + MT6359_DA_VXO22_B_EN_ADDR, MT6359_RG_VXO22_VOSEL_ADDR, + MT6359_RG_VXO22_VOSEL_MASK << MT6359_RG_VXO22_VOSEL_SHIFT, + 120), + MT6359_LDO("ldo_vrfck", VRFCK, vrfck_voltages, + MT6359_RG_LDO_VRFCK_EN_ADDR, MT6359_RG_LDO_VRFCK_EN_SHIFT, + MT6359_DA_VRFCK_B_EN_ADDR, MT6359_RG_VRFCK_VOSEL_ADDR, + MT6359_RG_VRFCK_VOSEL_MASK << MT6359_RG_VRFCK_VOSEL_SHIFT, + 480), + MT6359_REG_FIXED("ldo_vbif28", VBIF28, MT6359_RG_LDO_VBIF28_EN_ADDR, + MT6359_DA_VBIF28_B_EN_ADDR, 2800000), + MT6359_LDO("ldo_vio28", VIO28, vio28_voltages, + MT6359_RG_LDO_VIO28_EN_ADDR, MT6359_RG_LDO_VIO28_EN_SHIFT, + MT6359_DA_VIO28_B_EN_ADDR, MT6359_RG_VIO28_VOSEL_ADDR, + MT6359_RG_VIO28_VOSEL_MASK << MT6359_RG_VIO28_VOSEL_SHIFT, + 240), + MT6359_LDO("ldo_vemc", VEMC, vemc_voltages, + MT6359_RG_LDO_VEMC_EN_ADDR, MT6359_RG_LDO_VEMC_EN_SHIFT, + MT6359_DA_VEMC_B_EN_ADDR, MT6359_RG_VEMC_VOSEL_ADDR, + MT6359_RG_VEMC_VOSEL_MASK << MT6359_RG_VEMC_VOSEL_SHIFT, + 240), + MT6359_LDO("ldo_vcn33_2_bt", VCN33_2_BT, vcn33_voltages, + MT6359_RG_LDO_VCN33_2_EN_0_ADDR, + MT6359_RG_LDO_VCN33_2_EN_0_SHIFT, + MT6359_DA_VCN33_2_B_EN_ADDR, MT6359_RG_VCN33_2_VOSEL_ADDR, + MT6359_RG_VCN33_2_VOSEL_MASK << + MT6359_RG_VCN33_2_VOSEL_SHIFT, 240), + MT6359_LDO("ldo_vcn33_2_wifi", VCN33_2_WIFI, vcn33_voltages, + MT6359_RG_LDO_VCN33_2_EN_1_ADDR, + MT6359_RG_LDO_VCN33_2_EN_1_SHIFT, + MT6359_DA_VCN33_2_B_EN_ADDR, MT6359_RG_VCN33_2_VOSEL_ADDR, + MT6359_RG_VCN33_2_VOSEL_MASK << + MT6359_RG_VCN33_2_VOSEL_SHIFT, 240), + MT6359_LDO("ldo_va12", VA12, va12_voltages, + MT6359_RG_LDO_VA12_EN_ADDR, MT6359_RG_LDO_VA12_EN_SHIFT, + MT6359_DA_VA12_B_EN_ADDR, MT6359_RG_VA12_VOSEL_ADDR, + MT6359_RG_VA12_VOSEL_MASK << MT6359_RG_VA12_VOSEL_SHIFT, + 240), + MT6359_LDO("ldo_va09", VA09, va09_voltages, + MT6359_RG_LDO_VA09_EN_ADDR, MT6359_RG_LDO_VA09_EN_SHIFT, + MT6359_DA_VA09_B_EN_ADDR, MT6359_RG_VA09_VOSEL_ADDR, + MT6359_RG_VA09_VOSEL_MASK << MT6359_RG_VA09_VOSEL_SHIFT, + 240), + MT6359_LDO("ldo_vrf18", VRF18, vrf18_voltages, + MT6359_RG_LDO_VRF18_EN_ADDR, MT6359_RG_LDO_VRF18_EN_SHIFT, + MT6359_DA_VRF18_B_EN_ADDR, MT6359_RG_VRF18_VOSEL_ADDR, + MT6359_RG_VRF18_VOSEL_MASK << MT6359_RG_VRF18_VOSEL_SHIFT, + 120), + MT6359_LDO_LINEAR("ldo_vsram_md", VSRAM_MD, 500000, 1100000, 6250, + 0, mt_volt_range7, MT6359_RG_LDO_VSRAM_MD_EN_ADDR, + MT6359_DA_VSRAM_MD_B_EN_ADDR, + MT6359_RG_LDO_VSRAM_MD_VOSEL_ADDR, + MT6359_RG_LDO_VSRAM_MD_VOSEL_MASK << + MT6359_RG_LDO_VSRAM_MD_VOSEL_SHIFT), + MT6359_LDO("ldo_vufs", VUFS, volt18_voltages, + MT6359_RG_LDO_VUFS_EN_ADDR, MT6359_RG_LDO_VUFS_EN_SHIFT, + MT6359_DA_VUFS_B_EN_ADDR, MT6359_RG_VUFS_VOSEL_ADDR, + MT6359_RG_VUFS_VOSEL_MASK << MT6359_RG_VUFS_VOSEL_SHIFT, + 1920), + MT6359_LDO("ldo_vm18", VM18, volt18_voltages, + MT6359_RG_LDO_VM18_EN_ADDR, MT6359_RG_LDO_VM18_EN_SHIFT, + MT6359_DA_VM18_B_EN_ADDR, MT6359_RG_VM18_VOSEL_ADDR, + MT6359_RG_VM18_VOSEL_MASK << MT6359_RG_VM18_VOSEL_SHIFT, + 1920), + MT6359_LDO("ldo_vbbck", VBBCK, vbbck_voltages, + MT6359_RG_LDO_VBBCK_EN_ADDR, MT6359_RG_LDO_VBBCK_EN_SHIFT, + MT6359_DA_VBBCK_B_EN_ADDR, MT6359_RG_VBBCK_VOSEL_ADDR, + MT6359_RG_VBBCK_VOSEL_MASK << MT6359_RG_VBBCK_VOSEL_SHIFT, + 240), + MT6359_LDO_LINEAR("ldo_vsram_proc1", VSRAM_PROC1, 500000, 1293750, 6250, + 0, mt_volt_range6, MT6359_RG_LDO_VSRAM_PROC1_EN_ADDR, + MT6359_DA_VSRAM_PROC1_B_EN_ADDR, + MT6359_RG_LDO_VSRAM_PROC1_VOSEL_ADDR, + MT6359_RG_LDO_VSRAM_PROC1_VOSEL_MASK << + MT6359_RG_LDO_VSRAM_PROC1_VOSEL_SHIFT), + MT6359_LDO("ldo_vsim2", VSIM2, vsim2_voltages, + MT6359_RG_LDO_VSIM2_EN_ADDR, MT6359_RG_LDO_VSIM2_EN_SHIFT, + MT6359_DA_VSIM2_B_EN_ADDR, MT6359_RG_VSIM2_VOSEL_ADDR, + MT6359_RG_VSIM2_VOSEL_MASK << MT6359_RG_VSIM2_VOSEL_SHIFT, + 480), + MT6359_LDO_LINEAR("ldo_vsram_others_sshub", VSRAM_OTHERS_SSHUB, + 500000, 1293750, 6250, 0, mt_volt_range6, + MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_EN_ADDR, + MT6359_DA_VSRAM_OTHERS_B_EN_ADDR, + MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_ADDR, + MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_MASK << + MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_SHIFT), +}; + +static int mt6359_regulator_probe(struct platform_device *pdev) +{ + struct mt6397_chip *mt6397 = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = {}; + struct regulator_dev *rdev; + int i; + + config.dev = mt6397->dev; + config.regmap = mt6397->regmap; + for (i = 0; i < MT6359_MAX_REGULATOR; i++) { + config.driver_data = &mt6359_regulators[i]; + rdev = devm_regulator_register(&pdev->dev, &mt6359_regulators[i].desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s\n", + mt6359_regulators[i].desc.name); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct platform_device_id mt6359_platform_ids[] = { + {"mt6359-regulator", 0}, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(platform, mt6359_platform_ids); + +static struct platform_driver mt6359_regulator_driver = { + .driver = { + .name = "mt6359-regulator", + }, + .probe = mt6359_regulator_probe, + .id_table = mt6359_platform_ids, +}; + +module_platform_driver(mt6359_regulator_driver); + +MODULE_AUTHOR("Wen Su <wen.su@mediatek.com>"); +MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6359 PMIC"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/regulator/mt6359-regulator.h b/include/linux/regulator/mt6359-regulator.h new file mode 100644 index 000000000000..0abe378e13d5 --- /dev/null +++ b/include/linux/regulator/mt6359-regulator.h @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2020 MediaTek Inc. + */ + +#ifndef __LINUX_REGULATOR_MT6359_H +#define __LINUX_REGULATOR_MT6359_H + +enum { + MT6359_ID_VS1 = 0, + MT6359_ID_VGPU11, + MT6359_ID_VMODEM, + MT6359_ID_VPU, + MT6359_ID_VCORE, + MT6359_ID_VS2, + MT6359_ID_VPA, + MT6359_ID_VPROC2, + MT6359_ID_VPROC1, + MT6359_ID_VCORE_SSHUB, + MT6359_ID_VAUD18 = 10, + MT6359_ID_VSIM1, + MT6359_ID_VIBR, + MT6359_ID_VRF12, + MT6359_ID_VUSB, + MT6359_ID_VSRAM_PROC2, + MT6359_ID_VIO18, + MT6359_ID_VCAMIO, + MT6359_ID_VCN18, + MT6359_ID_VFE28, + MT6359_ID_VCN13, + MT6359_ID_VCN33_1_BT, + MT6359_ID_VCN33_1_WIFI, + MT6359_ID_VAUX18, + MT6359_ID_VSRAM_OTHERS, + MT6359_ID_VEFUSE, + MT6359_ID_VXO22, + MT6359_ID_VRFCK, + MT6359_ID_VBIF28, + MT6359_ID_VIO28, + MT6359_ID_VEMC, + MT6359_ID_VCN33_2_BT, + MT6359_ID_VCN33_2_WIFI, + MT6359_ID_VA12, + MT6359_ID_VA09, + MT6359_ID_VRF18, + MT6359_ID_VSRAM_MD, + MT6359_ID_VUFS, + MT6359_ID_VM18, + MT6359_ID_VBBCK, + MT6359_ID_VSRAM_PROC1, + MT6359_ID_VSIM2, + MT6359_ID_VSRAM_OTHERS_SSHUB, + MT6359_ID_RG_MAX, +}; + +#define MT6359_MAX_REGULATOR MT6359_ID_RG_MAX + +#endif /* __LINUX_REGULATOR_MT6359_H */ -- 2.18.0 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH RESEND v5 8/8] arm64: dts: mt6359: add PMIC MT6359 related nodes [not found] <1611913781-23460-1-git-send-email-hsin-hsiung.wang@mediatek.com> 2021-01-29 9:49 ` [PATCH RESEND v5 3/8] dt-bindings: mfd: Add compatible for the MediaTek MT6359 PMIC Hsin-Hsiung Wang 2021-01-29 9:49 ` [PATCH RESEND v5 6/8] regulator: mt6359: Add support for MT6359 regulator Hsin-Hsiung Wang @ 2021-01-29 9:49 ` Hsin-Hsiung Wang [not found] ` <1cbf58f1-376c-fa93-98a2-53a41fa24273@gmail.com> [not found] ` <1611913781-23460-5-git-send-email-hsin-hsiung.wang@mediatek.com> ` (2 subsequent siblings) 5 siblings, 1 reply; 11+ messages in thread From: Hsin-Hsiung Wang @ 2021-01-29 9:49 UTC (permalink / raw) To: Lee Jones, Rob Herring, Matthias Brugger, Liam Girdwood, Mark Brown, Alessandro Zummo, Alexandre Belloni, Fei Shao Cc: Eddie Huang, Sean Wang, Hsin-Hsiung Wang, Yuchen Huang, Ran Bi, devicetree, linux-arm-kernel, linux-mediatek, linux-kernel, linux-rtc, srv_heupstream, Project_Global_Chrome_Upstream_Group, Wen Su From: Wen Su <wen.su@mediatek.com> add PMIC MT6359 related nodes which is for MT6779 platform Signed-off-by: Wen Su <wen.su@mediatek.com> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> --- changes since v4: - add pmic MT6359 support in the MT8192 evb dts. --- arch/arm64/boot/dts/mediatek/mt6359.dtsi | 298 ++++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt8192-evb.dts | 1 + 2 files changed, 299 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt6359.dtsi diff --git a/arch/arm64/boot/dts/mediatek/mt6359.dtsi b/arch/arm64/boot/dts/mediatek/mt6359.dtsi new file mode 100644 index 000000000000..4bd85e33a4c9 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt6359.dtsi @@ -0,0 +1,298 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2020 MediaTek Inc. + */ + +&pwrap { + pmic: pmic { + compatible = "mediatek,mt6359"; + interrupt-controller; + #interrupt-cells = <2>; + + mt6359codec: mt6359codec { + }; + + mt6359regulator: regulators { + mt6359_vs1_buck_reg: buck_vs1 { + regulator-name = "vs1"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <2200000>; + regulator-enable-ramp-delay = <0>; + regulator-always-on; + }; + mt6359_vgpu11_buck_reg: buck_vgpu11 { + regulator-name = "vgpu11"; + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1193750>; + regulator-ramp-delay = <5000>; + regulator-enable-ramp-delay = <200>; + regulator-allowed-modes = <0 1 2>; + }; + mt6359_vmodem_buck_reg: buck_vmodem { + regulator-name = "vmodem"; + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1100000>; + regulator-ramp-delay = <10760>; + regulator-enable-ramp-delay = <200>; + }; + mt6359_vpu_buck_reg: buck_vpu { + regulator-name = "vpu"; + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1193750>; + regulator-ramp-delay = <5000>; + regulator-enable-ramp-delay = <200>; + regulator-allowed-modes = <0 1 2>; + }; + mt6359_vcore_buck_reg: buck_vcore { + regulator-name = "vcore"; + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1300000>; + regulator-ramp-delay = <5000>; + regulator-enable-ramp-delay = <200>; + regulator-allowed-modes = <0 1 2>; + }; + mt6359_vs2_buck_reg: buck_vs2 { + regulator-name = "vs2"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1600000>; + regulator-enable-ramp-delay = <0>; + regulator-always-on; + }; + mt6359_vpa_buck_reg: buck_vpa { + regulator-name = "vpa"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3650000>; + regulator-enable-ramp-delay = <300>; + }; + mt6359_vproc2_buck_reg: buck_vproc2 { + regulator-name = "vproc2"; + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1193750>; + regulator-ramp-delay = <7500>; + regulator-enable-ramp-delay = <200>; + regulator-allowed-modes = <0 1 2>; + }; + mt6359_vproc1_buck_reg: buck_vproc1 { + regulator-name = "vproc1"; + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1193750>; + regulator-ramp-delay = <7500>; + regulator-enable-ramp-delay = <200>; + regulator-allowed-modes = <0 1 2>; + }; + mt6359_vcore_sshub_buck_reg: buck_vcore_sshub { + regulator-name = "vcore_sshub"; + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1193750>; + }; + mt6359_vgpu11_sshub_buck_reg: buck_vgpu11_sshub { + regulator-name = "vgpu11_sshub"; + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1193750>; + }; + mt6359_vaud18_ldo_reg: ldo_vaud18 { + regulator-name = "vaud18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <240>; + }; + mt6359_vsim1_ldo_reg: ldo_vsim1 { + regulator-name = "vsim1"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3100000>; + }; + mt6359_vibr_ldo_reg: ldo_vibr { + regulator-name = "vibr"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + }; + mt6359_vrf12_ldo_reg: ldo_vrf12 { + regulator-name = "vrf12"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + }; + mt6359_vusb_ldo_reg: ldo_vusb { + regulator-name = "vusb"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-enable-ramp-delay = <960>; + regulator-always-on; + }; + mt6359_vsram_proc2_ldo_reg: ldo_vsram_proc2 { + regulator-name = "vsram_proc2"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1293750>; + regulator-ramp-delay = <7500>; + regulator-enable-ramp-delay = <240>; + regulator-always-on; + }; + mt6359_vio18_ldo_reg: ldo_vio18 { + regulator-name = "vio18"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1900000>; + regulator-enable-ramp-delay = <960>; + regulator-always-on; + }; + mt6359_vcamio_ldo_reg: ldo_vcamio { + regulator-name = "vcamio"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1900000>; + }; + mt6359_vcn18_ldo_reg: ldo_vcn18 { + regulator-name = "vcn18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <240>; + }; + mt6359_vfe28_ldo_reg: ldo_vfe28 { + regulator-name = "vfe28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <120>; + }; + mt6359_vcn13_ldo_reg: ldo_vcn13 { + regulator-name = "vcn13"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1300000>; + }; + mt6359_vcn33_1_bt_ldo_reg: ldo_vcn33_1_bt { + regulator-name = "vcn33_1_bt"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3500000>; + }; + mt6359_vcn33_1_wifi_ldo_reg: ldo_vcn33_1_wifi { + regulator-name = "vcn33_1_wifi"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3500000>; + }; + mt6359_vaux18_ldo_reg: ldo_vaux18 { + regulator-name = "vaux18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <240>; + regulator-always-on; + }; + mt6359_vsram_others_ldo_reg: ldo_vsram_others { + regulator-name = "vsram_others"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1293750>; + regulator-ramp-delay = <5000>; + regulator-enable-ramp-delay = <240>; + }; + mt6359_vefuse_ldo_reg: ldo_vefuse { + regulator-name = "vefuse"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <2000000>; + }; + mt6359_vxo22_ldo_reg: ldo_vxo22 { + regulator-name = "vxo22"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2200000>; + regulator-always-on; + }; + mt6359_vrfck_ldo_reg: ldo_vrfck { + regulator-name = "vrfck"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1700000>; + }; + mt6359_vrfck_1_ldo_reg: ldo_vrfck_1 { + regulator-name = "vrfck"; + regulator-min-microvolt = <1240000>; + regulator-max-microvolt = <1600000>; + }; + mt6359_vbif28_ldo_reg: ldo_vbif28 { + regulator-name = "vbif28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <240>; + }; + mt6359_vio28_ldo_reg: ldo_vio28 { + regulator-name = "vio28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + mt6359_vemc_ldo_reg: ldo_vemc { + regulator-name = "vemc"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <3300000>; + }; + mt6359_vemc_1_ldo_reg: ldo_vemc_1 { + regulator-name = "vemc"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <3300000>; + }; + mt6359_vcn33_2_bt_ldo_reg: ldo_vcn33_2_bt { + regulator-name = "vcn33_2_bt"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3500000>; + }; + mt6359_vcn33_2_wifi_ldo_reg: ldo_vcn33_2_wifi { + regulator-name = "vcn33_2_wifi"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3500000>; + }; + mt6359_va12_ldo_reg: ldo_va12 { + regulator-name = "va12"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + }; + mt6359_va09_ldo_reg: ldo_va09 { + regulator-name = "va09"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1200000>; + }; + mt6359_vrf18_ldo_reg: ldo_vrf18 { + regulator-name = "vrf18"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1810000>; + }; + mt6359_vsram_md_ldo_reg: ldo_vsram_md { + regulator-name = "vsram_md"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1293750>; + regulator-ramp-delay = <10760>; + regulator-enable-ramp-delay = <240>; + }; + mt6359_vufs_ldo_reg: ldo_vufs { + regulator-name = "vufs"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1900000>; + }; + mt6359_vm18_ldo_reg: ldo_vm18 { + regulator-name = "vm18"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1900000>; + regulator-always-on; + }; + mt6359_vbbck_ldo_reg: ldo_vbbck { + regulator-name = "vbbck"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1200000>; + }; + mt6359_vsram_proc1_ldo_reg: ldo_vsram_proc1 { + regulator-name = "vsram_proc1"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1293750>; + regulator-ramp-delay = <7500>; + regulator-enable-ramp-delay = <240>; + regulator-always-on; + }; + mt6359_vsim2_ldo_reg: ldo_vsim2 { + regulator-name = "vsim2"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3100000>; + }; + mt6359_vsram_others_sshub_ldo: ldo_vsram_others_sshub { + regulator-name = "vsram_others_sshub"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1293750>; + }; + }; + + mt6359rtc: mt6359rtc { + compatible = "mediatek,mt6358-rtc"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8192-evb.dts b/arch/arm64/boot/dts/mediatek/mt8192-evb.dts index 0205837fa698..808be492e970 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8192-evb.dts @@ -5,6 +5,7 @@ */ /dts-v1/; #include "mt8192.dtsi" +#include "mt6359.dtsi" / { model = "MediaTek MT8192 evaluation board"; -- 2.18.0 ^ permalink raw reply related [flat|nested] 11+ messages in thread
[parent not found: <1cbf58f1-376c-fa93-98a2-53a41fa24273@gmail.com>]
* Re: [PATCH RESEND v5 8/8] arm64: dts: mt6359: add PMIC MT6359 related nodes [not found] ` <1cbf58f1-376c-fa93-98a2-53a41fa24273@gmail.com> @ 2021-02-02 3:51 ` Tzung-Bi Shih 2021-02-07 18:48 ` Matthias Brugger 0 siblings, 1 reply; 11+ messages in thread From: Tzung-Bi Shih @ 2021-02-02 3:51 UTC (permalink / raw) To: Matthias Brugger Cc: Hsin-Hsiung Wang, Lee Jones, Rob Herring, Liam Girdwood, Mark Brown, Alessandro Zummo, Alexandre Belloni, Fei Shao, Eddie Huang, Sean Wang, Yuchen Huang, Ran Bi, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, moderated list:ARM/Mediatek SoC support, moderated list:ARM/Mediatek SoC support, Linux Kernel Mailing List, linux-rtc, srv_heupstream, Project_Global_Chrome_Upstream_Group, Wen Su, Jiaxin Yu On Sun, Jan 31, 2021 at 7:06 PM Matthias Brugger <matthias.bgg@gmail.com> wrote: > On 29/01/2021 10:49, Hsin-Hsiung Wang wrote: > > + mt6359codec: mt6359codec { > > + }; > > I understand that the dmic-mode and mic-type-X depends on the actual board on > which it is used. In that case I think we should add mt6359codec node in the dts > instead of dtsi file. I'd advise to set these properties as well as otherwise we > get a (slightly misleading) warning in the driver. I feel it is better to include the node in dtsi to represent the whole MT6359 PMIC. We could either: - Set default values of these properties in the dtsi to avoid the warning message. - Or https://patchwork.kernel.org/project/alsa-devel/patch/20210202033557.1621029-1-tzungbi@google.com/ ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH RESEND v5 8/8] arm64: dts: mt6359: add PMIC MT6359 related nodes 2021-02-02 3:51 ` Tzung-Bi Shih @ 2021-02-07 18:48 ` Matthias Brugger 0 siblings, 0 replies; 11+ messages in thread From: Matthias Brugger @ 2021-02-07 18:48 UTC (permalink / raw) To: Tzung-Bi Shih Cc: Hsin-Hsiung Wang, Lee Jones, Rob Herring, Liam Girdwood, Mark Brown, Alessandro Zummo, Alexandre Belloni, Fei Shao, Eddie Huang, Sean Wang, Yuchen Huang, Ran Bi, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, moderated list:ARM/Mediatek SoC support, moderated list:ARM/Mediatek SoC support, Linux Kernel Mailing List, linux-rtc, srv_heupstream, Project_Global_Chrome_Upstream_Group, Wen Su, Jiaxin Yu On 02/02/2021 04:51, Tzung-Bi Shih wrote: > On Sun, Jan 31, 2021 at 7:06 PM Matthias Brugger <matthias.bgg@gmail.com> wrote: >> On 29/01/2021 10:49, Hsin-Hsiung Wang wrote: >>> + mt6359codec: mt6359codec { >>> + }; >> >> I understand that the dmic-mode and mic-type-X depends on the actual board on >> which it is used. In that case I think we should add mt6359codec node in the dts >> instead of dtsi file. I'd advise to set these properties as well as otherwise we >> get a (slightly misleading) warning in the driver. > > I feel it is better to include the node in dtsi to represent the whole > MT6359 PMIC. > > We could either: > - Set default values of these properties in the dtsi to avoid the > warning message. > - Or https://patchwork.kernel.org/project/alsa-devel/patch/20210202033557.1621029-1-tzungbi@google.com/ > As this got accpeted upstream, you don't need to do anything about it. Thanks for the pointer. Matthias ^ permalink raw reply [flat|nested] 11+ messages in thread
[parent not found: <1611913781-23460-5-git-send-email-hsin-hsiung.wang@mediatek.com>]
* Re: [PATCH RESEND v5 4/8] dt-bindings: regulator: Add document for MT6359 regulator [not found] ` <1611913781-23460-5-git-send-email-hsin-hsiung.wang@mediatek.com> @ 2021-01-30 17:23 ` Rob Herring 0 siblings, 0 replies; 11+ messages in thread From: Rob Herring @ 2021-01-30 17:23 UTC (permalink / raw) To: Hsin-Hsiung Wang Cc: Eddie Huang, Liam Girdwood, devicetree, Project_Global_Chrome_Upstream_Group, Alessandro Zummo, linux-kernel, Yuchen Huang, Mark Brown, Rob Herring, linux-arm-kernel, Alexandre Belloni, srv_heupstream, Sean Wang, linux-rtc, Lee Jones, Fei Shao, linux-mediatek, Ran Bi, Matthias Brugger On Fri, 29 Jan 2021 17:49:37 +0800, Hsin-Hsiung Wang wrote: > add dt-binding document for MediaTek MT6359 PMIC > > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > --- > changes since v4: fix yamllint errors in dt-binding document. > --- > .../bindings/regulator/mt6359-regulator.yaml | 169 ++++++++++++++++++ > 1 file changed, 169 insertions(+) > create mode 100644 Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/iio/adc/ti,palmas-gpadc.example.dt.yaml: pmic: 'adc', 'compatible' do not match any of the regexes: 'pinctrl-[0-9]+' From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/iio/adc/motorola,cpcap-adc.example.dt.yaml: pmic: '#address-cells', '#size-cells', 'adc' do not match any of the regexes: 'pinctrl-[0-9]+' From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/iio/adc/sprd,sc2720-adc.example.dt.yaml: pmic: '#address-cells', '#size-cells', 'adc@480' do not match any of the regexes: 'pinctrl-[0-9]+' From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/iio/adc/qcom,pm8018-adc.example.dt.yaml: pmic: '#address-cells', '#size-cells', 'adc@197' do not match any of the regexes: 'pinctrl-[0-9]+' From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml See https://patchwork.ozlabs.org/patch/1433233 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit. ^ permalink raw reply [flat|nested] 11+ messages in thread
[parent not found: <1611913781-23460-6-git-send-email-hsin-hsiung.wang@mediatek.com>]
* Re: [PATCH RESEND v5 5/8] mfd: Add support for the MediaTek MT6359 PMIC [not found] ` <1611913781-23460-6-git-send-email-hsin-hsiung.wang@mediatek.com> @ 2021-03-01 10:20 ` Lee Jones 2021-03-12 16:13 ` Hsin-hsiung Wang 0 siblings, 1 reply; 11+ messages in thread From: Lee Jones @ 2021-03-01 10:20 UTC (permalink / raw) To: Hsin-Hsiung Wang Cc: Rob Herring, Matthias Brugger, Liam Girdwood, Mark Brown, Alessandro Zummo, Alexandre Belloni, Fei Shao, Eddie Huang, Sean Wang, Yuchen Huang, Ran Bi, devicetree, linux-arm-kernel, linux-mediatek, linux-kernel, linux-rtc, srv_heupstream, Project_Global_Chrome_Upstream_Group On Fri, 29 Jan 2021, Hsin-Hsiung Wang wrote: > This adds support for the MediaTek MT6359 PMIC. This is a > multifunction device with the following sub modules: > > - Codec > - Interrupt > - Regulator > - RTC > > It is interfaced to the host controller using SPI interface > by a proprietary hardware called PMIC wrapper or pwrap. > MT6359 MFD is a child device of the pwrap. > > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > --- > changes since v4: > - remove unused compatible name in the mt6359 mfd cells. > --- > drivers/mfd/mt6358-irq.c | 24 ++ > drivers/mfd/mt6397-core.c | 26 ++ > include/linux/mfd/mt6359/core.h | 133 +++++++ > include/linux/mfd/mt6359/registers.h | 529 +++++++++++++++++++++++++++ > include/linux/mfd/mt6397/core.h | 1 + > 5 files changed, 713 insertions(+) > create mode 100644 include/linux/mfd/mt6359/core.h > create mode 100644 include/linux/mfd/mt6359/registers.h > > diff --git a/drivers/mfd/mt6358-irq.c b/drivers/mfd/mt6358-irq.c > index 4b094e5e51cc..83f3ffbdbb4c 100644 > --- a/drivers/mfd/mt6358-irq.c > +++ b/drivers/mfd/mt6358-irq.c > @@ -5,6 +5,8 @@ > #include <linux/interrupt.h> > #include <linux/mfd/mt6358/core.h> > #include <linux/mfd/mt6358/registers.h> > +#include <linux/mfd/mt6359/core.h> > +#include <linux/mfd/mt6359/registers.h> > #include <linux/mfd/mt6397/core.h> > #include <linux/module.h> > #include <linux/of.h> > @@ -26,6 +28,17 @@ static const struct irq_top_t mt6358_ints[] = { > MT6358_TOP_GEN(MISC), > }; > > +static const struct irq_top_t mt6359_ints[] = { > + MT6359_TOP_GEN(BUCK), > + MT6359_TOP_GEN(LDO), > + MT6359_TOP_GEN(PSC), > + MT6359_TOP_GEN(SCK), > + MT6359_TOP_GEN(BM), > + MT6359_TOP_GEN(HK), > + MT6359_TOP_GEN(AUD), > + MT6359_TOP_GEN(MISC), > +}; > + > static struct pmic_irq_data mt6358_irqd = { > .num_top = ARRAY_SIZE(mt6358_ints), > .num_pmic_irqs = MT6358_IRQ_NR, > @@ -33,6 +46,13 @@ static struct pmic_irq_data mt6358_irqd = { > .pmic_ints = mt6358_ints, > }; > > +static struct pmic_irq_data mt6359_irqd = { > + .num_top = ARRAY_SIZE(mt6359_ints), > + .num_pmic_irqs = MT6359_IRQ_NR, > + .top_int_status_reg = MT6359_TOP_INT_STATUS0, > + .pmic_ints = mt6359_ints, > +}; > + > static void pmic_irq_enable(struct irq_data *data) > { > unsigned int hwirq = irqd_to_hwirq(data); > @@ -195,6 +215,10 @@ int mt6358_irq_init(struct mt6397_chip *chip) > chip->irq_data = &mt6358_irqd; > break; > > + case MT6359_CHIP_ID: > + chip->irq_data = &mt6359_irqd; > + break; > + > default: > dev_err(chip->dev, "unsupported chip: 0x%x\n", chip->chip_id); > return -ENODEV; > diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c > index 7518d74c3b4c..617e4e4d5de0 100644 > --- a/drivers/mfd/mt6397-core.c > +++ b/drivers/mfd/mt6397-core.c > @@ -13,9 +13,11 @@ > #include <linux/mfd/core.h> > #include <linux/mfd/mt6323/core.h> > #include <linux/mfd/mt6358/core.h> > +#include <linux/mfd/mt6359/core.h> > #include <linux/mfd/mt6397/core.h> > #include <linux/mfd/mt6323/registers.h> > #include <linux/mfd/mt6358/registers.h> > +#include <linux/mfd/mt6359/registers.h> > #include <linux/mfd/mt6397/registers.h> > > #define MT6323_RTC_BASE 0x8000 > @@ -99,6 +101,19 @@ static const struct mfd_cell mt6358_devs[] = { > }, > }; > > +static const struct mfd_cell mt6359_devs[] = { > + { > + .name = "mt6359-regulator", > + }, { > + .name = "mt6359-rtc", > + .num_resources = ARRAY_SIZE(mt6358_rtc_resources), > + .resources = mt6358_rtc_resources, > + .of_compatible = "mediatek,mt6358-rtc", > + }, { > + .name = "mt6359-sound", > + }, > +}; Nit: Please put the single-line entries on one line. Like this: { .name = "mt6359-sound" }, > static const struct mfd_cell mt6397_devs[] = { > { > .name = "mt6397-rtc", > @@ -149,6 +164,14 @@ static const struct chip_data mt6358_core = { > .irq_init = mt6358_irq_init, > }; > > +static const struct chip_data mt6359_core = { > + .cid_addr = MT6359_SWCID, > + .cid_shift = 8, > + .cells = mt6359_devs, > + .cell_size = ARRAY_SIZE(mt6359_devs), > + .irq_init = mt6358_irq_init, > +}; > + > static const struct chip_data mt6397_core = { > .cid_addr = MT6397_CID, > .cid_shift = 0, > @@ -218,6 +241,9 @@ static const struct of_device_id mt6397_of_match[] = { > }, { > .compatible = "mediatek,mt6358", > .data = &mt6358_core, > + }, { > + .compatible = "mediatek,mt6359", > + .data = &mt6359_core, > }, { > .compatible = "mediatek,mt6397", > .data = &mt6397_core, > diff --git a/include/linux/mfd/mt6359/core.h b/include/linux/mfd/mt6359/core.h > new file mode 100644 > index 000000000000..61872f1ecbe4 > --- /dev/null > +++ b/include/linux/mfd/mt6359/core.h > @@ -0,0 +1,133 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (c) 2020 MediaTek Inc. This is out of date. > + */ > + > +#ifndef __MFD_MT6359_CORE_H__ > +#define __MFD_MT6359_CORE_H__ [...] > +#endif /* __MFD_MT6359_CORE_H__ */ > diff --git a/include/linux/mfd/mt6359/registers.h b/include/linux/mfd/mt6359/registers.h > new file mode 100644 > index 000000000000..4d72f0a7f2b0 > --- /dev/null > +++ b/include/linux/mfd/mt6359/registers.h > @@ -0,0 +1,529 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (c) 2020 MediaTek Inc. This too. > + */ > + > +#ifndef __MFD_MT6359_REGISTERS_H__ > +#define __MFD_MT6359_REGISTERS_H__ [...] > +#endif /* __MFD_MT6359_REGISTERS_H__ */ > diff --git a/include/linux/mfd/mt6397/core.h b/include/linux/mfd/mt6397/core.h > index 949268581b36..56f210eebc54 100644 > --- a/include/linux/mfd/mt6397/core.h > +++ b/include/linux/mfd/mt6397/core.h > @@ -13,6 +13,7 @@ > enum chip_id { > MT6323_CHIP_ID = 0x23, > MT6358_CHIP_ID = 0x58, > + MT6359_CHIP_ID = 0x59, > MT6391_CHIP_ID = 0x91, > MT6397_CHIP_ID = 0x97, > }; Once you fixed those issues, feel free to add my: For my own reference (apply this as-is to your sign-off block): Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org> -- Lee Jones [李琼斯] Senior Technical Lead - Developer Services Linaro.org │ Open source software for Arm SoCs Follow Linaro: Facebook | Twitter | Blog ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH RESEND v5 5/8] mfd: Add support for the MediaTek MT6359 PMIC 2021-03-01 10:20 ` [PATCH RESEND v5 5/8] mfd: Add support for the MediaTek MT6359 PMIC Lee Jones @ 2021-03-12 16:13 ` Hsin-hsiung Wang 0 siblings, 0 replies; 11+ messages in thread From: Hsin-hsiung Wang @ 2021-03-12 16:13 UTC (permalink / raw) To: Lee Jones Cc: Rob Herring, Matthias Brugger, Liam Girdwood, Mark Brown, Alessandro Zummo, Alexandre Belloni, Fei Shao, Eddie Huang, Sean Wang, Yuchen Huang, Ran Bi, devicetree, linux-arm-kernel, linux-mediatek, linux-kernel, linux-rtc, srv_heupstream, Project_Global_Chrome_Upstream_Group Hi, On Mon, 2021-03-01 at 10:20 +0000, Lee Jones wrote: > On Fri, 29 Jan 2021, Hsin-Hsiung Wang wrote: > > > This adds support for the MediaTek MT6359 PMIC. This is a > > multifunction device with the following sub modules: > > > > - Codec > > - Interrupt > > - Regulator > > - RTC > > > > It is interfaced to the host controller using SPI interface > > by a proprietary hardware called PMIC wrapper or pwrap. > > MT6359 MFD is a child device of the pwrap. > > > > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > > --- > > changes since v4: > > - remove unused compatible name in the mt6359 mfd cells. > > --- > > drivers/mfd/mt6358-irq.c | 24 ++ > > drivers/mfd/mt6397-core.c | 26 ++ > > include/linux/mfd/mt6359/core.h | 133 +++++++ > > include/linux/mfd/mt6359/registers.h | 529 +++++++++++++++++++++++++++ > > include/linux/mfd/mt6397/core.h | 1 + > > 5 files changed, 713 insertions(+) > > create mode 100644 include/linux/mfd/mt6359/core.h > > create mode 100644 include/linux/mfd/mt6359/registers.h > > > > diff --git a/drivers/mfd/mt6358-irq.c b/drivers/mfd/mt6358-irq.c > > index 4b094e5e51cc..83f3ffbdbb4c 100644 > > --- a/drivers/mfd/mt6358-irq.c > > +++ b/drivers/mfd/mt6358-irq.c > > @@ -5,6 +5,8 @@ > > #include <linux/interrupt.h> > > #include <linux/mfd/mt6358/core.h> > > #include <linux/mfd/mt6358/registers.h> > > +#include <linux/mfd/mt6359/core.h> > > +#include <linux/mfd/mt6359/registers.h> > > #include <linux/mfd/mt6397/core.h> > > #include <linux/module.h> > > #include <linux/of.h> > > @@ -26,6 +28,17 @@ static const struct irq_top_t mt6358_ints[] = { > > MT6358_TOP_GEN(MISC), > > }; > > > > +static const struct irq_top_t mt6359_ints[] = { > > + MT6359_TOP_GEN(BUCK), > > + MT6359_TOP_GEN(LDO), > > + MT6359_TOP_GEN(PSC), > > + MT6359_TOP_GEN(SCK), > > + MT6359_TOP_GEN(BM), > > + MT6359_TOP_GEN(HK), > > + MT6359_TOP_GEN(AUD), > > + MT6359_TOP_GEN(MISC), > > +}; > > + > > static struct pmic_irq_data mt6358_irqd = { > > .num_top = ARRAY_SIZE(mt6358_ints), > > .num_pmic_irqs = MT6358_IRQ_NR, > > @@ -33,6 +46,13 @@ static struct pmic_irq_data mt6358_irqd = { > > .pmic_ints = mt6358_ints, > > }; > > > > +static struct pmic_irq_data mt6359_irqd = { > > + .num_top = ARRAY_SIZE(mt6359_ints), > > + .num_pmic_irqs = MT6359_IRQ_NR, > > + .top_int_status_reg = MT6359_TOP_INT_STATUS0, > > + .pmic_ints = mt6359_ints, > > +}; > > + > > static void pmic_irq_enable(struct irq_data *data) > > { > > unsigned int hwirq = irqd_to_hwirq(data); > > @@ -195,6 +215,10 @@ int mt6358_irq_init(struct mt6397_chip *chip) > > chip->irq_data = &mt6358_irqd; > > break; > > > > + case MT6359_CHIP_ID: > > + chip->irq_data = &mt6359_irqd; > > + break; > > + > > default: > > dev_err(chip->dev, "unsupported chip: 0x%x\n", chip->chip_id); > > return -ENODEV; > > diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c > > index 7518d74c3b4c..617e4e4d5de0 100644 > > --- a/drivers/mfd/mt6397-core.c > > +++ b/drivers/mfd/mt6397-core.c > > @@ -13,9 +13,11 @@ > > #include <linux/mfd/core.h> > > #include <linux/mfd/mt6323/core.h> > > #include <linux/mfd/mt6358/core.h> > > +#include <linux/mfd/mt6359/core.h> > > #include <linux/mfd/mt6397/core.h> > > #include <linux/mfd/mt6323/registers.h> > > #include <linux/mfd/mt6358/registers.h> > > +#include <linux/mfd/mt6359/registers.h> > > #include <linux/mfd/mt6397/registers.h> > > > > #define MT6323_RTC_BASE 0x8000 > > @@ -99,6 +101,19 @@ static const struct mfd_cell mt6358_devs[] = { > > }, > > }; > > > > +static const struct mfd_cell mt6359_devs[] = { > > + { > > + .name = "mt6359-regulator", > > + }, { > > + .name = "mt6359-rtc", > > + .num_resources = ARRAY_SIZE(mt6358_rtc_resources), > > + .resources = mt6358_rtc_resources, > > + .of_compatible = "mediatek,mt6358-rtc", > > + }, { > > + .name = "mt6359-sound", > > + }, > > +}; > > Nit: Please put the single-line entries on one line. > > Like this: > > { .name = "mt6359-sound" }, > Thanks for the comment. I will update it in the next patch. > > static const struct mfd_cell mt6397_devs[] = { > > { > > .name = "mt6397-rtc", > > @@ -149,6 +164,14 @@ static const struct chip_data mt6358_core = { > > .irq_init = mt6358_irq_init, > > }; > > > > +static const struct chip_data mt6359_core = { > > + .cid_addr = MT6359_SWCID, > > + .cid_shift = 8, > > + .cells = mt6359_devs, > > + .cell_size = ARRAY_SIZE(mt6359_devs), > > + .irq_init = mt6358_irq_init, > > +}; > > + > > static const struct chip_data mt6397_core = { > > .cid_addr = MT6397_CID, > > .cid_shift = 0, > > @@ -218,6 +241,9 @@ static const struct of_device_id mt6397_of_match[] = { > > }, { > > .compatible = "mediatek,mt6358", > > .data = &mt6358_core, > > + }, { > > + .compatible = "mediatek,mt6359", > > + .data = &mt6359_core, > > }, { > > .compatible = "mediatek,mt6397", > > .data = &mt6397_core, > > diff --git a/include/linux/mfd/mt6359/core.h b/include/linux/mfd/mt6359/core.h > > new file mode 100644 > > index 000000000000..61872f1ecbe4 > > --- /dev/null > > +++ b/include/linux/mfd/mt6359/core.h > > @@ -0,0 +1,133 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > +/* > > + * Copyright (c) 2020 MediaTek Inc. > > This is out of date. > Thanks for the comment. I will update it in the next patch. > > + */ > > + > > +#ifndef __MFD_MT6359_CORE_H__ > > +#define __MFD_MT6359_CORE_H__ > > [...] > > > +#endif /* __MFD_MT6359_CORE_H__ */ > > diff --git a/include/linux/mfd/mt6359/registers.h b/include/linux/mfd/mt6359/registers.h > > new file mode 100644 > > index 000000000000..4d72f0a7f2b0 > > --- /dev/null > > +++ b/include/linux/mfd/mt6359/registers.h > > @@ -0,0 +1,529 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > +/* > > + * Copyright (c) 2020 MediaTek Inc. > > This too. > Thanks for the comment. I will update it in the next patch. > > + */ > > + > > +#ifndef __MFD_MT6359_REGISTERS_H__ > > +#define __MFD_MT6359_REGISTERS_H__ > > [...] > > > +#endif /* __MFD_MT6359_REGISTERS_H__ */ > > diff --git a/include/linux/mfd/mt6397/core.h b/include/linux/mfd/mt6397/core.h > > index 949268581b36..56f210eebc54 100644 > > --- a/include/linux/mfd/mt6397/core.h > > +++ b/include/linux/mfd/mt6397/core.h > > @@ -13,6 +13,7 @@ > > enum chip_id { > > MT6323_CHIP_ID = 0x23, > > MT6358_CHIP_ID = 0x58, > > + MT6359_CHIP_ID = 0x59, > > MT6391_CHIP_ID = 0x91, > > MT6397_CHIP_ID = 0x97, > > }; > > Once you fixed those issues, feel free to add my: > > For my own reference (apply this as-is to your sign-off block): > > Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org> > Thanks a lot. ^ permalink raw reply [flat|nested] 11+ messages in thread
[parent not found: <1611913781-23460-8-git-send-email-hsin-hsiung.wang@mediatek.com>]
* Re: [PATCH RESEND v5 7/8] regulator: mt6359: Add support for MT6359P regulator [not found] ` <1611913781-23460-8-git-send-email-hsin-hsiung.wang@mediatek.com> @ 2021-03-01 10:21 ` Lee Jones 2021-03-12 16:20 ` Hsin-hsiung Wang 0 siblings, 1 reply; 11+ messages in thread From: Lee Jones @ 2021-03-01 10:21 UTC (permalink / raw) To: Hsin-Hsiung Wang Cc: Rob Herring, Matthias Brugger, Liam Girdwood, Mark Brown, Alessandro Zummo, Alexandre Belloni, Fei Shao, Eddie Huang, Sean Wang, Yuchen Huang, Ran Bi, devicetree, linux-arm-kernel, linux-mediatek, linux-kernel, linux-rtc, srv_heupstream, Project_Global_Chrome_Upstream_Group On Fri, 29 Jan 2021, Hsin-Hsiung Wang wrote: > The MT6359P is a eco version for MT6359 regulator. > We add support based on MT6359 regulator driver. > > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > --- > changes since v4: > - add the regulators_node support. > --- > drivers/regulator/mt6359-regulator.c | 379 ++++++++++++++++++++- > include/linux/mfd/mt6359p/registers.h | 249 ++++++++++++++ Although the code is fine, just be aware that Linus can get grumpy having 100s and 100s of unused register defines in the kernel. > include/linux/regulator/mt6359-regulator.h | 1 + > 3 files changed, 623 insertions(+), 6 deletions(-) > create mode 100644 include/linux/mfd/mt6359p/registers.h -- Lee Jones [李琼斯] Senior Technical Lead - Developer Services Linaro.org │ Open source software for Arm SoCs Follow Linaro: Facebook | Twitter | Blog ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH RESEND v5 7/8] regulator: mt6359: Add support for MT6359P regulator 2021-03-01 10:21 ` [PATCH RESEND v5 7/8] regulator: mt6359: Add support for MT6359P regulator Lee Jones @ 2021-03-12 16:20 ` Hsin-hsiung Wang 0 siblings, 0 replies; 11+ messages in thread From: Hsin-hsiung Wang @ 2021-03-12 16:20 UTC (permalink / raw) To: Lee Jones Cc: Rob Herring, Matthias Brugger, Liam Girdwood, Mark Brown, Alessandro Zummo, Alexandre Belloni, Fei Shao, Eddie Huang, Sean Wang, Yuchen Huang, Ran Bi, devicetree, linux-arm-kernel, linux-mediatek, linux-kernel, linux-rtc, srv_heupstream, Project_Global_Chrome_Upstream_Group On Mon, 2021-03-01 at 10:21 +0000, Lee Jones wrote: > On Fri, 29 Jan 2021, Hsin-Hsiung Wang wrote: > > > The MT6359P is a eco version for MT6359 regulator. > > We add support based on MT6359 regulator driver. > > > > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > > --- > > changes since v4: > > - add the regulators_node support. > > --- > > drivers/regulator/mt6359-regulator.c | 379 ++++++++++++++++++++- > > > include/linux/mfd/mt6359p/registers.h | 249 ++++++++++++++ > > Although the code is fine, just be aware that Linus can get grumpy > having 100s and 100s of unused register defines in the kernel. > Thanks for the comment. We will mull it over. > > include/linux/regulator/mt6359-regulator.h | 1 + > > 3 files changed, 623 insertions(+), 6 deletions(-) > > create mode 100644 include/linux/mfd/mt6359p/registers.h > ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2021-03-12 16:21 UTC | newest] Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- [not found] <1611913781-23460-1-git-send-email-hsin-hsiung.wang@mediatek.com> 2021-01-29 9:49 ` [PATCH RESEND v5 3/8] dt-bindings: mfd: Add compatible for the MediaTek MT6359 PMIC Hsin-Hsiung Wang 2021-02-05 22:04 ` Rob Herring 2021-01-29 9:49 ` [PATCH RESEND v5 6/8] regulator: mt6359: Add support for MT6359 regulator Hsin-Hsiung Wang 2021-01-29 9:49 ` [PATCH RESEND v5 8/8] arm64: dts: mt6359: add PMIC MT6359 related nodes Hsin-Hsiung Wang [not found] ` <1cbf58f1-376c-fa93-98a2-53a41fa24273@gmail.com> 2021-02-02 3:51 ` Tzung-Bi Shih 2021-02-07 18:48 ` Matthias Brugger [not found] ` <1611913781-23460-5-git-send-email-hsin-hsiung.wang@mediatek.com> 2021-01-30 17:23 ` [PATCH RESEND v5 4/8] dt-bindings: regulator: Add document for MT6359 regulator Rob Herring [not found] ` <1611913781-23460-6-git-send-email-hsin-hsiung.wang@mediatek.com> 2021-03-01 10:20 ` [PATCH RESEND v5 5/8] mfd: Add support for the MediaTek MT6359 PMIC Lee Jones 2021-03-12 16:13 ` Hsin-hsiung Wang [not found] ` <1611913781-23460-8-git-send-email-hsin-hsiung.wang@mediatek.com> 2021-03-01 10:21 ` [PATCH RESEND v5 7/8] regulator: mt6359: Add support for MT6359P regulator Lee Jones 2021-03-12 16:20 ` Hsin-hsiung Wang
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