* [PATCH v9 0/6] ARM: STM32: add art-pi(stm32h750xbh6) board support
@ 2021-03-31 8:28 dillon.minfei
2021-03-31 8:28 ` [PATCH v9 1/6] Documentation: arm: stm32: Add stm32h750 value line doc dillon.minfei
` (6 more replies)
0 siblings, 7 replies; 9+ messages in thread
From: dillon.minfei @ 2021-03-31 8:28 UTC (permalink / raw)
To: robh, valentin.caron, Alexandre.torgue, rong.a.chen, a.fatoum,
mcoquelin.stm32, devicetree, linux-stm32, linux-arm-kernel,
linux-kernel, linux, afzal.mohd.ma, gregkh, erwan.leray,
erwan.leray, linux-serial, lkp, patrice.chotard, corbet,
linux-doc, pali, mchehab+huawei, andrew
Cc: dillon min
From: dillon min <dillon.minfei@gmail.com>
This patchset intend to add art-pi board support, this board developed
by rt-thread(https://www.rt-thread.org/).
Board resources:
8MiB QSPI flash
16MiB SPI flash
32MiB SDRAM
AP6212 wifi,bt,fm comb
sw context:
- as stm32h750 just has 128k bytes internal flash, so running a fw on
internal flash to download u-boot/kernel to qspi flash, boot
u-boot/kernel from qspi flash. this fw is based on rt-thread.
- kernel can be xip on qspi flash or load to sdram
- root filesystem is jffs2(created by buildroot), stored on spi flash
to support the boad, add following changes.
- fix r0-r3, r12 register restore failed after svc call,
- add dts binding
- update yaml doc
---
changes in v9:
- move gpio{a..k} entries from stm32h7-pinctrl.dtsi to stm32h743.dtsi
v8 link:
https://lore.kernel.org/lkml/1617094704-10040-1-git-send-email-dillon.minfei@gmail.com/
changes in v8:
- drop '[PATCH v7 3/6] ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to
support stm32h750' - stm32h743-pinctrl.dtsi file
- move compatible string "st,stm32h743-pinctrl" from stm32h7-pinctrl.dtsi
to stm32h743.dtsi
- update stm32h743i-{dico/eval}.dtsi to include stm32h7-pinctrl.dtsi
- move file stm32h743.dtsi submit position to [PATCH V8 3/6]
v7 link:
https://lore.kernel.org/lkml/1617071338-9436-1-git-send-email-dillon.minfei@gmail.com/
changes in v7:
- remove changes in
Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml
Hi Rob Herring
as you has already ack this patch, please ignore it. thanks
history link:
https://lore.kernel.org/lkml/1614758717-18223-4-git-send-email-dillon.minfei@gmail.com/
https://lore.kernel.org/lkml/20210308195033.GA2855292@robh.at.kernel.org/
- remove "[PATCH v6 8/9] pinctrl: stm32: Add STM32H750 MCU pinctrl support"
remove "[PATCH v6 5/9] ARM: dts: stm32: add stm32h750-pinctrl.dtsi"
- reference to stm32h743-pinctrl.dtsi in stm32h750i-art-pi.dts
v6 link:
https://lore.kernel.org/lkml/1616757302-7889-1-git-send-email-dillon.minfei@gmail.com/
changes in v6:
- add gpiox{gpio-ranges, ngpios} in stm32h7-pinctrl.dtsi
- add status="disabled" in stm32h743.dtsi
changes in v5:
- accroding to rob's suggestion, replace false with 'type: object'
of 'additionalProperties'.
- add Tested-by: Valentin Caron <valentin.caron@foss.st.com>
changes in v4:
- use unevaluatedProperties: false to fix dtbs_check warrnings instead of
add 'bluetooth' in st,stm32-uart.yaml
changes in v3:
- fix dtbs_check warrning: (8002cbd78fd5 and 4bc21d3dd678)
>> arch/arm/boot/dts/stm32h743i-eval.dt.yaml: soc: pin-controller:
{'type': 'object'} is not allowed for {'#address-cells': [[1]], '#size-cells':
[[1]], 'ranges': [[0,
>> arch/arm/boot/dts/stm32h743i-eval.dt.yaml: soc: 'i2c@40005C00',
'i2c@58001C00' do not match any of the regexes: '@(0|[1-9a-f][0-9a-f]*)$',
'^[^@]+$', 'pinctrl-[0-9]+'
>> arch/arm/boot/dts/stm32h750i-art-pi.dt.yaml: serial@40004800:
'bluetooth' does not match any of the regexes: 'pinctrl-[0-9]+'
changes in v2:
- reorganize the pinctrl device tree about
stm32h7-pinctrl/stm32h743/750-pinctrl
stm32h7-pinctrl.dtsi --> stm32h743-pinctrl.dtsi --> stm32h743i-disco.dts
| |-> stm32h743i-eval.dts
|-> stm32h750-pinctrl.dtsi --> stm32h750i-art-pi.dts
same to the stm32f7/f4's pinctrl style
- fix author name/copyright mistake
- add compatible string st,stm32h750-pinctrl to pinctl-stm32h743.c as they
have same pin alternate functions, update Kconfig description
- make item in stm32h750i-art-pi.dts sort by letter
*** BLURB HERE ***
dillon min (6):
Documentation: arm: stm32: Add stm32h750 value line doc
dt-bindings: arm: stm32: Add compatible strings for ART-PI board
ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750
ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6
ARM: stm32: Add a new SOC - STM32H750
dt-bindings: serial: stm32: Use 'type: object' instead of false for
'additionalProperties'
Documentation/arm/index.rst | 1 +
Documentation/arm/stm32/stm32h750-overview.rst | 34 +++
.../devicetree/bindings/arm/stm32/stm32.yaml | 4 +
.../devicetree/bindings/serial/st,stm32-uart.yaml | 3 +-
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/stm32h7-pinctrl.dtsi | 275 ++++++++++++++++++
arch/arm/boot/dts/stm32h743-pinctrl.dtsi | 306 ---------------------
arch/arm/boot/dts/stm32h743.dtsi | 176 +++++++++++-
arch/arm/boot/dts/stm32h743i-disco.dts | 2 +-
arch/arm/boot/dts/stm32h743i-eval.dts | 2 +-
arch/arm/boot/dts/stm32h750.dtsi | 6 +
arch/arm/boot/dts/stm32h750i-art-pi.dts | 229 +++++++++++++++
arch/arm/mach-stm32/board-dt.c | 1 +
13 files changed, 729 insertions(+), 311 deletions(-)
create mode 100644 Documentation/arm/stm32/stm32h750-overview.rst
create mode 100644 arch/arm/boot/dts/stm32h7-pinctrl.dtsi
delete mode 100644 arch/arm/boot/dts/stm32h743-pinctrl.dtsi
create mode 100644 arch/arm/boot/dts/stm32h750.dtsi
create mode 100644 arch/arm/boot/dts/stm32h750i-art-pi.dts
--
2.7.4
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH v9 1/6] Documentation: arm: stm32: Add stm32h750 value line doc 2021-03-31 8:28 [PATCH v9 0/6] ARM: STM32: add art-pi(stm32h750xbh6) board support dillon.minfei @ 2021-03-31 8:28 ` dillon.minfei 2021-03-31 8:28 ` [PATCH v9 2/6] dt-bindings: arm: stm32: Add compatible strings for ART-PI board dillon.minfei ` (5 subsequent siblings) 6 siblings, 0 replies; 9+ messages in thread From: dillon.minfei @ 2021-03-31 8:28 UTC (permalink / raw) To: robh, valentin.caron, Alexandre.torgue, rong.a.chen, a.fatoum, mcoquelin.stm32, devicetree, linux-stm32, linux-arm-kernel, linux-kernel, linux, afzal.mohd.ma, gregkh, erwan.leray, erwan.leray, linux-serial, lkp, patrice.chotard, corbet, linux-doc, pali, mchehab+huawei, andrew Cc: dillon min From: dillon min <dillon.minfei@gmail.com> This patchset add support for soc stm32h750, stm32h750 has mirror different from stm32h743 item stm32h743 stm32h750 flash size: 2MiB 128KiB adc: none 3 crypto-hash: none aes/hamc/des/tdes/md5/sha detail information can be found at: https://www.st.com/en/microcontrollers-microprocessors/stm32h750-value-line.html Signed-off-by: dillon min <dillon.minfei@gmail.com> --- v9: no changes Documentation/arm/index.rst | 1 + Documentation/arm/stm32/stm32h750-overview.rst | 34 ++++++++++++++++++++++++++ 2 files changed, 35 insertions(+) create mode 100644 Documentation/arm/stm32/stm32h750-overview.rst diff --git a/Documentation/arm/index.rst b/Documentation/arm/index.rst index b4bea32472b6..d4f34ae9e6f4 100644 --- a/Documentation/arm/index.rst +++ b/Documentation/arm/index.rst @@ -52,6 +52,7 @@ SoC-specific documents stm32/stm32f746-overview stm32/overview stm32/stm32h743-overview + stm32/stm32h750-overview stm32/stm32f769-overview stm32/stm32f429-overview stm32/stm32mp157-overview diff --git a/Documentation/arm/stm32/stm32h750-overview.rst b/Documentation/arm/stm32/stm32h750-overview.rst new file mode 100644 index 000000000000..0e51235c9547 --- /dev/null +++ b/Documentation/arm/stm32/stm32h750-overview.rst @@ -0,0 +1,34 @@ +================== +STM32H750 Overview +================== + +Introduction +------------ + +The STM32H750 is a Cortex-M7 MCU aimed at various applications. +It features: + +- Cortex-M7 core running up to @480MHz +- 128K internal flash, 1MBytes internal RAM +- FMC controller to connect SDRAM, NOR and NAND memories +- Dual mode QSPI +- SD/MMC/SDIO support +- Ethernet controller +- USB OTFG FS & HS controllers +- I2C, SPI, CAN busses support +- Several 16 & 32 bits general purpose timers +- Serial Audio interface +- LCD controller +- HDMI-CEC +- SPDIFRX +- DFSDM + +Resources +--------- + +Datasheet and reference manual are publicly available on ST website (STM32H750_). + +.. _STM32H750: https://www.st.com/en/microcontrollers-microprocessors/stm32h750-value-line.html + +:Authors: Dillon Min <dillon.minfei@gmail.com> + -- 2.7.4 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v9 2/6] dt-bindings: arm: stm32: Add compatible strings for ART-PI board 2021-03-31 8:28 [PATCH v9 0/6] ARM: STM32: add art-pi(stm32h750xbh6) board support dillon.minfei 2021-03-31 8:28 ` [PATCH v9 1/6] Documentation: arm: stm32: Add stm32h750 value line doc dillon.minfei @ 2021-03-31 8:28 ` dillon.minfei 2021-03-31 8:28 ` [PATCH v9 3/6] ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750 dillon.minfei ` (4 subsequent siblings) 6 siblings, 0 replies; 9+ messages in thread From: dillon.minfei @ 2021-03-31 8:28 UTC (permalink / raw) To: robh, valentin.caron, Alexandre.torgue, rong.a.chen, a.fatoum, mcoquelin.stm32, devicetree, linux-stm32, linux-arm-kernel, linux-kernel, linux, afzal.mohd.ma, gregkh, erwan.leray, erwan.leray, linux-serial, lkp, patrice.chotard, corbet, linux-doc, pali, mchehab+huawei, andrew Cc: dillon min From: dillon min <dillon.minfei@gmail.com> Art-pi based on stm32h750xbh6, with following resources: -8MiB QSPI flash -16MiB SPI flash -32MiB SDRAM -AP6212 wifi, bt, fm detail information can be found at: https://art-pi.gitee.io/website/ Signed-off-by: dillon min <dillon.minfei@gmail.com> Acked-by: Rob Herring <robh@kernel.org> --- v9: no changes Documentation/devicetree/bindings/arm/stm32/stm32.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml index e7525a3395e5..306e7551ad39 100644 --- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml +++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml @@ -53,6 +53,10 @@ properties: - const: st,stm32h743 - items: - enum: + - st,stm32h750i-art-pi + - const: st,stm32h750 + - items: + - enum: - shiratech,stm32mp157a-iot-box # IoT Box - shiratech,stm32mp157a-stinger96 # Stinger96 - st,stm32mp157c-ed1 -- 2.7.4 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v9 3/6] ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750 2021-03-31 8:28 [PATCH v9 0/6] ARM: STM32: add art-pi(stm32h750xbh6) board support dillon.minfei 2021-03-31 8:28 ` [PATCH v9 1/6] Documentation: arm: stm32: Add stm32h750 value line doc dillon.minfei 2021-03-31 8:28 ` [PATCH v9 2/6] dt-bindings: arm: stm32: Add compatible strings for ART-PI board dillon.minfei @ 2021-03-31 8:28 ` dillon.minfei 2021-03-31 8:28 ` [PATCH v9 4/6] ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6 dillon.minfei ` (3 subsequent siblings) 6 siblings, 0 replies; 9+ messages in thread From: dillon.minfei @ 2021-03-31 8:28 UTC (permalink / raw) To: robh, valentin.caron, Alexandre.torgue, rong.a.chen, a.fatoum, mcoquelin.stm32, devicetree, linux-stm32, linux-arm-kernel, linux-kernel, linux, afzal.mohd.ma, gregkh, erwan.leray, erwan.leray, linux-serial, lkp, patrice.chotard, corbet, linux-doc, pali, mchehab+huawei, andrew Cc: dillon min From: dillon min <dillon.minfei@gmail.com> This patch is intend to add support stm32h750 value line, just add stm32h7-pinctrl.dtsi for extending, with following changes: - rename stm32h743-pinctrl.dtsi to stm32h7-pinctrl.dtsi - update stm32h743i-{dico/eval}.dtsi to include stm32h7-pinctrl.dtsi - add dts binding usart3, uart4 usart3/uart4 pinctrl in stm32h7-pinctrl.dtsi usart3/uart4 register in stm32h743.dtsi - add dts binding sdmmc2 sdmmc2 pinctrl in stm32h7-pinctrl.dtsi sdmmc2 register in stm32h743.dtsi - add spi1_pins pinctrl in stm32h7-pinctrl.dtsi - move 'pin-controller' from stm32h7-pinctrl.dtsi to stm32h743.dtsi, to fix make dtbs_check warrnings arch/arm/boot/dts/stm32h750i-art-pi.dt.yaml: soc: 'i2c@40005C00', 'i2c@58001C00' do not match any of the regexes: '@(0|[1-9a-f][0-9a-f]*)$', '^[^@]+$', 'pinctrl-[0-9]+' - add gpio{a..k} entries in stm32h743.dtsi Signed-off-by: dillon min <dillon.minfei@gmail.com> --- v9: - move gpio{a..k} entries from stm32h7-pinctrl.dtsi to stm32h743.dtsi arch/arm/boot/dts/stm32h7-pinctrl.dtsi | 275 +++++++++++++++++++++++++++ arch/arm/boot/dts/stm32h743-pinctrl.dtsi | 306 ------------------------------- arch/arm/boot/dts/stm32h743.dtsi | 176 +++++++++++++++++- arch/arm/boot/dts/stm32h743i-disco.dts | 2 +- arch/arm/boot/dts/stm32h743i-eval.dts | 2 +- 5 files changed, 451 insertions(+), 310 deletions(-) create mode 100644 arch/arm/boot/dts/stm32h7-pinctrl.dtsi delete mode 100644 arch/arm/boot/dts/stm32h743-pinctrl.dtsi diff --git a/arch/arm/boot/dts/stm32h7-pinctrl.dtsi b/arch/arm/boot/dts/stm32h7-pinctrl.dtsi new file mode 100644 index 000000000000..7fc62e5b1d3e --- /dev/null +++ b/arch/arm/boot/dts/stm32h7-pinctrl.dtsi @@ -0,0 +1,275 @@ +/* + * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include <dt-bindings/pinctrl/stm32-pinfunc.h> + +&pinctrl { + + i2c1_pins_a: i2c1-0 { + pins { + pinmux = <STM32_PINMUX('B', 6, AF4)>, /* I2C1_SCL */ + <STM32_PINMUX('B', 7, AF4)>; /* I2C1_SDA */ + bias-disable; + drive-open-drain; + slew-rate = <0>; + }; + }; + + ethernet_rmii: rmii-0 { + pins { + pinmux = <STM32_PINMUX('G', 11, AF11)>, + <STM32_PINMUX('G', 13, AF11)>, + <STM32_PINMUX('G', 12, AF11)>, + <STM32_PINMUX('C', 4, AF11)>, + <STM32_PINMUX('C', 5, AF11)>, + <STM32_PINMUX('A', 7, AF11)>, + <STM32_PINMUX('C', 1, AF11)>, + <STM32_PINMUX('A', 2, AF11)>, + <STM32_PINMUX('A', 1, AF11)>; + slew-rate = <2>; + }; + }; + + sdmmc1_b4_pins_a: sdmmc1-b4-0 { + pins { + pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ + <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ + <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ + <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */ + <STM32_PINMUX('C', 12, AF12)>, /* SDMMC1_CK */ + <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ + slew-rate = <3>; + drive-push-pull; + bias-disable; + }; + }; + + sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { + pins1 { + pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ + <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ + <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ + <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */ + <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */ + slew-rate = <3>; + drive-push-pull; + bias-disable; + }; + pins2{ + pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ + slew-rate = <3>; + drive-open-drain; + bias-disable; + }; + }; + + sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { + pins { + pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */ + <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */ + <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */ + <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */ + <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */ + <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */ + }; + }; + + sdmmc2_b4_pins_a: sdmmc2-b4-0 { + pins { + pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC1_D0 */ + <STM32_PINMUX('B', 15, AF9)>, /* SDMMC1_D1 */ + <STM32_PINMUX('B', 3, AF9)>, /* SDMMC1_D2 */ + <STM32_PINMUX('B', 4, AF9)>, /* SDMMC1_D3 */ + <STM32_PINMUX('D', 6, AF11)>, /* SDMMC1_CK */ + <STM32_PINMUX('D', 7, AF11)>; /* SDMMC1_CMD */ + slew-rate = <3>; + drive-push-pull; + bias-disable; + }; + }; + + sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 { + pins1 { + pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */ + <STM32_PINMUX('B', 15, AF9)>, /* SDMMC1_D1 */ + <STM32_PINMUX('B', 3, AF9)>, /* SDMMC1_D2 */ + <STM32_PINMUX('B', 4, AF9)>, /* SDMMC1_D3 */ + <STM32_PINMUX('D', 6, AF11)>; /* SDMMC1_CK */ + slew-rate = <3>; + drive-push-pull; + bias-disable; + }; + pins2{ + pinmux = <STM32_PINMUX('D', 7, AF11)>; /* SDMMC1_CMD */ + slew-rate = <3>; + drive-open-drain; + bias-disable; + }; + }; + + sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 { + pins { + pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC1_D0 */ + <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC1_D1 */ + <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC1_D2 */ + <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC1_D3 */ + <STM32_PINMUX('D', 6, ANALOG)>, /* SDMMC1_CK */ + <STM32_PINMUX('D', 7, ANALOG)>; /* SDMMC1_CMD */ + }; + }; + + sdmmc1_dir_pins_a: sdmmc1-dir-0 { + pins1 { + pinmux = <STM32_PINMUX('C', 6, AF8)>, /* SDMMC1_D0DIR */ + <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */ + <STM32_PINMUX('B', 9, AF7)>; /* SDMMC1_CDIR */ + slew-rate = <3>; + drive-push-pull; + bias-pull-up; + }; + pins2{ + pinmux = <STM32_PINMUX('B', 8, AF7)>; /* SDMMC1_CKIN */ + bias-pull-up; + }; + }; + + sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 { + pins { + pinmux = <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC1_D0DIR */ + <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */ + <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */ + <STM32_PINMUX('B', 8, ANALOG)>; /* SDMMC1_CKIN */ + }; + }; + + usart1_pins: usart1-0 { + pins1 { + pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = <STM32_PINMUX('B', 15, AF4)>; /* USART1_RX */ + bias-disable; + }; + }; + + usart2_pins: usart2-0 { + pins1 { + pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */ + bias-disable; + }; + }; + + usart3_pins: usart3-0 { + pins1 { + pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */ + <STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS_DE */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = <STM32_PINMUX('B', 11, AF7)>, /* USART3_RX */ + <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */ + bias-disable; + }; + }; + + uart4_pins: uart4-0 { + pins1 { + pinmux = <STM32_PINMUX('A', 0, AF8)>; /* UART4_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = <STM32_PINMUX('I', 9, AF8)>; /* UART4_RX */ + bias-disable; + }; + }; + + usbotg_hs_pins_a: usbotg-hs-0 { + pins { + pinmux = <STM32_PINMUX('H', 4, AF10)>, /* ULPI_NXT */ + <STM32_PINMUX('I', 11, AF10)>, /* ULPI_DIR> */ + <STM32_PINMUX('C', 0, AF10)>, /* ULPI_STP> */ + <STM32_PINMUX('A', 5, AF10)>, /* ULPI_CK> */ + <STM32_PINMUX('A', 3, AF10)>, /* ULPI_D0> */ + <STM32_PINMUX('B', 0, AF10)>, /* ULPI_D1> */ + <STM32_PINMUX('B', 1, AF10)>, /* ULPI_D2> */ + <STM32_PINMUX('B', 10, AF10)>, /* ULPI_D3> */ + <STM32_PINMUX('B', 11, AF10)>, /* ULPI_D4> */ + <STM32_PINMUX('B', 12, AF10)>, /* ULPI_D5> */ + <STM32_PINMUX('B', 13, AF10)>, /* ULPI_D6> */ + <STM32_PINMUX('B', 5, AF10)>; /* ULPI_D7> */ + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + }; + + spi1_pins: spi1-0 { + pins1 { + pinmux = <STM32_PINMUX('A', 5, AF5)>, + /* SPI1_CLK */ + <STM32_PINMUX('B', 5, AF5)>; + /* SPI1_MOSI */ + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + pins2 { + pinmux = <STM32_PINMUX('G', 9, AF5)>; + /* SPI1_MISO */ + bias-disable; + }; + }; +}; + diff --git a/arch/arm/boot/dts/stm32h743-pinctrl.dtsi b/arch/arm/boot/dts/stm32h743-pinctrl.dtsi deleted file mode 100644 index fa5dcb6a5fdd..000000000000 --- a/arch/arm/boot/dts/stm32h743-pinctrl.dtsi +++ /dev/null @@ -1,306 +0,0 @@ -/* - * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include <dt-bindings/pinctrl/stm32-pinfunc.h> - -/ { - soc { - pin-controller { - #address-cells = <1>; - #size-cells = <1>; - compatible = "st,stm32h743-pinctrl"; - ranges = <0 0x58020000 0x3000>; - interrupt-parent = <&exti>; - st,syscfg = <&syscfg 0x8>; - pins-are-numbered; - - gpioa: gpio@58020000 { - gpio-controller; - #gpio-cells = <2>; - reg = <0x0 0x400>; - clocks = <&rcc GPIOA_CK>; - st,bank-name = "GPIOA"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpiob: gpio@58020400 { - gpio-controller; - #gpio-cells = <2>; - reg = <0x400 0x400>; - clocks = <&rcc GPIOB_CK>; - st,bank-name = "GPIOB"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpioc: gpio@58020800 { - gpio-controller; - #gpio-cells = <2>; - reg = <0x800 0x400>; - clocks = <&rcc GPIOC_CK>; - st,bank-name = "GPIOC"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpiod: gpio@58020c00 { - gpio-controller; - #gpio-cells = <2>; - reg = <0xc00 0x400>; - clocks = <&rcc GPIOD_CK>; - st,bank-name = "GPIOD"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpioe: gpio@58021000 { - gpio-controller; - #gpio-cells = <2>; - reg = <0x1000 0x400>; - clocks = <&rcc GPIOE_CK>; - st,bank-name = "GPIOE"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpiof: gpio@58021400 { - gpio-controller; - #gpio-cells = <2>; - reg = <0x1400 0x400>; - clocks = <&rcc GPIOF_CK>; - st,bank-name = "GPIOF"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpiog: gpio@58021800 { - gpio-controller; - #gpio-cells = <2>; - reg = <0x1800 0x400>; - clocks = <&rcc GPIOG_CK>; - st,bank-name = "GPIOG"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpioh: gpio@58021c00 { - gpio-controller; - #gpio-cells = <2>; - reg = <0x1c00 0x400>; - clocks = <&rcc GPIOH_CK>; - st,bank-name = "GPIOH"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpioi: gpio@58022000 { - gpio-controller; - #gpio-cells = <2>; - reg = <0x2000 0x400>; - clocks = <&rcc GPIOI_CK>; - st,bank-name = "GPIOI"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpioj: gpio@58022400 { - gpio-controller; - #gpio-cells = <2>; - reg = <0x2400 0x400>; - clocks = <&rcc GPIOJ_CK>; - st,bank-name = "GPIOJ"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpiok: gpio@58022800 { - gpio-controller; - #gpio-cells = <2>; - reg = <0x2800 0x400>; - clocks = <&rcc GPIOK_CK>; - st,bank-name = "GPIOK"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - i2c1_pins_a: i2c1-0 { - pins { - pinmux = <STM32_PINMUX('B', 6, AF4)>, /* I2C1_SCL */ - <STM32_PINMUX('B', 7, AF4)>; /* I2C1_SDA */ - bias-disable; - drive-open-drain; - slew-rate = <0>; - }; - }; - - ethernet_rmii: rmii-0 { - pins { - pinmux = <STM32_PINMUX('G', 11, AF11)>, - <STM32_PINMUX('G', 13, AF11)>, - <STM32_PINMUX('G', 12, AF11)>, - <STM32_PINMUX('C', 4, AF11)>, - <STM32_PINMUX('C', 5, AF11)>, - <STM32_PINMUX('A', 7, AF11)>, - <STM32_PINMUX('C', 1, AF11)>, - <STM32_PINMUX('A', 2, AF11)>, - <STM32_PINMUX('A', 1, AF11)>; - slew-rate = <2>; - }; - }; - - sdmmc1_b4_pins_a: sdmmc1-b4-0 { - pins { - pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ - <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ - <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ - <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */ - <STM32_PINMUX('C', 12, AF12)>, /* SDMMC1_CK */ - <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ - slew-rate = <3>; - drive-push-pull; - bias-disable; - }; - }; - - sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { - pins1 { - pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ - <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ - <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ - <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */ - <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */ - slew-rate = <3>; - drive-push-pull; - bias-disable; - }; - pins2{ - pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ - slew-rate = <3>; - drive-open-drain; - bias-disable; - }; - }; - - sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { - pins { - pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */ - <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */ - <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */ - <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */ - <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */ - <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */ - }; - }; - - sdmmc1_dir_pins_a: sdmmc1-dir-0 { - pins1 { - pinmux = <STM32_PINMUX('C', 6, AF8)>, /* SDMMC1_D0DIR */ - <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */ - <STM32_PINMUX('B', 9, AF7)>; /* SDMMC1_CDIR */ - slew-rate = <3>; - drive-push-pull; - bias-pull-up; - }; - pins2{ - pinmux = <STM32_PINMUX('B', 8, AF7)>; /* SDMMC1_CKIN */ - bias-pull-up; - }; - }; - - sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 { - pins { - pinmux = <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC1_D0DIR */ - <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */ - <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */ - <STM32_PINMUX('B', 8, ANALOG)>; /* SDMMC1_CKIN */ - }; - }; - - usart1_pins: usart1-0 { - pins1 { - pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */ - bias-disable; - drive-push-pull; - slew-rate = <0>; - }; - pins2 { - pinmux = <STM32_PINMUX('B', 15, AF4)>; /* USART1_RX */ - bias-disable; - }; - }; - - usart2_pins: usart2-0 { - pins1 { - pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */ - bias-disable; - drive-push-pull; - slew-rate = <0>; - }; - pins2 { - pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */ - bias-disable; - }; - }; - - usbotg_hs_pins_a: usbotg-hs-0 { - pins { - pinmux = <STM32_PINMUX('H', 4, AF10)>, /* ULPI_NXT */ - <STM32_PINMUX('I', 11, AF10)>, /* ULPI_DIR> */ - <STM32_PINMUX('C', 0, AF10)>, /* ULPI_STP> */ - <STM32_PINMUX('A', 5, AF10)>, /* ULPI_CK> */ - <STM32_PINMUX('A', 3, AF10)>, /* ULPI_D0> */ - <STM32_PINMUX('B', 0, AF10)>, /* ULPI_D1> */ - <STM32_PINMUX('B', 1, AF10)>, /* ULPI_D2> */ - <STM32_PINMUX('B', 10, AF10)>, /* ULPI_D3> */ - <STM32_PINMUX('B', 11, AF10)>, /* ULPI_D4> */ - <STM32_PINMUX('B', 12, AF10)>, /* ULPI_D5> */ - <STM32_PINMUX('B', 13, AF10)>, /* ULPI_D6> */ - <STM32_PINMUX('B', 5, AF10)>; /* ULPI_D7> */ - bias-disable; - drive-push-pull; - slew-rate = <2>; - }; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi index 4ebffb0a45a3..06d43e60d06c 100644 --- a/arch/arm/boot/dts/stm32h743.dtsi +++ b/arch/arm/boot/dts/stm32h743.dtsi @@ -135,6 +135,22 @@ clocks = <&rcc USART2_CK>; }; + usart3: serial@40004800 { + compatible = "st,stm32h7-uart"; + reg = <0x40004800 0x400>; + interrupts = <39>; + status = "disabled"; + clocks = <&rcc USART3_CK>; + }; + + uart4: serial@40004c00 { + compatible = "st,stm32h7-uart"; + reg = <0x40004c00 0x400>; + interrupts = <52>; + status = "disabled"; + clocks = <&rcc UART4_CK>; + }; + i2c1: i2c@40005400 { compatible = "st,stm32f7-i2c"; #address-cells = <1>; @@ -159,7 +175,7 @@ status = "disabled"; }; - i2c3: i2c@40005C00 { + i2c3: i2c@40005c00 { compatible = "st,stm32f7-i2c"; #address-cells = <1>; #size-cells = <0>; @@ -368,6 +384,20 @@ max-frequency = <120000000>; }; + sdmmc2: mmc@48022400 { + compatible = "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x10153180>; + reg = <0x48022400 0x400>; + interrupts = <124>; + interrupt-names = "cmd_irq"; + clocks = <&rcc SDMMC2_CK>; + clock-names = "apb_pclk"; + resets = <&rcc STM32H7_AHB2_RESET(SDMMC2)>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <120000000>; + }; + exti: interrupt-controller@58000000 { compatible = "st,stm32h7-exti"; interrupt-controller; @@ -392,7 +422,7 @@ status = "disabled"; }; - i2c4: i2c@58001C00 { + i2c4: i2c@58001c00 { compatible = "st,stm32f7-i2c"; #address-cells = <1>; #size-cells = <0>; @@ -555,6 +585,148 @@ snps,pbl = <8>; status = "disabled"; }; + + gpioa: gpio@58020000 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x0 0x400>; + clocks = <&rcc GPIOA_CK>; + st,bank-name = "GPIOA"; + interrupt-controller; + #interrupt-cells = <2>; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 0 16>; + }; + + gpiob: gpio@58020400 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x400 0x400>; + clocks = <&rcc GPIOB_CK>; + st,bank-name = "GPIOB"; + interrupt-controller; + #interrupt-cells = <2>; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 16 16>; + }; + + gpioc: gpio@58020800 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x800 0x400>; + clocks = <&rcc GPIOC_CK>; + st,bank-name = "GPIOC"; + interrupt-controller; + #interrupt-cells = <2>; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 32 16>; + }; + + gpiod: gpio@58020c00 { + gpio-controller; + #gpio-cells = <2>; + reg = <0xc00 0x400>; + clocks = <&rcc GPIOD_CK>; + st,bank-name = "GPIOD"; + interrupt-controller; + #interrupt-cells = <2>; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 48 16>; + }; + + gpioe: gpio@58021000 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x1000 0x400>; + clocks = <&rcc GPIOE_CK>; + st,bank-name = "GPIOE"; + interrupt-controller; + #interrupt-cells = <2>; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 64 16>; + }; + + gpiof: gpio@58021400 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x1400 0x400>; + clocks = <&rcc GPIOF_CK>; + st,bank-name = "GPIOF"; + interrupt-controller; + #interrupt-cells = <2>; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 80 16>; + }; + + gpiog: gpio@58021800 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x1800 0x400>; + clocks = <&rcc GPIOG_CK>; + st,bank-name = "GPIOG"; + interrupt-controller; + #interrupt-cells = <2>; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 96 16>; + }; + + gpioh: gpio@58021c00 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x1c00 0x400>; + clocks = <&rcc GPIOH_CK>; + st,bank-name = "GPIOH"; + interrupt-controller; + #interrupt-cells = <2>; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 112 16>; + }; + + gpioi: gpio@58022000 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x2000 0x400>; + clocks = <&rcc GPIOI_CK>; + st,bank-name = "GPIOI"; + interrupt-controller; + #interrupt-cells = <2>; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 128 16>; + }; + + gpioj: gpio@58022400 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x2400 0x400>; + clocks = <&rcc GPIOJ_CK>; + st,bank-name = "GPIOJ"; + interrupt-controller; + #interrupt-cells = <2>; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 144 16>; + }; + + gpiok: gpio@58022800 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x2800 0x400>; + clocks = <&rcc GPIOK_CK>; + st,bank-name = "GPIOK"; + interrupt-controller; + #interrupt-cells = <2>; + ngpios = <8>; + gpio-ranges = <&pinctrl 0 160 8>; + }; + + pinctrl: pin-controller@58020000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,stm32h743-pinctrl"; + ranges = <0 0x58020000 0x3000>; + interrupt-parent = <&exti>; + st,syscfg = <&syscfg 0x8>; + pins-are-numbered; + }; }; }; diff --git a/arch/arm/boot/dts/stm32h743i-disco.dts b/arch/arm/boot/dts/stm32h743i-disco.dts index e446d311c520..59e01ce10318 100644 --- a/arch/arm/boot/dts/stm32h743i-disco.dts +++ b/arch/arm/boot/dts/stm32h743i-disco.dts @@ -42,7 +42,7 @@ /dts-v1/; #include "stm32h743.dtsi" -#include "stm32h743-pinctrl.dtsi" +#include "stm32h7-pinctrl.dtsi" / { model = "STMicroelectronics STM32H743i-Discovery board"; diff --git a/arch/arm/boot/dts/stm32h743i-eval.dts b/arch/arm/boot/dts/stm32h743i-eval.dts index 8f398178f5e5..38cc7faf6884 100644 --- a/arch/arm/boot/dts/stm32h743i-eval.dts +++ b/arch/arm/boot/dts/stm32h743i-eval.dts @@ -42,7 +42,7 @@ /dts-v1/; #include "stm32h743.dtsi" -#include "stm32h743-pinctrl.dtsi" +#include "stm32h7-pinctrl.dtsi" / { model = "STMicroelectronics STM32H743i-EVAL board"; -- 2.7.4 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v9 4/6] ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6 2021-03-31 8:28 [PATCH v9 0/6] ARM: STM32: add art-pi(stm32h750xbh6) board support dillon.minfei ` (2 preceding siblings ...) 2021-03-31 8:28 ` [PATCH v9 3/6] ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750 dillon.minfei @ 2021-03-31 8:28 ` dillon.minfei 2021-03-31 8:28 ` [PATCH v9 5/6] ARM: stm32: Add a new SOC - STM32H750 dillon.minfei ` (2 subsequent siblings) 6 siblings, 0 replies; 9+ messages in thread From: dillon.minfei @ 2021-03-31 8:28 UTC (permalink / raw) To: robh, valentin.caron, Alexandre.torgue, rong.a.chen, a.fatoum, mcoquelin.stm32, devicetree, linux-stm32, linux-arm-kernel, linux-kernel, linux, afzal.mohd.ma, gregkh, erwan.leray, erwan.leray, linux-serial, lkp, patrice.chotard, corbet, linux-doc, pali, mchehab+huawei, andrew Cc: dillon min From: dillon min <dillon.minfei@gmail.com> This patchset has following changes: - introduce stm32h750.dtsi to support stm32h750 value line - add stm32h750i-art-pi.dtb (arch/arm/boot/dts/Makefile) - add stm32h750-art-pi.dts to support art-pi board art-pi board component: - 8MiB qspi flash - 16MiB spi flash - 32MiB sdram - ap6212 wifi&bt&fm the detail board information can be found at: https://art-pi.gitee.io/website/ Signed-off-by: dillon min <dillon.minfei@gmail.com> --- v9: no changes arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/stm32h750.dtsi | 6 + arch/arm/boot/dts/stm32h750i-art-pi.dts | 229 ++++++++++++++++++++++++++++++++ 3 files changed, 236 insertions(+) create mode 100644 arch/arm/boot/dts/stm32h750.dtsi create mode 100644 arch/arm/boot/dts/stm32h750i-art-pi.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 8e5d4ab4e75e..a19c5ab9df84 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1071,6 +1071,7 @@ dtb-$(CONFIG_ARCH_STM32) += \ stm32746g-eval.dtb \ stm32h743i-eval.dtb \ stm32h743i-disco.dtb \ + stm32h750i-art-pi.dtb \ stm32mp153c-dhcom-drc02.dtb \ stm32mp157a-avenger96.dtb \ stm32mp157a-dhcor-avenger96.dtb \ diff --git a/arch/arm/boot/dts/stm32h750.dtsi b/arch/arm/boot/dts/stm32h750.dtsi new file mode 100644 index 000000000000..41e3b1e3a874 --- /dev/null +++ b/arch/arm/boot/dts/stm32h750.dtsi @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ +/* Copyright (C) STMicroelectronics 2021 - All Rights Reserved */ + +#include "stm32h743.dtsi" + + diff --git a/arch/arm/boot/dts/stm32h750i-art-pi.dts b/arch/arm/boot/dts/stm32h750i-art-pi.dts new file mode 100644 index 000000000000..9bb73bb61901 --- /dev/null +++ b/arch/arm/boot/dts/stm32h750i-art-pi.dts @@ -0,0 +1,229 @@ +/* + * Copyright 2021 - Dillon Min <dillon.minfei@gmail.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * For art-pi board resources, you can refer to link: + * https://art-pi.gitee.io/website/ + */ + +/dts-v1/; +#include "stm32h750.dtsi" +#include "stm32h7-pinctrl.dtsi" +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "RT-Thread STM32H750i-ART-PI board"; + compatible = "st,stm32h750i-art-pi", "st,stm32h750"; + + chosen { + bootargs = "root=/dev/ram"; + stdout-path = "serial0:2000000n8"; + }; + + memory@c0000000 { + device_type = "memory"; + reg = <0xc0000000 0x2000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + no-map; + size = <0x100000>; + linux,dma-default; + }; + }; + + aliases { + serial0 = &uart4; + serial1 = &usart3; + }; + + leds { + compatible = "gpio-leds"; + led-red { + gpios = <&gpioi 8 0>; + }; + led-green { + gpios = <&gpioc 15 0>; + linux,default-trigger = "heartbeat"; + }; + }; + + v3v3: regulator-v3v3 { + compatible = "regulator-fixed"; + regulator-name = "v3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + wlan_pwr: regulator-wlan { + compatible = "regulator-fixed"; + + regulator-name = "wl-reg"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&clk_hse { + clock-frequency = <25000000>; +}; + +&dma1 { + status = "okay"; +}; + +&dma2 { + status = "okay"; +}; + +&mac { + status = "disabled"; + pinctrl-0 = <ðernet_rmii>; + pinctrl-names = "default"; + phy-mode = "rmii"; + phy-handle = <&phy0>; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + phy0: ethernet-phy@0 { + reg = <0>; + }; + }; +}; + +&sdmmc1 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc1_b4_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a>; + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; + broken-cd; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&v3v3>; + status = "okay"; +}; + +&sdmmc2 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc2_b4_pins_a>; + pinctrl-1 = <&sdmmc2_b4_od_pins_a>; + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>; + broken-cd; + non-removable; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&wlan_pwr>; + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + brcmf: bcrmf@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +&spi1 { + status = "okay"; + pinctrl-0 = <&spi1_pins>; + pinctrl-names = "default"; + cs-gpios = <&gpioa 4 GPIO_ACTIVE_LOW>; + dmas = <&dmamux1 37 0x400 0x05>, + <&dmamux1 38 0x400 0x05>; + dma-names = "rx", "tx"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "winbond,w25q128", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <80000000>; + + partition@0 { + label = "root filesystem"; + reg = <0 0x1000000>; + }; + }; +}; + +&usart2 { + pinctrl-0 = <&usart2_pins>; + pinctrl-names = "default"; + status = "disabled"; +}; + +&usart3 { + pinctrl-names = "default"; + pinctrl-0 = <&usart3_pins>; + dmas = <&dmamux1 45 0x400 0x05>, + <&dmamux1 46 0x400 0x05>; + dma-names = "rx", "tx"; + st,hw-flow-ctrl; + status = "okay"; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + host-wakeup-gpios = <&gpioc 0 GPIO_ACTIVE_HIGH>; + device-wakeup-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>; + shutdown-gpios = <&gpioi 11 GPIO_ACTIVE_HIGH>; + max-speed = <115200>; + }; +}; + +&uart4 { + pinctrl-0 = <&uart4_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + + -- 2.7.4 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v9 5/6] ARM: stm32: Add a new SOC - STM32H750 2021-03-31 8:28 [PATCH v9 0/6] ARM: STM32: add art-pi(stm32h750xbh6) board support dillon.minfei ` (3 preceding siblings ...) 2021-03-31 8:28 ` [PATCH v9 4/6] ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6 dillon.minfei @ 2021-03-31 8:28 ` dillon.minfei 2021-03-31 8:28 ` [PATCH v9 6/6] dt-bindings: serial: stm32: Use 'type: object' instead of false for 'additionalProperties' dillon.minfei 2021-04-01 7:59 ` [PATCH v9 0/6] ARM: STM32: add art-pi(stm32h750xbh6) board support Alexandre TORGUE 6 siblings, 0 replies; 9+ messages in thread From: dillon.minfei @ 2021-03-31 8:28 UTC (permalink / raw) To: robh, valentin.caron, Alexandre.torgue, rong.a.chen, a.fatoum, mcoquelin.stm32, devicetree, linux-stm32, linux-arm-kernel, linux-kernel, linux, afzal.mohd.ma, gregkh, erwan.leray, erwan.leray, linux-serial, lkp, patrice.chotard, corbet, linux-doc, pali, mchehab+huawei, andrew Cc: dillon min From: dillon min <dillon.minfei@gmail.com> The STM32H750 is a Cortex-M7 MCU running at 480MHz and containing 128KBytes internal flash, 1MiB SRAM. Signed-off-by: dillon min <dillon.minfei@gmail.com> --- v9: no changes arch/arm/mach-stm32/board-dt.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-stm32/board-dt.c b/arch/arm/mach-stm32/board-dt.c index 011d57b488c2..a766310d8dca 100644 --- a/arch/arm/mach-stm32/board-dt.c +++ b/arch/arm/mach-stm32/board-dt.c @@ -17,6 +17,7 @@ static const char *const stm32_compat[] __initconst = { "st,stm32f746", "st,stm32f769", "st,stm32h743", + "st,stm32h750", "st,stm32mp157", NULL }; -- 2.7.4 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v9 6/6] dt-bindings: serial: stm32: Use 'type: object' instead of false for 'additionalProperties' 2021-03-31 8:28 [PATCH v9 0/6] ARM: STM32: add art-pi(stm32h750xbh6) board support dillon.minfei ` (4 preceding siblings ...) 2021-03-31 8:28 ` [PATCH v9 5/6] ARM: stm32: Add a new SOC - STM32H750 dillon.minfei @ 2021-03-31 8:28 ` dillon.minfei 2021-04-01 7:59 ` [PATCH v9 0/6] ARM: STM32: add art-pi(stm32h750xbh6) board support Alexandre TORGUE 6 siblings, 0 replies; 9+ messages in thread From: dillon.minfei @ 2021-03-31 8:28 UTC (permalink / raw) To: robh, valentin.caron, Alexandre.torgue, rong.a.chen, a.fatoum, mcoquelin.stm32, devicetree, linux-stm32, linux-arm-kernel, linux-kernel, linux, afzal.mohd.ma, gregkh, erwan.leray, erwan.leray, linux-serial, lkp, patrice.chotard, corbet, linux-doc, pali, mchehab+huawei, andrew Cc: dillon min From: dillon min <dillon.minfei@gmail.com> To use additional properties 'bluetooth' on serial, need replace false with 'type: object' for 'additionalProperties' to make it as a node, else will run into dtbs_check warnings. 'arch/arm/boot/dts/stm32h750i-art-pi.dt.yaml: serial@40004800: 'bluetooth' does not match any of the regexes: 'pinctrl-[0-9]+' Fixes: af1c2d81695b ("dt-bindings: serial: Convert STM32 UART to json-schema") Reported-by: kernel test robot <lkp@intel.com> Tested-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: dillon min <dillon.minfei@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1616757302-7889-8-git-send-email-dillon.minfei@gmail.com Signed-off-by: dillon min <dillon.minfei@gmail.com> --- v9: no changes, this patch was merged to tty-next by Greg Kroah-Hartman Documentation/devicetree/bindings/serial/st,stm32-uart.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml b/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml index 8631678283f9..865be05083c3 100644 --- a/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml +++ b/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml @@ -80,7 +80,8 @@ required: - interrupts - clocks -additionalProperties: false +additionalProperties: + type: object examples: - | -- 2.7.4 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v9 0/6] ARM: STM32: add art-pi(stm32h750xbh6) board support 2021-03-31 8:28 [PATCH v9 0/6] ARM: STM32: add art-pi(stm32h750xbh6) board support dillon.minfei ` (5 preceding siblings ...) 2021-03-31 8:28 ` [PATCH v9 6/6] dt-bindings: serial: stm32: Use 'type: object' instead of false for 'additionalProperties' dillon.minfei @ 2021-04-01 7:59 ` Alexandre TORGUE 2021-04-01 8:08 ` dillon min 6 siblings, 1 reply; 9+ messages in thread From: Alexandre TORGUE @ 2021-04-01 7:59 UTC (permalink / raw) To: dillon.minfei, robh, valentin.caron, rong.a.chen, a.fatoum, mcoquelin.stm32, devicetree, linux-stm32, linux-arm-kernel, linux-kernel, linux, afzal.mohd.ma, gregkh, erwan.leray, erwan.leray, linux-serial, lkp, patrice.chotard, corbet, linux-doc, pali, mchehab+huawei, andrew Hi Dillon On 3/31/21 10:28 AM, dillon.minfei@gmail.com wrote: > From: dillon min <dillon.minfei@gmail.com> > > This patchset intend to add art-pi board support, this board developed > by rt-thread(https://www.rt-thread.org/). > > Board resources: > 8MiB QSPI flash > 16MiB SPI flash > 32MiB SDRAM > AP6212 wifi,bt,fm comb > > sw context: > - as stm32h750 just has 128k bytes internal flash, so running a fw on > internal flash to download u-boot/kernel to qspi flash, boot > u-boot/kernel from qspi flash. this fw is based on rt-thread. > - kernel can be xip on qspi flash or load to sdram > - root filesystem is jffs2(created by buildroot), stored on spi flash > > to support the boad, add following changes. > - fix r0-r3, r12 register restore failed after svc call, > - add dts binding > - update yaml doc > Thanks for adding this new STM32 MCU board. Series applied on stm32-next. As discussed I made some changes applying the series. Regards Alex > --- > changes in v9: > - move gpio{a..k} entries from stm32h7-pinctrl.dtsi to stm32h743.dtsi > v8 link: > https://lore.kernel.org/lkml/1617094704-10040-1-git-send-email-dillon.minfei@gmail.com/ > > changes in v8: > - drop '[PATCH v7 3/6] ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to > support stm32h750' - stm32h743-pinctrl.dtsi file > - move compatible string "st,stm32h743-pinctrl" from stm32h7-pinctrl.dtsi > to stm32h743.dtsi > - update stm32h743i-{dico/eval}.dtsi to include stm32h7-pinctrl.dtsi > - move file stm32h743.dtsi submit position to [PATCH V8 3/6] > v7 link: > https://lore.kernel.org/lkml/1617071338-9436-1-git-send-email-dillon.minfei@gmail.com/ > > changes in v7: > - remove changes in > Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml > Hi Rob Herring > as you has already ack this patch, please ignore it. thanks > history link: > https://lore.kernel.org/lkml/1614758717-18223-4-git-send-email-dillon.minfei@gmail.com/ > https://lore.kernel.org/lkml/20210308195033.GA2855292@robh.at.kernel.org/ > - remove "[PATCH v6 8/9] pinctrl: stm32: Add STM32H750 MCU pinctrl support" > remove "[PATCH v6 5/9] ARM: dts: stm32: add stm32h750-pinctrl.dtsi" > - reference to stm32h743-pinctrl.dtsi in stm32h750i-art-pi.dts > v6 link: > https://lore.kernel.org/lkml/1616757302-7889-1-git-send-email-dillon.minfei@gmail.com/ > > changes in v6: > - add gpiox{gpio-ranges, ngpios} in stm32h7-pinctrl.dtsi > - add status="disabled" in stm32h743.dtsi > > changes in v5: > - accroding to rob's suggestion, replace false with 'type: object' > of 'additionalProperties'. > - add Tested-by: Valentin Caron <valentin.caron@foss.st.com> > > changes in v4: > - use unevaluatedProperties: false to fix dtbs_check warrnings instead of > add 'bluetooth' in st,stm32-uart.yaml > > changes in v3: > - fix dtbs_check warrning: (8002cbd78fd5 and 4bc21d3dd678) > >> arch/arm/boot/dts/stm32h743i-eval.dt.yaml: soc: pin-controller: > {'type': 'object'} is not allowed for {'#address-cells': [[1]], '#size-cells': > [[1]], 'ranges': [[0, > > >> arch/arm/boot/dts/stm32h743i-eval.dt.yaml: soc: 'i2c@40005C00', > 'i2c@58001C00' do not match any of the regexes: '@(0|[1-9a-f][0-9a-f]*)$', > '^[^@]+$', 'pinctrl-[0-9]+' > >> arch/arm/boot/dts/stm32h750i-art-pi.dt.yaml: serial@40004800: > 'bluetooth' does not match any of the regexes: 'pinctrl-[0-9]+' > > changes in v2: > - reorganize the pinctrl device tree about > stm32h7-pinctrl/stm32h743/750-pinctrl > stm32h7-pinctrl.dtsi --> stm32h743-pinctrl.dtsi --> stm32h743i-disco.dts > | |-> stm32h743i-eval.dts > |-> stm32h750-pinctrl.dtsi --> stm32h750i-art-pi.dts > same to the stm32f7/f4's pinctrl style > - fix author name/copyright mistake > - add compatible string st,stm32h750-pinctrl to pinctl-stm32h743.c as they > have same pin alternate functions, update Kconfig description > - make item in stm32h750i-art-pi.dts sort by letter > > *** BLURB HERE *** > > dillon min (6): > Documentation: arm: stm32: Add stm32h750 value line doc > dt-bindings: arm: stm32: Add compatible strings for ART-PI board > ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750 > ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6 > ARM: stm32: Add a new SOC - STM32H750 > dt-bindings: serial: stm32: Use 'type: object' instead of false for > 'additionalProperties' > > Documentation/arm/index.rst | 1 + > Documentation/arm/stm32/stm32h750-overview.rst | 34 +++ > .../devicetree/bindings/arm/stm32/stm32.yaml | 4 + > .../devicetree/bindings/serial/st,stm32-uart.yaml | 3 +- > arch/arm/boot/dts/Makefile | 1 + > arch/arm/boot/dts/stm32h7-pinctrl.dtsi | 275 ++++++++++++++++++ > arch/arm/boot/dts/stm32h743-pinctrl.dtsi | 306 --------------------- > arch/arm/boot/dts/stm32h743.dtsi | 176 +++++++++++- > arch/arm/boot/dts/stm32h743i-disco.dts | 2 +- > arch/arm/boot/dts/stm32h743i-eval.dts | 2 +- > arch/arm/boot/dts/stm32h750.dtsi | 6 + > arch/arm/boot/dts/stm32h750i-art-pi.dts | 229 +++++++++++++++ > arch/arm/mach-stm32/board-dt.c | 1 + > 13 files changed, 729 insertions(+), 311 deletions(-) > create mode 100644 Documentation/arm/stm32/stm32h750-overview.rst > create mode 100644 arch/arm/boot/dts/stm32h7-pinctrl.dtsi > delete mode 100644 arch/arm/boot/dts/stm32h743-pinctrl.dtsi > create mode 100644 arch/arm/boot/dts/stm32h750.dtsi > create mode 100644 arch/arm/boot/dts/stm32h750i-art-pi.dts > ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v9 0/6] ARM: STM32: add art-pi(stm32h750xbh6) board support 2021-04-01 7:59 ` [PATCH v9 0/6] ARM: STM32: add art-pi(stm32h750xbh6) board support Alexandre TORGUE @ 2021-04-01 8:08 ` dillon min 0 siblings, 0 replies; 9+ messages in thread From: dillon min @ 2021-04-01 8:08 UTC (permalink / raw) To: Alexandre TORGUE Cc: Rob Herring, Valentin CARON - foss, rong.a.chen, Ahmad Fatoum, Maxime Coquelin, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, linux-stm32, Linux ARM, Linux Kernel Mailing List, linux, afzal.mohd.ma, gregkh, Erwan LE-RAY - foss, Erwan LE RAY, linux-serial, lkp, Patrice CHOTARD, corbet, linux-doc, pali, mchehab+huawei, andrew On Thu, Apr 1, 2021 at 4:00 PM Alexandre TORGUE <alexandre.torgue@foss.st.com> wrote: > > Hi Dillon > > On 3/31/21 10:28 AM, dillon.minfei@gmail.com wrote: > > From: dillon min <dillon.minfei@gmail.com> > > > > This patchset intend to add art-pi board support, this board developed > > by rt-thread(https://www.rt-thread.org/). > > > > Board resources: > > 8MiB QSPI flash > > 16MiB SPI flash > > 32MiB SDRAM > > AP6212 wifi,bt,fm comb > > > > sw context: > > - as stm32h750 just has 128k bytes internal flash, so running a fw on > > internal flash to download u-boot/kernel to qspi flash, boot > > u-boot/kernel from qspi flash. this fw is based on rt-thread. > > - kernel can be xip on qspi flash or load to sdram > > - root filesystem is jffs2(created by buildroot), stored on spi flash > > > > to support the boad, add following changes. > > - fix r0-r3, r12 register restore failed after svc call, > > - add dts binding > > - update yaml doc > > > > Thanks for adding this new STM32 MCU board. Series applied on > stm32-next. As discussed I made some changes applying the series. Thanks for your work, just check your stm32-next tree, commit message is more clear than my version. thanks. Finally, you keep the stm32h750.dtsi, it's fine with me, I'll update crypto node to this file when i get time to test. Thanks again. Regards Dillon > > Regards > Alex > > > > > --- > > changes in v9: > > - move gpio{a..k} entries from stm32h7-pinctrl.dtsi to stm32h743.dtsi > > v8 link: > > https://lore.kernel.org/lkml/1617094704-10040-1-git-send-email-dillon.minfei@gmail.com/ > > > > changes in v8: > > - drop '[PATCH v7 3/6] ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to > > support stm32h750' - stm32h743-pinctrl.dtsi file > > - move compatible string "st,stm32h743-pinctrl" from stm32h7-pinctrl.dtsi > > to stm32h743.dtsi > > - update stm32h743i-{dico/eval}.dtsi to include stm32h7-pinctrl.dtsi > > - move file stm32h743.dtsi submit position to [PATCH V8 3/6] > > v7 link: > > https://lore.kernel.org/lkml/1617071338-9436-1-git-send-email-dillon.minfei@gmail.com/ > > > > changes in v7: > > - remove changes in > > Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml > > Hi Rob Herring > > as you has already ack this patch, please ignore it. thanks > > history link: > > https://lore.kernel.org/lkml/1614758717-18223-4-git-send-email-dillon.minfei@gmail.com/ > > https://lore.kernel.org/lkml/20210308195033.GA2855292@robh.at.kernel.org/ > > - remove "[PATCH v6 8/9] pinctrl: stm32: Add STM32H750 MCU pinctrl support" > > remove "[PATCH v6 5/9] ARM: dts: stm32: add stm32h750-pinctrl.dtsi" > > - reference to stm32h743-pinctrl.dtsi in stm32h750i-art-pi.dts > > v6 link: > > https://lore.kernel.org/lkml/1616757302-7889-1-git-send-email-dillon.minfei@gmail.com/ > > > > changes in v6: > > - add gpiox{gpio-ranges, ngpios} in stm32h7-pinctrl.dtsi > > - add status="disabled" in stm32h743.dtsi > > > > changes in v5: > > - accroding to rob's suggestion, replace false with 'type: object' > > of 'additionalProperties'. > > - add Tested-by: Valentin Caron <valentin.caron@foss.st.com> > > > > changes in v4: > > - use unevaluatedProperties: false to fix dtbs_check warrnings instead of > > add 'bluetooth' in st,stm32-uart.yaml > > > > changes in v3: > > - fix dtbs_check warrning: (8002cbd78fd5 and 4bc21d3dd678) > > >> arch/arm/boot/dts/stm32h743i-eval.dt.yaml: soc: pin-controller: > > {'type': 'object'} is not allowed for {'#address-cells': [[1]], '#size-cells': > > [[1]], 'ranges': [[0, > > > > >> arch/arm/boot/dts/stm32h743i-eval.dt.yaml: soc: 'i2c@40005C00', > > 'i2c@58001C00' do not match any of the regexes: '@(0|[1-9a-f][0-9a-f]*)$', > > '^[^@]+$', 'pinctrl-[0-9]+' > > >> arch/arm/boot/dts/stm32h750i-art-pi.dt.yaml: serial@40004800: > > 'bluetooth' does not match any of the regexes: 'pinctrl-[0-9]+' > > > > changes in v2: > > - reorganize the pinctrl device tree about > > stm32h7-pinctrl/stm32h743/750-pinctrl > > stm32h7-pinctrl.dtsi --> stm32h743-pinctrl.dtsi --> stm32h743i-disco.dts > > | |-> stm32h743i-eval.dts > > |-> stm32h750-pinctrl.dtsi --> stm32h750i-art-pi.dts > > same to the stm32f7/f4's pinctrl style > > - fix author name/copyright mistake > > - add compatible string st,stm32h750-pinctrl to pinctl-stm32h743.c as they > > have same pin alternate functions, update Kconfig description > > - make item in stm32h750i-art-pi.dts sort by letter > > > > *** BLURB HERE *** > > > > dillon min (6): > > Documentation: arm: stm32: Add stm32h750 value line doc > > dt-bindings: arm: stm32: Add compatible strings for ART-PI board > > ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750 > > ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6 > > ARM: stm32: Add a new SOC - STM32H750 > > dt-bindings: serial: stm32: Use 'type: object' instead of false for > > 'additionalProperties' > > > > Documentation/arm/index.rst | 1 + > > Documentation/arm/stm32/stm32h750-overview.rst | 34 +++ > > .../devicetree/bindings/arm/stm32/stm32.yaml | 4 + > > .../devicetree/bindings/serial/st,stm32-uart.yaml | 3 +- > > arch/arm/boot/dts/Makefile | 1 + > > arch/arm/boot/dts/stm32h7-pinctrl.dtsi | 275 ++++++++++++++++++ > > arch/arm/boot/dts/stm32h743-pinctrl.dtsi | 306 --------------------- > > arch/arm/boot/dts/stm32h743.dtsi | 176 +++++++++++- > > arch/arm/boot/dts/stm32h743i-disco.dts | 2 +- > > arch/arm/boot/dts/stm32h743i-eval.dts | 2 +- > > arch/arm/boot/dts/stm32h750.dtsi | 6 + > > arch/arm/boot/dts/stm32h750i-art-pi.dts | 229 +++++++++++++++ > > arch/arm/mach-stm32/board-dt.c | 1 + > > 13 files changed, 729 insertions(+), 311 deletions(-) > > create mode 100644 Documentation/arm/stm32/stm32h750-overview.rst > > create mode 100644 arch/arm/boot/dts/stm32h7-pinctrl.dtsi > > delete mode 100644 arch/arm/boot/dts/stm32h743-pinctrl.dtsi > > create mode 100644 arch/arm/boot/dts/stm32h750.dtsi > > create mode 100644 arch/arm/boot/dts/stm32h750i-art-pi.dts > > ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2021-04-01 8:09 UTC | newest] Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-03-31 8:28 [PATCH v9 0/6] ARM: STM32: add art-pi(stm32h750xbh6) board support dillon.minfei 2021-03-31 8:28 ` [PATCH v9 1/6] Documentation: arm: stm32: Add stm32h750 value line doc dillon.minfei 2021-03-31 8:28 ` [PATCH v9 2/6] dt-bindings: arm: stm32: Add compatible strings for ART-PI board dillon.minfei 2021-03-31 8:28 ` [PATCH v9 3/6] ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750 dillon.minfei 2021-03-31 8:28 ` [PATCH v9 4/6] ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6 dillon.minfei 2021-03-31 8:28 ` [PATCH v9 5/6] ARM: stm32: Add a new SOC - STM32H750 dillon.minfei 2021-03-31 8:28 ` [PATCH v9 6/6] dt-bindings: serial: stm32: Use 'type: object' instead of false for 'additionalProperties' dillon.minfei 2021-04-01 7:59 ` [PATCH v9 0/6] ARM: STM32: add art-pi(stm32h750xbh6) board support Alexandre TORGUE 2021-04-01 8:08 ` dillon min
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