* [PATCH net-next 1/9] devlink: add documentation for hns3 driver
2021-07-12 1:34 [PATCH net-next 0/9] net: hns3: add support devlink Guangbin Huang
@ 2021-07-12 1:34 ` Guangbin Huang
2021-07-12 18:32 ` Jakub Kicinski
2021-07-12 1:34 ` [PATCH net-next 2/9] net: hns3: add support for registering devlink for PF Guangbin Huang
` (7 subsequent siblings)
8 siblings, 1 reply; 12+ messages in thread
From: Guangbin Huang @ 2021-07-12 1:34 UTC (permalink / raw)
To: davem, kuba, jiri
Cc: netdev, linux-kernel, lipeng321, chenhao288, huangguangbin2
From: Hao Chen <chenhao288@hisilicon.com>
Add a file to document devlink support for hns3 driver.
Now support devlink param and devlink info.
Signed-off-by: Hao Chen <chenhao288@hisilicon.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
---
Documentation/networking/devlink/hns3.rst | 51 ++++++++++++++++++++++++++++++
Documentation/networking/devlink/index.rst | 1 +
2 files changed, 52 insertions(+)
create mode 100644 Documentation/networking/devlink/hns3.rst
diff --git a/Documentation/networking/devlink/hns3.rst b/Documentation/networking/devlink/hns3.rst
new file mode 100644
index 000000000000..798158eb96ee
--- /dev/null
+++ b/Documentation/networking/devlink/hns3.rst
@@ -0,0 +1,51 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+====================
+hns3 devlink support
+====================
+
+This document describes the devlink features implemented by the ``hns3``
+device driver.
+
+Parameters
+==========
+
+The ``hns3`` driver implements the following driver-specific
+parameters.
+
+.. list-table:: Driver-specific parameters implemented
+ :widths: 10 10 10 70
+
+ * - Name
+ - Type
+ - Mode
+ - Description
+ * - ``rx_buf_len``
+ - U32
+ - driverinit
+ - Set rx BD buffer size.
+
+ * Now only support setting 2048 and 4096.
+ * - ``tx_buf_size``
+ - U32
+ - driverinit
+ - Set tx spare buf size.
+
+ * The size is setted for tx bounce feature.
+
+The ``hns3`` driver supports reloading via ``DEVLINK_CMD_RELOAD``
+
+Info versions
+=============
+
+The ``hns3`` driver reports the following versions
+
+.. list-table:: devlink info versions implemented
+ :widths: 10 10 80
+
+ * - Name
+ - Type
+ - Description
+ * - ``fw``
+ - running
+ - Used to represent the firmware version.
diff --git a/Documentation/networking/devlink/index.rst b/Documentation/networking/devlink/index.rst
index b3b9e0692088..03f56ed2961f 100644
--- a/Documentation/networking/devlink/index.rst
+++ b/Documentation/networking/devlink/index.rst
@@ -34,6 +34,7 @@ parameters, info versions, and other features it supports.
:maxdepth: 1
bnxt
+ hns3
ionic
ice
mlx4
--
2.8.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH net-next 1/9] devlink: add documentation for hns3 driver
2021-07-12 1:34 ` [PATCH net-next 1/9] devlink: add documentation for hns3 driver Guangbin Huang
@ 2021-07-12 18:32 ` Jakub Kicinski
2021-07-13 12:34 ` huangguangbin (A)
0 siblings, 1 reply; 12+ messages in thread
From: Jakub Kicinski @ 2021-07-12 18:32 UTC (permalink / raw)
To: Guangbin Huang; +Cc: davem, jiri, netdev, linux-kernel, lipeng321, chenhao288
On Mon, 12 Jul 2021 09:34:50 +0800 Guangbin Huang wrote:
> +Parameters
> +==========
> +
> +The ``hns3`` driver implements the following driver-specific
> +parameters.
> +
> +.. list-table:: Driver-specific parameters implemented
> + :widths: 10 10 10 70
> +
> + * - Name
> + - Type
> + - Mode
> + - Description
> + * - ``rx_buf_len``
> + - U32
> + - driverinit
> + - Set rx BD buffer size.
> + * Now only support setting 2048 and 4096.
Can you elaborate further? If I was a user reading this I'd still have
little confidence what this does. Does it change the size of each
buffer put on the Rx ring between 2k and 4k? Why is that a devlink
feature, we configure rings via ethtool.
> + * - ``tx_buf_size``
> + - U32
> + - driverinit
> + - Set tx spare buf size.
> +
> + * The size is setted for tx bounce feature.
... and what is the tx bounce feature?
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH net-next 1/9] devlink: add documentation for hns3 driver
2021-07-12 18:32 ` Jakub Kicinski
@ 2021-07-13 12:34 ` huangguangbin (A)
0 siblings, 0 replies; 12+ messages in thread
From: huangguangbin (A) @ 2021-07-13 12:34 UTC (permalink / raw)
To: Jakub Kicinski; +Cc: davem, jiri, netdev, linux-kernel, lipeng321, chenhao288
On 2021/7/13 2:32, Jakub Kicinski wrote:
> On Mon, 12 Jul 2021 09:34:50 +0800 Guangbin Huang wrote:
>> +Parameters
>> +==========
>> +
>> +The ``hns3`` driver implements the following driver-specific
>> +parameters.
>> +
>> +.. list-table:: Driver-specific parameters implemented
>> + :widths: 10 10 10 70
>> +
>> + * - Name
>> + - Type
>> + - Mode
>> + - Description
>> + * - ``rx_buf_len``
>> + - U32
>> + - driverinit
>> + - Set rx BD buffer size.
>> + * Now only support setting 2048 and 4096.
>
> Can you elaborate further? If I was a user reading this I'd still have
> little confidence what this does. Does it change the size of each
> buffer put on the Rx ring between 2k and 4k? Why is that a devlink
> feature, we configure rings via ethtool.
>
Yes, we can add more detailed descriptions about this feature and tx_buf_size
in V2. This devlink feature is to change the buffer size of each BD of Rx ring
between 2KB and 4KB.
Now ethtool -G paramter supports setting some ring configurations such as
queue depth and so on，but not supports setting rx BD buffer size. And
devlink can support this function.
For another thing, setting rx BD buffer size needs to reload resource
pool(for resource pool details, see the link: [1]) to take effect, so
even if ethtool support this function, it still needs next reload to
take effect. Now devlink supports reload operation(patch 6/9), so we can
set rx BD buffer size via devlink, then do devlink reload operation to
make it take effect.
To sum up, we choose devlink to set rx BD buffer size.
>> + * - ``tx_buf_size``
>> + - U32
>> + - driverinit
>> + - Set tx spare buf size.
>> +
>> + * The size is setted for tx bounce feature.
>
> ... and what is the tx bounce feature?
> .
>
Tx bounce buffer feature is used for small size packet or frag. It adds a queue
based tx shared bounce buffer to memcpy the small packet when the len of xmitted
skb is below tx_copybreak(value to distinguish small size and normal size), and
reduce the overhead of dma map and unmap when IOMMU is on. For more details, see
link: [2], this devlink feature is setting tx bounce buffer size for it.
1. https://lore.kernel.org/patchwork/cover/816549/
2. https://patchwork.kernel.org/project/netdevbpf/patch/1623825377-41948-4-git-send-email-huangguangbin2@huawei.com/
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH net-next 2/9] net: hns3: add support for registering devlink for PF
2021-07-12 1:34 [PATCH net-next 0/9] net: hns3: add support devlink Guangbin Huang
2021-07-12 1:34 ` [PATCH net-next 1/9] devlink: add documentation for hns3 driver Guangbin Huang
@ 2021-07-12 1:34 ` Guangbin Huang
2021-07-12 1:34 ` [PATCH net-next 3/9] net: hns3: add support for registering devlink for VF Guangbin Huang
` (6 subsequent siblings)
8 siblings, 0 replies; 12+ messages in thread
From: Guangbin Huang @ 2021-07-12 1:34 UTC (permalink / raw)
To: davem, kuba, jiri
Cc: netdev, linux-kernel, lipeng321, chenhao288, huangguangbin2
From: Yufeng Mo <moyufeng@huawei.com>
Add devlink register support for HNS3 ethernet PF driver.
Signed-off-by: Yufeng Mo <moyufeng@huawei.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
---
.../net/ethernet/hisilicon/hns3/hns3pf/Makefile | 2 +-
.../ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c | 54 ++++++++++++++++++++++
.../ethernet/hisilicon/hns3/hns3pf/hclge_devlink.h | 15 ++++++
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 10 +++-
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.h | 2 +
5 files changed, 81 insertions(+), 2 deletions(-)
create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c
create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.h
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/Makefile b/drivers/net/ethernet/hisilicon/hns3/hns3pf/Makefile
index a685392dbfe9..d1bf5c4c0abb 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/Makefile
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/Makefile
@@ -7,6 +7,6 @@ ccflags-y := -I $(srctree)/drivers/net/ethernet/hisilicon/hns3
ccflags-y += -I $(srctree)/$(src)
obj-$(CONFIG_HNS3_HCLGE) += hclge.o
-hclge-objs = hclge_main.o hclge_cmd.o hclge_mdio.o hclge_tm.o hclge_mbx.o hclge_err.o hclge_debugfs.o hclge_ptp.o
+hclge-objs = hclge_main.o hclge_cmd.o hclge_mdio.o hclge_tm.o hclge_mbx.o hclge_err.o hclge_debugfs.o hclge_ptp.o hclge_devlink.o
hclge-$(CONFIG_HNS3_DCB) += hclge_dcb.o
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c
new file mode 100644
index 000000000000..03b822b0a8e7
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c
@@ -0,0 +1,54 @@
+// SPDX-License-Identifier: GPL-2.0+
+/* Copyright (c) 2021 Hisilicon Limited. */
+
+#include <net/devlink.h>
+
+#include "hclge_devlink.h"
+
+static const struct devlink_ops hclge_devlink_ops = {
+};
+
+int hclge_devlink_init(struct hclge_dev *hdev)
+{
+ struct pci_dev *pdev = hdev->pdev;
+ struct hclge_devlink_priv *priv;
+ struct devlink *devlink;
+ int ret;
+
+ devlink = devlink_alloc(&hclge_devlink_ops,
+ sizeof(struct hclge_devlink_priv));
+ if (!devlink)
+ return -ENOMEM;
+
+ priv = devlink_priv(devlink);
+ priv->hdev = hdev;
+
+ ret = devlink_register(devlink, &pdev->dev);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to register devlink, ret = %d\n",
+ ret);
+ goto out_reg_fail;
+ }
+
+ hdev->devlink = devlink;
+
+ return 0;
+
+out_reg_fail:
+ devlink_free(devlink);
+ return ret;
+}
+
+void hclge_devlink_uninit(struct hclge_dev *hdev)
+{
+ struct devlink *devlink = hdev->devlink;
+
+ if (!devlink)
+ return;
+
+ devlink_unregister(devlink);
+
+ devlink_free(devlink);
+
+ hdev->devlink = NULL;
+}
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.h
new file mode 100644
index 000000000000..918be04507a5
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/* Copyright (c) 2021 Hisilicon Limited. */
+
+#ifndef __HCLGE_DEVLINK_H
+#define __HCLGE_DEVLINK_H
+
+#include "hclge_main.h"
+
+struct hclge_devlink_priv {
+ struct hclge_dev *hdev;
+};
+
+int hclge_devlink_init(struct hclge_dev *hdev);
+void hclge_devlink_uninit(struct hclge_dev *hdev);
+#endif
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index dd3354a57c62..adc20d6a23c3 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -23,6 +23,7 @@
#include "hclge_tm.h"
#include "hclge_err.h"
#include "hnae3.h"
+#include "hclge_devlink.h"
#define HCLGE_NAME "hclge"
#define HCLGE_STATS_READ(p, offset) (*(u64 *)((u8 *)(p) + (offset)))
@@ -11478,10 +11479,14 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)
if (ret)
goto out;
+ ret = hclge_devlink_init(hdev);
+ if (ret)
+ goto err_pci_uninit;
+
/* Firmware command queue initialize */
ret = hclge_cmd_queue_init(hdev);
if (ret)
- goto err_pci_uninit;
+ goto err_devlink_uninit;
/* Firmware command initialize */
ret = hclge_cmd_init(hdev);
@@ -11654,6 +11659,8 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)
pci_free_irq_vectors(pdev);
err_cmd_uninit:
hclge_cmd_uninit(hdev);
+err_devlink_uninit:
+ hclge_devlink_uninit(hdev);
err_pci_uninit:
pcim_iounmap(pdev, hdev->hw.io_base);
pci_clear_master(pdev);
@@ -12044,6 +12051,7 @@ static void hclge_uninit_ae_dev(struct hnae3_ae_dev *ae_dev)
hclge_cmd_uninit(hdev);
hclge_misc_irq_uninit(hdev);
+ hclge_devlink_uninit(hdev);
hclge_pci_uninit(hdev);
mutex_destroy(&hdev->vport_lock);
hclge_uninit_vport_vlan_table(hdev);
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
index 3d3352491dba..cc31b12904ad 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
@@ -8,6 +8,7 @@
#include <linux/phy.h>
#include <linux/if_vlan.h>
#include <linux/kfifo.h>
+#include <net/devlink.h>
#include "hclge_cmd.h"
#include "hclge_ptp.h"
@@ -943,6 +944,7 @@ struct hclge_dev {
cpumask_t affinity_mask;
struct irq_affinity_notify affinity_notify;
struct hclge_ptp *ptp;
+ struct devlink *devlink;
};
/* VPort level vlan tag configuration for TX direction */
--
2.8.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH net-next 3/9] net: hns3: add support for registering devlink for VF
2021-07-12 1:34 [PATCH net-next 0/9] net: hns3: add support devlink Guangbin Huang
2021-07-12 1:34 ` [PATCH net-next 1/9] devlink: add documentation for hns3 driver Guangbin Huang
2021-07-12 1:34 ` [PATCH net-next 2/9] net: hns3: add support for registering devlink for PF Guangbin Huang
@ 2021-07-12 1:34 ` Guangbin Huang
2021-07-12 1:34 ` [PATCH net-next 4/9] net: hns3: add support for devlink get info for PF Guangbin Huang
` (5 subsequent siblings)
8 siblings, 0 replies; 12+ messages in thread
From: Guangbin Huang @ 2021-07-12 1:34 UTC (permalink / raw)
To: davem, kuba, jiri
Cc: netdev, linux-kernel, lipeng321, chenhao288, huangguangbin2
From: Yufeng Mo <moyufeng@huawei.com>
Add devlink register support for HNS3 ethernet VF driver.
Signed-off-by: Yufeng Mo <moyufeng@huawei.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
---
.../net/ethernet/hisilicon/hns3/hns3vf/Makefile | 2 +-
.../hisilicon/hns3/hns3vf/hclgevf_devlink.c | 54 ++++++++++++++++++++++
.../hisilicon/hns3/hns3vf/hclgevf_devlink.h | 15 ++++++
.../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 8 ++++
.../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h | 3 ++
5 files changed, 81 insertions(+), 1 deletion(-)
create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.c
create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.h
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/Makefile b/drivers/net/ethernet/hisilicon/hns3/hns3vf/Makefile
index 2c26ea607a53..51ff7d86ee90 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/Makefile
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/Makefile
@@ -7,4 +7,4 @@ ccflags-y := -I $(srctree)/drivers/net/ethernet/hisilicon/hns3
ccflags-y += -I $(srctree)/$(src)
obj-$(CONFIG_HNS3_HCLGEVF) += hclgevf.o
-hclgevf-objs = hclgevf_main.o hclgevf_cmd.o hclgevf_mbx.o
+hclgevf-objs = hclgevf_main.o hclgevf_cmd.o hclgevf_mbx.o hclgevf_devlink.o
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.c
new file mode 100644
index 000000000000..55337a975981
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.c
@@ -0,0 +1,54 @@
+// SPDX-License-Identifier: GPL-2.0+
+/* Copyright (c) 2021 Hisilicon Limited. */
+
+#include <net/devlink.h>
+
+#include "hclgevf_devlink.h"
+
+static const struct devlink_ops hclgevf_devlink_ops = {
+};
+
+int hclgevf_devlink_init(struct hclgevf_dev *hdev)
+{
+ struct pci_dev *pdev = hdev->pdev;
+ struct hclgevf_devlink_priv *priv;
+ struct devlink *devlink;
+ int ret;
+
+ devlink = devlink_alloc(&hclgevf_devlink_ops,
+ sizeof(struct hclgevf_devlink_priv));
+ if (!devlink)
+ return -ENOMEM;
+
+ priv = devlink_priv(devlink);
+ priv->hdev = hdev;
+
+ ret = devlink_register(devlink, &pdev->dev);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to register devlink, ret = %d\n",
+ ret);
+ goto out_reg_fail;
+ }
+
+ hdev->devlink = devlink;
+
+ return 0;
+
+out_reg_fail:
+ devlink_free(devlink);
+ return ret;
+}
+
+void hclgevf_devlink_uninit(struct hclgevf_dev *hdev)
+{
+ struct devlink *devlink = hdev->devlink;
+
+ if (!devlink)
+ return;
+
+ devlink_unregister(devlink);
+
+ devlink_free(devlink);
+
+ hdev->devlink = NULL;
+}
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.h b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.h
new file mode 100644
index 000000000000..e09ea3d8a963
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/* Copyright (c) 2021 Hisilicon Limited. */
+
+#ifndef __HCLGEVF_DEVLINK_H
+#define __HCLGEVF_DEVLINK_H
+
+#include "hclgevf_main.h"
+
+struct hclgevf_devlink_priv {
+ struct hclgevf_dev *hdev;
+};
+
+int hclgevf_devlink_init(struct hclgevf_dev *hdev);
+void hclgevf_devlink_uninit(struct hclgevf_dev *hdev);
+#endif
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
index 52eaf82b7cd7..1e03c4d16125 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
@@ -8,6 +8,7 @@
#include "hclgevf_main.h"
#include "hclge_mbx.h"
#include "hnae3.h"
+#include "hclgevf_devlink.h"
#define HCLGEVF_NAME "hclgevf"
@@ -3327,6 +3328,10 @@ static int hclgevf_init_hdev(struct hclgevf_dev *hdev)
if (ret)
return ret;
+ ret = hclgevf_devlink_init(hdev);
+ if (ret)
+ goto err_devlink_init;
+
ret = hclgevf_cmd_queue_init(hdev);
if (ret)
goto err_cmd_queue_init;
@@ -3431,6 +3436,8 @@ static int hclgevf_init_hdev(struct hclgevf_dev *hdev)
err_cmd_init:
hclgevf_cmd_uninit(hdev);
err_cmd_queue_init:
+ hclgevf_devlink_uninit(hdev);
+err_devlink_init:
hclgevf_pci_uninit(hdev);
clear_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state);
return ret;
@@ -3452,6 +3459,7 @@ static void hclgevf_uninit_hdev(struct hclgevf_dev *hdev)
}
hclgevf_cmd_uninit(hdev);
+ hclgevf_devlink_uninit(hdev);
hclgevf_pci_uninit(hdev);
hclgevf_uninit_mac_list(hdev);
}
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h
index d7d02848d674..6f222a3a0bf2 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h
@@ -6,6 +6,7 @@
#include <linux/fs.h>
#include <linux/if_vlan.h>
#include <linux/types.h>
+#include <net/devlink.h>
#include "hclge_mbx.h"
#include "hclgevf_cmd.h"
#include "hnae3.h"
@@ -330,6 +331,8 @@ struct hclgevf_dev {
u32 flag;
unsigned long serv_processed_cnt;
unsigned long last_serv_processed;
+
+ struct devlink *devlink;
};
static inline bool hclgevf_is_reset_pending(struct hclgevf_dev *hdev)
--
2.8.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH net-next 4/9] net: hns3: add support for devlink get info for PF
2021-07-12 1:34 [PATCH net-next 0/9] net: hns3: add support devlink Guangbin Huang
` (2 preceding siblings ...)
2021-07-12 1:34 ` [PATCH net-next 3/9] net: hns3: add support for registering devlink for VF Guangbin Huang
@ 2021-07-12 1:34 ` Guangbin Huang
2021-07-12 1:34 ` [PATCH net-next 5/9] net: hns3: add support for devlink get info for VF Guangbin Huang
` (4 subsequent siblings)
8 siblings, 0 replies; 12+ messages in thread
From: Guangbin Huang @ 2021-07-12 1:34 UTC (permalink / raw)
To: davem, kuba, jiri
Cc: netdev, linux-kernel, lipeng321, chenhao288, huangguangbin2
From: Yufeng Mo <moyufeng@huawei.com>
Add devlink get info support for HNS3 ethernet PF driver.
Signed-off-by: Yufeng Mo <moyufeng@huawei.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
---
.../ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c | 30 ++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c
index 03b822b0a8e7..7de423d510c5 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c
@@ -5,7 +5,37 @@
#include "hclge_devlink.h"
+static int hclge_devlink_info_get(struct devlink *devlink,
+ struct devlink_info_req *req,
+ struct netlink_ext_ack *extack)
+{
+#define HCLGE_DEVLINK_FW_STRING_LEN 32
+ struct hclge_devlink_priv *priv = devlink_priv(devlink);
+ char version_str[HCLGE_DEVLINK_FW_STRING_LEN];
+ struct hclge_dev *hdev = priv->hdev;
+ int ret;
+
+ ret = devlink_info_driver_name_put(req, KBUILD_MODNAME);
+ if (ret)
+ return ret;
+
+ snprintf(version_str, sizeof(version_str), "%lu.%lu.%lu.%lu",
+ hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE3_MASK,
+ HNAE3_FW_VERSION_BYTE3_SHIFT),
+ hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE2_MASK,
+ HNAE3_FW_VERSION_BYTE2_SHIFT),
+ hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE1_MASK,
+ HNAE3_FW_VERSION_BYTE1_SHIFT),
+ hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE0_MASK,
+ HNAE3_FW_VERSION_BYTE0_SHIFT));
+
+ return devlink_info_version_running_put(req,
+ DEVLINK_INFO_VERSION_GENERIC_FW,
+ version_str);
+}
+
static const struct devlink_ops hclge_devlink_ops = {
+ .info_get = hclge_devlink_info_get,
};
int hclge_devlink_init(struct hclge_dev *hdev)
--
2.8.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH net-next 5/9] net: hns3: add support for devlink get info for VF
2021-07-12 1:34 [PATCH net-next 0/9] net: hns3: add support devlink Guangbin Huang
` (3 preceding siblings ...)
2021-07-12 1:34 ` [PATCH net-next 4/9] net: hns3: add support for devlink get info for PF Guangbin Huang
@ 2021-07-12 1:34 ` Guangbin Huang
2021-07-12 1:34 ` [PATCH net-next 6/9] net: hns3: add devlink reload support for PF Guangbin Huang
` (3 subsequent siblings)
8 siblings, 0 replies; 12+ messages in thread
From: Guangbin Huang @ 2021-07-12 1:34 UTC (permalink / raw)
To: davem, kuba, jiri
Cc: netdev, linux-kernel, lipeng321, chenhao288, huangguangbin2
From: Yufeng Mo <moyufeng@huawei.com>
Add devlink get info support for HNS3 ethernet VF driver.
Signed-off-by: Yufeng Mo <moyufeng@huawei.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
---
.../hisilicon/hns3/hns3vf/hclgevf_devlink.c | 30 ++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.c
index 55337a975981..49993c8be313 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.c
@@ -5,7 +5,37 @@
#include "hclgevf_devlink.h"
+static int hclgevf_devlink_info_get(struct devlink *devlink,
+ struct devlink_info_req *req,
+ struct netlink_ext_ack *extack)
+{
+#define HCLGEVF_DEVLINK_FW_STRING_LEN 32
+ struct hclgevf_devlink_priv *priv = devlink_priv(devlink);
+ char version_str[HCLGEVF_DEVLINK_FW_STRING_LEN];
+ struct hclgevf_dev *hdev = priv->hdev;
+ int ret;
+
+ ret = devlink_info_driver_name_put(req, KBUILD_MODNAME);
+ if (ret)
+ return ret;
+
+ snprintf(version_str, sizeof(version_str), "%lu.%lu.%lu.%lu",
+ hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE3_MASK,
+ HNAE3_FW_VERSION_BYTE3_SHIFT),
+ hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE2_MASK,
+ HNAE3_FW_VERSION_BYTE2_SHIFT),
+ hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE1_MASK,
+ HNAE3_FW_VERSION_BYTE1_SHIFT),
+ hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE0_MASK,
+ HNAE3_FW_VERSION_BYTE0_SHIFT));
+
+ return devlink_info_version_running_put(req,
+ DEVLINK_INFO_VERSION_GENERIC_FW,
+ version_str);
+}
+
static const struct devlink_ops hclgevf_devlink_ops = {
+ .info_get = hclgevf_devlink_info_get,
};
int hclgevf_devlink_init(struct hclgevf_dev *hdev)
--
2.8.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH net-next 6/9] net: hns3: add devlink reload support for PF
2021-07-12 1:34 [PATCH net-next 0/9] net: hns3: add support devlink Guangbin Huang
` (4 preceding siblings ...)
2021-07-12 1:34 ` [PATCH net-next 5/9] net: hns3: add support for devlink get info for VF Guangbin Huang
@ 2021-07-12 1:34 ` Guangbin Huang
2021-07-12 1:34 ` [PATCH net-next 7/9] net: hns3: add devlink reload support for VF Guangbin Huang
` (2 subsequent siblings)
8 siblings, 0 replies; 12+ messages in thread
From: Guangbin Huang @ 2021-07-12 1:34 UTC (permalink / raw)
To: davem, kuba, jiri
Cc: netdev, linux-kernel, lipeng321, chenhao288, huangguangbin2
From: Hao Chen <chenhao288@hisilicon.com>
Add devlink reload support for HNS3 ethernet PF driver.
Signed-off-by: Hao Chen <chenhao288@hisilicon.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
---
.../ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c | 71 ++++++++++++++++++++++
1 file changed, 71 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c
index 7de423d510c5..facb10aea4e6 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c
@@ -34,8 +34,75 @@ static int hclge_devlink_info_get(struct devlink *devlink,
version_str);
}
+static int hclge_devlink_reload_down(struct devlink *devlink, bool netns_change,
+ enum devlink_reload_action action,
+ enum devlink_reload_limit limit,
+ struct netlink_ext_ack *extack)
+{
+ struct hclge_devlink_priv *priv = devlink_priv(devlink);
+ struct hclge_dev *hdev = priv->hdev;
+ struct hnae3_handle *h = &hdev->vport->nic;
+ struct pci_dev *pdev = hdev->pdev;
+ int ret;
+
+ if (test_bit(HCLGE_STATE_RST_HANDLING, &hdev->state)) {
+ dev_err(&pdev->dev, "reset is handling\n");
+ return -EBUSY;
+ }
+
+ switch (action) {
+ case DEVLINK_RELOAD_ACTION_DRIVER_REINIT:
+ rtnl_lock();
+ ret = hdev->nic_client->ops->reset_notify(h, HNAE3_DOWN_CLIENT);
+ if (ret) {
+ rtnl_unlock();
+ return ret;
+ }
+
+ ret = hdev->nic_client->ops->reset_notify(h,
+ HNAE3_UNINIT_CLIENT);
+ rtnl_unlock();
+ return ret;
+ default:
+ return -EOPNOTSUPP;
+ }
+}
+
+static int hclge_devlink_reload_up(struct devlink *devlink,
+ enum devlink_reload_action action,
+ enum devlink_reload_limit limit,
+ u32 *actions_performed,
+ struct netlink_ext_ack *extack)
+{
+ struct hclge_devlink_priv *priv = devlink_priv(devlink);
+ struct hclge_dev *hdev = priv->hdev;
+ struct hnae3_handle *h = &hdev->vport->nic;
+ int ret;
+
+ *actions_performed = BIT(action);
+ switch (action) {
+ case DEVLINK_RELOAD_ACTION_DRIVER_REINIT:
+ hclge_devlink_get_param_setting(devlink);
+ rtnl_lock();
+ ret = hdev->nic_client->ops->reset_notify(h, HNAE3_INIT_CLIENT);
+ if (ret) {
+ rtnl_unlock();
+ return ret;
+ }
+
+ ret = hdev->nic_client->ops->reset_notify(h, HNAE3_UP_CLIENT);
+ rtnl_unlock();
+ return ret;
+ default:
+ return -EOPNOTSUPP;
+ }
+}
+
static const struct devlink_ops hclge_devlink_ops = {
.info_get = hclge_devlink_info_get,
+ .reload_actions = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT),
+ .reload_down = hclge_devlink_reload_down,
+ .reload_up = hclge_devlink_reload_up,
};
int hclge_devlink_init(struct hclge_dev *hdev)
@@ -62,6 +129,8 @@ int hclge_devlink_init(struct hclge_dev *hdev)
hdev->devlink = devlink;
+ devlink_reload_enable(devlink);
+
return 0;
out_reg_fail:
@@ -76,6 +145,8 @@ void hclge_devlink_uninit(struct hclge_dev *hdev)
if (!devlink)
return;
+ devlink_reload_disable(devlink);
+
devlink_unregister(devlink);
devlink_free(devlink);
--
2.8.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH net-next 7/9] net: hns3: add devlink reload support for VF
2021-07-12 1:34 [PATCH net-next 0/9] net: hns3: add support devlink Guangbin Huang
` (5 preceding siblings ...)
2021-07-12 1:34 ` [PATCH net-next 6/9] net: hns3: add devlink reload support for PF Guangbin Huang
@ 2021-07-12 1:34 ` Guangbin Huang
2021-07-12 1:34 ` [PATCH net-next 8/9] net: hns3: add support for PF setting rx/tx buffer size by devlink param Guangbin Huang
2021-07-12 1:34 ` [PATCH net-next 9/9] net: hns3: add support for VF " Guangbin Huang
8 siblings, 0 replies; 12+ messages in thread
From: Guangbin Huang @ 2021-07-12 1:34 UTC (permalink / raw)
To: davem, kuba, jiri
Cc: netdev, linux-kernel, lipeng321, chenhao288, huangguangbin2
From: Hao Chen <chenhao288@hisilicon.com>
Add devlink reload support for HNS3 ethernet VF driver.
Signed-off-by: Hao Chen <chenhao288@hisilicon.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
---
.../hisilicon/hns3/hns3vf/hclgevf_devlink.c | 72 ++++++++++++++++++++++
1 file changed, 72 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.c
index 49993c8be313..bce598913dc3 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.c
@@ -34,8 +34,76 @@ static int hclgevf_devlink_info_get(struct devlink *devlink,
version_str);
}
+static int hclgevf_devlink_reload_down(struct devlink *devlink,
+ bool netns_change,
+ enum devlink_reload_action action,
+ enum devlink_reload_limit limit,
+ struct netlink_ext_ack *extack)
+{
+ struct hclgevf_devlink_priv *priv = devlink_priv(devlink);
+ struct hclgevf_dev *hdev = priv->hdev;
+ struct hnae3_handle *h = &hdev->nic;
+ struct pci_dev *pdev = hdev->pdev;
+ int ret;
+
+ if (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state)) {
+ dev_err(&pdev->dev, "reset is handling\n");
+ return -EBUSY;
+ }
+
+ switch (action) {
+ case DEVLINK_RELOAD_ACTION_DRIVER_REINIT:
+ rtnl_lock();
+ ret = hdev->nic_client->ops->reset_notify(h, HNAE3_DOWN_CLIENT);
+ if (ret) {
+ rtnl_unlock();
+ return ret;
+ }
+
+ ret = hdev->nic_client->ops->reset_notify(h,
+ HNAE3_UNINIT_CLIENT);
+ rtnl_unlock();
+ return ret;
+ default:
+ return -EOPNOTSUPP;
+ }
+}
+
+static int hclgevf_devlink_reload_up(struct devlink *devlink,
+ enum devlink_reload_action action,
+ enum devlink_reload_limit limit,
+ u32 *actions_performed,
+ struct netlink_ext_ack *extack)
+{
+ struct hclgevf_devlink_priv *priv = devlink_priv(devlink);
+ struct hclgevf_dev *hdev = priv->hdev;
+ struct hnae3_handle *h = &hdev->nic;
+ int ret;
+
+ *actions_performed = BIT(action);
+ switch (action) {
+ case DEVLINK_RELOAD_ACTION_DRIVER_REINIT:
+ hclgevf_devlink_get_param_setting(devlink);
+ rtnl_lock();
+ ret = hdev->nic_client->ops->reset_notify(h, HNAE3_INIT_CLIENT);
+ if (ret) {
+ rtnl_unlock();
+ return ret;
+ }
+
+ ret = hdev->nic_client->ops->reset_notify(h, HNAE3_UP_CLIENT);
+ rtnl_unlock();
+ return ret;
+ default:
+ return -EOPNOTSUPP;
+ }
+}
+
static const struct devlink_ops hclgevf_devlink_ops = {
.info_get = hclgevf_devlink_info_get,
+ .reload_actions = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT),
+ .reload_down = hclgevf_devlink_reload_down,
+ .reload_up = hclgevf_devlink_reload_up,
};
int hclgevf_devlink_init(struct hclgevf_dev *hdev)
@@ -62,6 +130,8 @@ int hclgevf_devlink_init(struct hclgevf_dev *hdev)
hdev->devlink = devlink;
+ devlink_reload_enable(devlink);
+
return 0;
out_reg_fail:
@@ -76,6 +146,8 @@ void hclgevf_devlink_uninit(struct hclgevf_dev *hdev)
if (!devlink)
return;
+ devlink_reload_disable(devlink);
+
devlink_unregister(devlink);
devlink_free(devlink);
--
2.8.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH net-next 8/9] net: hns3: add support for PF setting rx/tx buffer size by devlink param
2021-07-12 1:34 [PATCH net-next 0/9] net: hns3: add support devlink Guangbin Huang
` (6 preceding siblings ...)
2021-07-12 1:34 ` [PATCH net-next 7/9] net: hns3: add devlink reload support for VF Guangbin Huang
@ 2021-07-12 1:34 ` Guangbin Huang
2021-07-12 1:34 ` [PATCH net-next 9/9] net: hns3: add support for VF " Guangbin Huang
8 siblings, 0 replies; 12+ messages in thread
From: Guangbin Huang @ 2021-07-12 1:34 UTC (permalink / raw)
To: davem, kuba, jiri
Cc: netdev, linux-kernel, lipeng321, chenhao288, huangguangbin2
From: Hao Chen <chenhao288@hisilicon.com>
Add support for PF setting rx/tx buffer size by devlink param
Signed-off-by: Hao Chen <chenhao288@hisilicon.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
---
drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 +
drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 8 +-
.../ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c | 88 +++++++++++++++++++++-
.../ethernet/hisilicon/hns3/hns3pf/hclge_devlink.h | 7 ++
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 3 +
5 files changed, 104 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
index e0b7c3c44e7b..14934db9c59a 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
@@ -763,6 +763,7 @@ struct hnae3_knic_private_info {
u16 num_tx_desc;
u16 num_rx_desc;
u32 tx_spare_buf_size;
+ u32 devlink_tx_spare_buf_size;
struct hnae3_tc_info tc_info;
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
index cdb5f14fb6bc..cdb473d26bcc 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
@@ -1037,8 +1037,12 @@ static void hns3_init_tx_spare_buffer(struct hns3_enet_ring *ring)
dma_addr_t dma;
int order;
- alloc_size = tx_spare_buf_size ? tx_spare_buf_size :
- ring->tqp->handle->kinfo.tx_spare_buf_size;
+ if (ring->tqp->handle->kinfo.devlink_tx_spare_buf_size)
+ alloc_size = ring->tqp->handle->kinfo.devlink_tx_spare_buf_size;
+ else if (tx_spare_buf_size)
+ alloc_size = tx_spare_buf_size;
+ else
+ alloc_size = ring->tqp->handle->kinfo.tx_spare_buf_size;
if (!alloc_size)
return;
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c
index facb10aea4e6..0fef8dec5327 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c
@@ -34,6 +34,37 @@ static int hclge_devlink_info_get(struct devlink *devlink,
version_str);
}
+static void hclge_devlink_get_param_setting(struct devlink *devlink)
+{
+ struct hclge_devlink_priv *priv = devlink_priv(devlink);
+ struct hclge_dev *hdev = priv->hdev;
+ struct pci_dev *pdev = hdev->pdev;
+ union devlink_param_value val;
+ int i, ret;
+
+ ret = devlink_param_driverinit_value_get(devlink,
+ HCLGE_DEVLINK_PARAM_ID_RX_BUF_LEN,
+ &val);
+ if (!ret) {
+ hdev->rx_buf_len = val.vu32;
+ hdev->vport->nic.kinfo.rx_buf_len = hdev->rx_buf_len;
+ for (i = 0; i < hdev->num_tqps; i++)
+ hdev->htqp[i].q.buf_size = hdev->rx_buf_len;
+ } else {
+ dev_err(&pdev->dev,
+ "failed to get rx buffer size, ret = %d\n", ret);
+ }
+
+ ret = devlink_param_driverinit_value_get(devlink,
+ HCLGE_DEVLINK_PARAM_ID_TX_BUF_SIZE,
+ &val);
+ if (!ret)
+ hdev->vport->nic.kinfo.devlink_tx_spare_buf_size = val.vu32;
+ else
+ dev_err(&pdev->dev,
+ "failed to get tx buffer size, ret = %d\n", ret);
+}
+
static int hclge_devlink_reload_down(struct devlink *devlink, bool netns_change,
enum devlink_reload_action action,
enum devlink_reload_limit limit,
@@ -105,6 +136,49 @@ static const struct devlink_ops hclge_devlink_ops = {
.reload_up = hclge_devlink_reload_up,
};
+static int hclge_devlink_rx_buffer_size_validate(struct devlink *devlink,
+ u32 id,
+ union devlink_param_value val,
+ struct netlink_ext_ack *extack)
+{
+#define HCLGE_RX_BUF_LEN_2K 2048
+#define HCLGE_RX_BUF_LEN_4K 4096
+
+ if (val.vu32 != HCLGE_RX_BUF_LEN_2K &&
+ val.vu32 != HCLGE_RX_BUF_LEN_4K) {
+ NL_SET_ERR_MSG_MOD(extack, "Supported size is 2048 or 4096");
+ return -EOPNOTSUPP;
+ }
+
+ return 0;
+}
+
+static const struct devlink_param hclge_devlink_params[] = {
+ DEVLINK_PARAM_DRIVER(HCLGE_DEVLINK_PARAM_ID_RX_BUF_LEN,
+ "rx_buffer_len", DEVLINK_PARAM_TYPE_U32,
+ BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
+ NULL, NULL,
+ hclge_devlink_rx_buffer_size_validate),
+ DEVLINK_PARAM_DRIVER(HCLGE_DEVLINK_PARAM_ID_TX_BUF_SIZE,
+ "tx_buffer_size", DEVLINK_PARAM_TYPE_U32,
+ BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
+ NULL, NULL, NULL),
+};
+
+void hclge_devlink_set_params_init_values(struct hclge_dev *hdev)
+{
+ union devlink_param_value value;
+
+ value.vu32 = hdev->rx_buf_len;
+ devlink_param_driverinit_value_set(hdev->devlink,
+ HCLGE_DEVLINK_PARAM_ID_RX_BUF_LEN,
+ value);
+ value.vu32 = hdev->tx_spare_buf_size;
+ devlink_param_driverinit_value_set(hdev->devlink,
+ HCLGE_DEVLINK_PARAM_ID_TX_BUF_SIZE,
+ value);
+}
+
int hclge_devlink_init(struct hclge_dev *hdev)
{
struct pci_dev *pdev = hdev->pdev;
@@ -129,10 +203,20 @@ int hclge_devlink_init(struct hclge_dev *hdev)
hdev->devlink = devlink;
+ ret = devlink_params_register(devlink, hclge_devlink_params,
+ ARRAY_SIZE(hclge_devlink_params));
+ if (ret) {
+ dev_err(&pdev->dev,
+ "failed to register devlink params, ret = %d\n", ret);
+ goto out_param_reg_fail;
+ }
+
devlink_reload_enable(devlink);
return 0;
-
+out_param_reg_fail:
+ hdev->devlink = NULL;
+ devlink_unregister(devlink);
out_reg_fail:
devlink_free(devlink);
return ret;
@@ -147,6 +231,8 @@ void hclge_devlink_uninit(struct hclge_dev *hdev)
devlink_reload_disable(devlink);
+ devlink_params_unregister(devlink, hclge_devlink_params,
+ ARRAY_SIZE(hclge_devlink_params));
devlink_unregister(devlink);
devlink_free(devlink);
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.h
index 918be04507a5..e81402e68aa7 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.h
@@ -6,10 +6,17 @@
#include "hclge_main.h"
+enum hclge_devlink_param_id {
+ HCLGE_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX,
+ HCLGE_DEVLINK_PARAM_ID_RX_BUF_LEN,
+ HCLGE_DEVLINK_PARAM_ID_TX_BUF_SIZE,
+};
+
struct hclge_devlink_priv {
struct hclge_dev *hdev;
};
int hclge_devlink_init(struct hclge_dev *hdev);
+void hclge_devlink_set_params_init_values(struct hclge_dev *hdev);
void hclge_devlink_uninit(struct hclge_dev *hdev);
#endif
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index adc20d6a23c3..fdf14470a846 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -11510,6 +11510,9 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)
goto err_cmd_uninit;
}
+ hclge_devlink_set_params_init_values(hdev);
+ devlink_params_publish(hdev->devlink);
+
ret = hclge_init_msi(hdev);
if (ret) {
dev_err(&pdev->dev, "Init MSI/MSI-X error, ret = %d.\n", ret);
--
2.8.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH net-next 9/9] net: hns3: add support for VF setting rx/tx buffer size by devlink param
2021-07-12 1:34 [PATCH net-next 0/9] net: hns3: add support devlink Guangbin Huang
` (7 preceding siblings ...)
2021-07-12 1:34 ` [PATCH net-next 8/9] net: hns3: add support for PF setting rx/tx buffer size by devlink param Guangbin Huang
@ 2021-07-12 1:34 ` Guangbin Huang
8 siblings, 0 replies; 12+ messages in thread
From: Guangbin Huang @ 2021-07-12 1:34 UTC (permalink / raw)
To: davem, kuba, jiri
Cc: netdev, linux-kernel, lipeng321, chenhao288, huangguangbin2
From: Hao Chen <chenhao288@hisilicon.com>
Add support for VF setting rx/tx buffer size by devlink param
Signed-off-by: Hao Chen <chenhao288@hisilicon.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
---
.../hisilicon/hns3/hns3vf/hclgevf_devlink.c | 88 +++++++++++++++++++++-
.../hisilicon/hns3/hns3vf/hclgevf_devlink.h | 7 ++
.../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 3 +
3 files changed, 97 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.c
index bce598913dc3..4c364055e464 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.c
@@ -34,6 +34,37 @@ static int hclgevf_devlink_info_get(struct devlink *devlink,
version_str);
}
+static void hclgevf_devlink_get_param_setting(struct devlink *devlink)
+{
+ struct hclgevf_devlink_priv *priv = devlink_priv(devlink);
+ struct hclgevf_dev *hdev = priv->hdev;
+ struct pci_dev *pdev = hdev->pdev;
+ union devlink_param_value val;
+ int i, ret;
+
+ ret = devlink_param_driverinit_value_get(devlink,
+ HCLGEVF_DEVLINK_PARAM_ID_RX_BUF_LEN,
+ &val);
+ if (!ret) {
+ hdev->rx_buf_len = val.vu32;
+ hdev->nic.kinfo.rx_buf_len = hdev->rx_buf_len;
+ for (i = 0; i < hdev->num_tqps; i++)
+ hdev->htqp[i].q.buf_size = hdev->rx_buf_len;
+ } else {
+ dev_err(&pdev->dev,
+ "failed to get rx buffer size, ret = %d\n", ret);
+ }
+
+ ret = devlink_param_driverinit_value_get(devlink,
+ HCLGEVF_DEVLINK_PARAM_ID_TX_BUF_SIZE,
+ &val);
+ if (!ret)
+ hdev->nic.kinfo.devlink_tx_spare_buf_size = val.vu32;
+ else
+ dev_err(&pdev->dev,
+ "failed to get tx buffer size, ret = %d\n", ret);
+}
+
static int hclgevf_devlink_reload_down(struct devlink *devlink,
bool netns_change,
enum devlink_reload_action action,
@@ -106,6 +137,49 @@ static const struct devlink_ops hclgevf_devlink_ops = {
.reload_up = hclgevf_devlink_reload_up,
};
+static int
+hclgevf_devlink_rx_buffer_size_validate(struct devlink *devlink, u32 id,
+ union devlink_param_value val,
+ struct netlink_ext_ack *extack)
+{
+#define HCLGEVF_RX_BUF_LEN_2K 2048
+#define HCLGEVF_RX_BUF_LEN_4K 4096
+
+ if (val.vu32 != HCLGEVF_RX_BUF_LEN_2K &&
+ val.vu32 != HCLGEVF_RX_BUF_LEN_4K) {
+ NL_SET_ERR_MSG_MOD(extack, "Supported size is 2048 or 4096");
+ return -EOPNOTSUPP;
+ }
+
+ return 0;
+}
+
+static const struct devlink_param hclgevf_devlink_params[] = {
+ DEVLINK_PARAM_DRIVER(HCLGEVF_DEVLINK_PARAM_ID_RX_BUF_LEN,
+ "rx_buffer_len", DEVLINK_PARAM_TYPE_U32,
+ BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
+ NULL, NULL,
+ hclgevf_devlink_rx_buffer_size_validate),
+ DEVLINK_PARAM_DRIVER(HCLGEVF_DEVLINK_PARAM_ID_TX_BUF_SIZE,
+ "tx_buffer_size", DEVLINK_PARAM_TYPE_U32,
+ BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
+ NULL, NULL, NULL),
+};
+
+void hclgevf_devlink_set_params_init_values(struct hclgevf_dev *hdev)
+{
+ union devlink_param_value value;
+
+ value.vu32 = hdev->rx_buf_len;
+ devlink_param_driverinit_value_set(hdev->devlink,
+ HCLGEVF_DEVLINK_PARAM_ID_RX_BUF_LEN,
+ value);
+ value.vu32 = 0;
+ devlink_param_driverinit_value_set(hdev->devlink,
+ HCLGEVF_DEVLINK_PARAM_ID_TX_BUF_SIZE,
+ value);
+}
+
int hclgevf_devlink_init(struct hclgevf_dev *hdev)
{
struct pci_dev *pdev = hdev->pdev;
@@ -130,10 +204,20 @@ int hclgevf_devlink_init(struct hclgevf_dev *hdev)
hdev->devlink = devlink;
+ ret = devlink_params_register(devlink, hclgevf_devlink_params,
+ ARRAY_SIZE(hclgevf_devlink_params));
+ if (ret) {
+ dev_err(&pdev->dev,
+ "failed to register devlink params, ret = %d\n", ret);
+ goto out_param_reg_fail;
+ }
+
devlink_reload_enable(devlink);
return 0;
-
+out_param_reg_fail:
+ hdev->devlink = NULL;
+ devlink_unregister(devlink);
out_reg_fail:
devlink_free(devlink);
return ret;
@@ -148,6 +232,8 @@ void hclgevf_devlink_uninit(struct hclgevf_dev *hdev)
devlink_reload_disable(devlink);
+ devlink_params_unregister(devlink, hclgevf_devlink_params,
+ ARRAY_SIZE(hclgevf_devlink_params));
devlink_unregister(devlink);
devlink_free(devlink);
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.h b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.h
index e09ea3d8a963..2159ec4a3523 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.h
@@ -6,10 +6,17 @@
#include "hclgevf_main.h"
+enum hclgevf_devlink_param_id {
+ HCLGEVF_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX,
+ HCLGEVF_DEVLINK_PARAM_ID_RX_BUF_LEN,
+ HCLGEVF_DEVLINK_PARAM_ID_TX_BUF_SIZE,
+};
+
struct hclgevf_devlink_priv {
struct hclgevf_dev *hdev;
};
+void hclgevf_devlink_set_params_init_values(struct hclgevf_dev *hdev);
int hclgevf_devlink_init(struct hclgevf_dev *hdev);
void hclgevf_devlink_uninit(struct hclgevf_dev *hdev);
#endif
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
index 1e03c4d16125..ce7d652594e1 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
@@ -3374,6 +3374,9 @@ static int hclgevf_init_hdev(struct hclgevf_dev *hdev)
goto err_config;
}
+ hclgevf_devlink_set_params_init_values(hdev);
+ devlink_params_publish(hdev->devlink);
+
ret = hclgevf_alloc_tqps(hdev);
if (ret) {
dev_err(&pdev->dev, "failed(%d) to allocate TQPs\n", ret);
--
2.8.1
^ permalink raw reply related [flat|nested] 12+ messages in thread