* [PATCH] clk: rockchip: add clock flag parameter when register pll
@ 2016-07-22 6:37 Lin Huang
2016-08-08 20:31 ` Heiko Stübner
0 siblings, 1 reply; 2+ messages in thread
From: Lin Huang @ 2016-07-22 6:37 UTC (permalink / raw)
To: heiko
Cc: mturquette, sboyd, linux-clk, linux-arm-kernel, linux-rockchip,
linux-kernel, Lin Huang
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From: Heiko Stübner <heiko@sntech.de>
add clock flag parameter so we can pass specific clock flag
(like CLK_GET_RATE_NOCACHE etc..)to pll driver.
Change-Id: I1e076b3efa6b5da082b6e68e2e2a4c9dfd93e3d4
Signed-off-by: Heiko Stübner <heiko@sntech.de>
Signed-off-by: Lin Huang <hl@rock-chips.com>
---
drivers/clk/rockchip/clk-pll.c | 4 ++--
drivers/clk/rockchip/clk.c | 2 +-
drivers/clk/rockchip/clk.h | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c
index db81e45..9c1373e 100644
--- a/drivers/clk/rockchip/clk-pll.c
+++ b/drivers/clk/rockchip/clk-pll.c
@@ -837,7 +837,7 @@ struct clk *rockchip_clk_register_pll(struct rockchip_clk_provider *ctx,
u8 num_parents, int con_offset, int grf_lock_offset,
int lock_shift, int mode_offset, int mode_shift,
struct rockchip_pll_rate_table *rate_table,
- u8 clk_pll_flags)
+ unsigned long flags, u8 clk_pll_flags)
{
const char *pll_parents[3];
struct clk_init_data init;
@@ -892,7 +892,7 @@ struct clk *rockchip_clk_register_pll(struct rockchip_clk_provider *ctx,
init.name = pll_name;
/* keep all plls untouched for now */
- init.flags = CLK_IGNORE_UNUSED;
+ init.flags = flags | CLK_IGNORE_UNUSED;
init.parent_names = &parent_names[0];
init.num_parents = 1;
diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c
index 7ffd134..1f1c74f 100644
--- a/drivers/clk/rockchip/clk.c
+++ b/drivers/clk/rockchip/clk.c
@@ -385,7 +385,7 @@ void __init rockchip_clk_register_plls(struct rockchip_clk_provider *ctx,
list->con_offset, grf_lock_offset,
list->lock_shift, list->mode_offset,
list->mode_shift, list->rate_table,
- list->pll_flags);
+ list->flags, list->pll_flags);
if (IS_ERR(clk)) {
pr_err("%s: failed to register clock %s\n", __func__,
list->name);
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
index 2194ffa..3747de5 100644
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
@@ -238,7 +238,7 @@ struct clk *rockchip_clk_register_pll(struct rockchip_clk_provider *ctx,
u8 num_parents, int con_offset, int grf_lock_offset,
int lock_shift, int mode_offset, int mode_shift,
struct rockchip_pll_rate_table *rate_table,
- u8 clk_pll_flags);
+ unsigned long flags, u8 clk_pll_flags);
struct rockchip_cpuclk_clksel {
int reg;
--
2.6.6
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] clk: rockchip: add clock flag parameter when register pll
2016-07-22 6:37 [PATCH] clk: rockchip: add clock flag parameter when register pll Lin Huang
@ 2016-08-08 20:31 ` Heiko Stübner
0 siblings, 0 replies; 2+ messages in thread
From: Heiko Stübner @ 2016-08-08 20:31 UTC (permalink / raw)
To: Lin Huang
Cc: mturquette, sboyd, linux-clk, linux-arm-kernel, linux-rockchip,
linux-kernel
Am Freitag, 22. Juli 2016, 14:37:45 schrieb Lin Huang:
> From: Heiko Stübner <heiko@sntech.de>
>
> add clock flag parameter so we can pass specific clock flag
> (like CLK_GET_RATE_NOCACHE etc..)to pll driver.
>
> Change-Id: I1e076b3efa6b5da082b6e68e2e2a4c9dfd93e3d4
> Signed-off-by: Heiko Stübner <heiko@sntech.de>
> Signed-off-by: Lin Huang <hl@rock-chips.com>
just so it doesn't get overlooked, this patch was also part of the later ddr-
clock series and I picked it from there,
^ permalink raw reply [flat|nested] 2+ messages in thread
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