From: Kewei Xu <kewei.xu@mediatek.com>
To: <wsa@the-dreams.de>
Cc: <matthias.bgg@gmail.com>, <robh+dt@kernel.org>,
<linux-i2c@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>,
<srv_heupstream@mediatek.com>, <leilk.liu@mediatek.com>,
<qii.wang@mediatek.com>, <liguo.zhang@mediatek.com>,
<caiyu.chen@mediatek.com>, <ot_daolong.zhu@mediatek.com>,
<yuhan.wei@mediatek.com>, <kewei.xu@mediatek.com>
Subject: [RESEND PATCH v5 5/7] i2c: mediatek: Add OFFSET_EXT_CONF setting back
Date: Tue, 24 Aug 2021 11:30:26 +0800 [thread overview]
Message-ID: <1629775828-19993-6-git-send-email-kewei.xu@mediatek.com> (raw)
In-Reply-To: <1629775828-19993-1-git-send-email-kewei.xu@mediatek.com>
In the commit be5ce0e97cc7 ("i2c: mediatek: Add i2c ac-timing adjust
support"), we miss setting OFFSET_EXT_CONF register if
i2c->dev_comp->timing_adjust is false, now add it back.
Fixes: be5ce0e97cc7 ("i2c: mediatek: Add i2c ac-timing adjust support")
Signed-off-by: Kewei Xu <kewei.xu@mediatek.com>
---
drivers/i2c/busses/i2c-mt65xx.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index 633bce4..4da6b43 100644
--- a/drivers/i2c/busses/i2c-mt65xx.c
+++ b/drivers/i2c/busses/i2c-mt65xx.c
@@ -42,6 +42,8 @@
#define I2C_HANDSHAKE_RST 0x0020
#define I2C_FIFO_ADDR_CLR 0x0001
#define I2C_DELAY_LEN 0x0002
+#define I2C_ST_START_CON 0x8001
+#define I2C_FS_START_CON 0x1800
#define I2C_TIME_CLR_VALUE 0x0000
#define I2C_TIME_DEFAULT_VALUE 0x0003
#define I2C_WRRD_TRANAC_VALUE 0x0002
@@ -486,6 +488,7 @@ static void mtk_i2c_init_hw(struct mtk_i2c *i2c)
{
u16 control_reg;
u16 intr_stat_reg;
+ u16 ext_conf_val;
mtk_i2c_writew(i2c, I2C_CHN_CLR_FLAG, OFFSET_START);
intr_stat_reg = mtk_i2c_readw(i2c, OFFSET_INTR_STAT);
@@ -524,8 +527,13 @@ static void mtk_i2c_init_hw(struct mtk_i2c *i2c)
if (i2c->dev_comp->ltiming_adjust)
mtk_i2c_writew(i2c, i2c->ltiming_reg, OFFSET_LTIMING);
+ if (i2c->speed_hz <= I2C_MAX_STANDARD_MODE_FREQ)
+ ext_conf_val = I2C_ST_START_CON;
+ else
+ ext_conf_val = I2C_FS_START_CON;
+
if (i2c->dev_comp->timing_adjust) {
- mtk_i2c_writew(i2c, i2c->ac_timing.ext, OFFSET_EXT_CONF);
+ ext_conf_val = i2c->ac_timing.ext;
mtk_i2c_writew(i2c, i2c->ac_timing.inter_clk_div,
OFFSET_CLOCK_DIV);
mtk_i2c_writew(i2c, I2C_SCL_MIS_COMP_VALUE,
@@ -550,6 +558,7 @@ static void mtk_i2c_init_hw(struct mtk_i2c *i2c)
OFFSET_HS_STA_STO_AC_TIMING);
}
}
+ mtk_i2c_writew(i2c, ext_conf_val, OFFSET_EXT_CONF);
/* If use i2c pin from PMIC mt6397 side, need set PATH_DIR first */
if (i2c->have_pmic)
--
1.9.1
next prev parent reply other threads:[~2021-08-24 3:30 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-24 3:30 [RESEND PATCH v5 0/7] Introducing an attribute to select the time setting Kewei Xu
2021-08-24 3:30 ` [RESEND PATCH v5 1/7] i2c: mediatek: fixing the incorrect register offset Kewei Xu
2021-08-24 3:30 ` [RESEND PATCH v5 2/7] i2c: mediatek: Reset the handshake signal between i2c and dma Kewei Xu
2021-08-24 3:30 ` [RESEND PATCH v5 3/7] i2c: mediatek: Dump i2c/dma register when a timeout occurs Kewei Xu
2021-08-24 3:30 ` [RESEND PATCH v5 4/7] dt-bindings: i2c: add attribute use-default-timing Kewei Xu
2021-08-24 16:52 ` Rob Herring
2021-08-24 3:30 ` Kewei Xu [this message]
2021-08-24 3:30 ` [RESEND PATCH v5 6/7] i2c: mediatek: Isolate speed setting via dts for special devices Kewei Xu
2021-08-24 3:30 ` [RESEND PATCH v5 7/7] i2c: mediatek: modify bus speed calculation formula Kewei Xu
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