From: Richard Zhu <hongxing.zhu@nxp.com>
To: l.stach@pengutronix.de, tharvey@gateworks.com, kishon@ti.com,
vkoul@kernel.org, robh@kernel.org, galak@kernel.crashing.org,
shawnguo@kernel.org
Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@pengutronix.de,
linux-imx@nxp.com, Richard Zhu <hongxing.zhu@nxp.com>
Subject: [PATCH v3 7/9] arm64: dts: imx8mm: add the pcie support
Date: Tue, 12 Oct 2021 16:41:16 +0800 [thread overview]
Message-ID: <1634028078-2387-8-git-send-email-hongxing.zhu@nxp.com> (raw)
In-Reply-To: <1634028078-2387-1-git-send-email-hongxing.zhu@nxp.com>
Add the PCIe support on i.MX8MM platforms.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 33 ++++++++++++++++++++++-
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index ac5d11466608..e4819a811da8 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -520,7 +520,7 @@ iomuxc: pinctrl@30330000 {
};
gpr: iomuxc-gpr@30340000 {
- compatible = "fsl,imx8mm-iomuxc-gpr", "syscon";
+ compatible = "fsl,imx8mm-iomuxc-gpr", "fsl,imx6q-iomuxc-gpr", "syscon";
reg = <0x30340000 0x10000>;
};
@@ -1179,6 +1179,37 @@ gpmi: nand-controller@33002000{
status = "disabled";
};
+ pcie0: pcie@33800000 {
+ compatible = "fsl,imx8mm-pcie";
+ reg = <0x33800000 0x400000>, <0x1ff00000 0x80000>;
+ reg-names = "dbi", "config";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ bus-range = <0x00 0xff>;
+ ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000 /* downstream I/O 64KB */
+ 0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */
+ num-lanes = <1>;
+ num-viewport = <4>;
+ interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "msi";
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0x7>;
+ interrupt-map = <0 0 0 1 &gic GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 2 &gic GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 3 &gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 4 &gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ fsl,max-link-speed = <2>;
+ linux,pci-domain = <0>;
+ power-domains = <&pgc_pcie>;
+ resets = <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>,
+ <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>;
+ reset-names = "apps", "turnoff";
+ phys = <&pcie_phy>;
+ phy-names = "pcie-phy";
+ status = "disabled";
+ };
+
gpu_3d: gpu@38000000 {
compatible = "vivante,gc";
reg = <0x38000000 0x8000>;
--
2.25.1
next prev parent reply other threads:[~2021-10-12 9:06 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-12 8:41 [PATCH v3 0/9] add the imx8m pcie phy driver and imx8mm pcie support Richard Zhu
2021-10-12 8:41 ` [PATCH v3 1/9] dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy Richard Zhu
2021-10-12 8:41 ` [PATCH v3 2/9] dt-bindings: phy: add imx8 pcie phy driver support Richard Zhu
2021-10-12 13:18 ` Rob Herring
2021-10-12 23:46 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 3/9] arm64: dts: imx8mm: add the pcie phy support Richard Zhu
2021-10-15 18:30 ` Lucas Stach
2021-10-22 1:57 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 4/9] arm64: dts: imx8mm-evk: " Richard Zhu
2021-10-15 18:32 ` Lucas Stach
2021-10-22 1:58 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 5/9] phy: freescale: pcie: initialize the imx8 pcie standalone phy driver Richard Zhu
2021-10-15 18:55 ` Lucas Stach
2021-10-22 4:30 ` Richard Zhu
2021-10-21 16:00 ` Tim Harvey
2021-10-22 0:54 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 6/9] dt-bindings: imx6q-pcie: Add PHY phandles and name properties Richard Zhu
2021-10-18 19:18 ` Rob Herring
2021-10-22 2:04 ` Richard Zhu
2021-10-12 8:41 ` Richard Zhu [this message]
2021-10-12 8:41 ` [PATCH v3 8/9] arm64: dts: imx8mm-evk: add the pcie support on imx8mm evk board Richard Zhu
2021-10-15 19:03 ` Lucas Stach
2021-10-22 2:07 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 9/9] PCI: imx: add the imx8mm pcie support Richard Zhu
2021-10-13 12:45 ` Matthias Schiffer
2021-10-14 1:20 ` Richard Zhu
2021-10-15 19:00 ` Lucas Stach
2021-10-22 2:06 ` Richard Zhu
2021-10-15 19:58 ` [PATCH v3 0/9] add the imx8m pcie phy driver and " Tim Harvey
2021-10-19 2:10 ` Richard Zhu
2021-10-19 15:52 ` Tim Harvey
2021-10-20 2:10 ` Richard Zhu
2021-10-20 21:22 ` Tim Harvey
2021-10-21 3:32 ` Richard Zhu
2021-10-21 16:25 ` Tim Harvey
2021-10-22 0:43 ` Richard Zhu
2021-10-22 15:59 ` Tim Harvey
2021-10-22 16:55 ` Tim Harvey
2021-10-25 2:12 ` Richard Zhu
2021-10-25 7:23 ` Richard Zhu
2021-10-25 17:14 ` Tim Harvey
2021-10-26 5:41 ` Richard Zhu
2021-10-26 16:06 ` Tim Harvey
2021-10-27 6:18 ` Richard Zhu
2021-10-27 15:40 ` Tim Harvey
2021-10-28 1:51 ` Richard Zhu
2021-10-26 15:56 ` Marcel Ziswiler
2021-10-27 1:39 ` Richard Zhu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1634028078-2387-8-git-send-email-hongxing.zhu@nxp.com \
--to=hongxing.zhu@nxp.com \
--cc=devicetree@vger.kernel.org \
--cc=galak@kernel.crashing.org \
--cc=kernel@pengutronix.de \
--cc=kishon@ti.com \
--cc=l.stach@pengutronix.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-imx@nxp.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=robh@kernel.org \
--cc=shawnguo@kernel.org \
--cc=tharvey@gateworks.com \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).