* [PATCH v6 00/10] Add support for DMA2D of STMicroelectronics STM32 Soc series @ 2021-10-19 8:43 Dillon Min 2021-10-19 8:43 ` [PATCH v6 01/10] media: admin-guide: add stm32-dma2d description Dillon Min ` (9 more replies) 0 siblings, 10 replies; 14+ messages in thread From: Dillon Min @ 2021-10-19 8:43 UTC (permalink / raw) To: mchehab, mchehab+huawei, hverkuil-cisco, ezequiel, gnurou, pihsun, mcoquelin.stm32, alexandre.torgue, mturquette, sboyd, robh+dt, gabriel.fernandez, gabriel.fernandez Cc: patrice.chotard, hugues.fruchet, linux-media, linux-kernel, linux-stm32, linux-arm-kernel, linux-clk, devicetree This patchset introduces a basic support for DMA2D Interface of STMicroelectronics STM32 SoC series. This first basic support implements R2M, M2M, M2M_PFC M2M_BLEND support will be added later on. This has been tested on STM32469-DISCO board. history v6: - use 2592x2592 instead of 0x3fff, 0xffff. [PATCH v6 10/10] - add space in '(V4L2_CID_BASE+43)' to avoid checkpatch warrnings. [PATCH v6 08/10] v5 link: https://lore.kernel.org/lkml/1634533488-25334-1-git-send-email-dillon.minfei@gmail.com/ v5: - rebase to media_tree https://git.linuxtv.org/media_tree.git/ - remove unused log from dma2d driver to avoid spam kernel log. - fix 0xFFFFFF to 0xffffff, 2^24 to 2^24 -1, etc. - introduce patch "media: v4l2-ctrls: Add V4L2_CID_COLORFX_CBCR max setting" to add V4L2_CID_COLORFX_CBCR entry. - thanks to Hans's patch, open nullptr check in v4l2-compliance, update new test result. thanks. https://lore.kernel.org/linux-media/3acd9ee4-5a58-6ed4-17fe-61596a5252b8@xs4all.nl/ v4 link: https://lore.kernel.org/lkml/bc8e1cd1-0013-9062-88b6-fddca535919f@xs4all.nl/ v4: - replace V4L2_COLORFX_SET_ARGB, V4L2_CID_COLORFX_ARGB to V4L2_COLORFX_SET_RGB, V4L2_CID_COLORFX_RGB since Alpha paramter not used in current. thanks Hans. v3 link: https://lore.kernel.org/lkml/1633689012-14492-1-git-send-email-dillon.minfei@gmail.com/ v3: - use V4L2_COLORFX_SET_ARGB, V4L2_CID_COLORFX_ARGB to pass argb paramter to the dma2d driver, instead of add stm32 private ioctl. - some v2's patch are removed in this version. - "[PATCH v2 7/9] media: docs: add doc for the stm32 dma2d driver" - "[PATCH v2 8/9] media: v4l: uapi: Add user control base for stm32 dma2d controls" - dma2d's driver changes based on Hans's review result. detail can be found at "media: stm32-dma2d: STM32 DMA2D driver" - add stm32 clk drivers bugfix, ltdc clock disabled after kenerl boot up. v3 based on kernel and v4l-utils git: kernel: commit 9e1ff307c779ce1f0f810c7ecce3d95bbae40896 Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Sun Oct 3 14:08:47 2021 -0700 Linux 5.15-rc4 v4l-utils: commit 700f5ded9c6de2c6dfe5d1b453d85566f95b4f0c Author: Hans Verkuil <hverkuil-cisco@xs4all.nl> Date: Sat Oct 2 11:01:05 2021 +0200 test-media: show version info earlier and show cmd args Log the version info earlier and also log the command line arguments. Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> v2 link: https://lore.kernel.org/lkml/1626341068-20253-11-git-send-email-dillon.minfei@gmail.com/ v2: - update v4l2-compliance to SHA: a4f2e3a6f306 2021-07-13 08:04:15 the test results at below [1]. - introduce Documentation/userspace-api/media/drivers/stm32-uapi.rst to explain the detail of dma2d's ioctl. - reserved 16 ioctls from v4l2-controls.h for stm32, introduce stm32-media.h. - collect Reviewed-by tag from Rob Herring. - update dma2d driver from Hans's review. the details can be found at related patches. v1 link: https://lore.kernel.org/lkml/1621508727-24486-1-git-send-email-dillon.minfei@gmail.com/ v1: The commit based on kernel(master): c3d0e3fd41b7f0f5d5d5b6022ab7e813f04ea727 Note for v4l2-compliance tool on nu-mmu platform: I add two change based on v4l-utils since commit: f0c7e3d71eaf4182bae7eb3ee0e43b4eeb047ea9 - change fork() to vfork() in v4l2-test-controls.cpp since no-mmu platform don't include fork(). with v4l2-compliance test log (with above modification): since the stm32f469-disco ram limitation, there are 25 failed on dma_alloc_coherent() Really appreciate if someone can help to test this patch on the STM32429I-EVAL evaluation board (https://www.st.com/en/evaluation-tools/stm32429i-eval.html) 8M x 32-bit SDRAM, 1M x 16-bit SRAM and 8M x 16-bit NOR Flash ~ # free total used free shared buff/cache available Mem: 15648 4076 8260 0 3312 7632 ~ # v4l2-compliance -f -d /dev/video0 > /dev/ttyprintk [ 234.919026] [U] v4l2-compliance 1.21.0-4855, 32 bits, 32-bit time_t [ 235.880625] [U] v4l2-compliance SHA: 700f5ded9c6d 2021-10-02 09:01:05 [ 236.877059] [U] Compliance test for stm-dma2d device /dev/video0: [ 237.835965] [U] Driver Info: [ 238.311502] [U] Driver name : stm-dma2d [ 238.787381] [U] Card type : stm-dma2d [ 239.255574] [U] Bus info : platform:stm-dma2d [ 239.722920] [U] Driver version : 5.15.0 [ 240.183388] [U] Capabilities : 0x84208000 [ 240.640809] [U] Video Memory-to-Memory [ 241.095669] [U] Streaming [ 241.540812] [U] Extended Pix Format [ 241.978288] [U] Device Capabilities [ 242.409891] [U] Device Caps : 0x04208000 [ 242.841150] [U] Video Memory-to-Memory [ 243.265246] [U] Streaming [ 243.680040] [U] Extended Pix Format [ 244.092896] [U] Required ioctls: [ 244.499208] [U] test VIDIOC_QUERYCAP: OK [ 244.943985] [U] test invalid ioctls: OK [ 245.346521] [U] Allow for multiple opens: [ 245.749312] [U] test second /dev/video0 open: OK [ 246.526863] [U] test VIDIOC_QUERYCAP: OK [ 246.929589] [U] test VIDIOC_G/S_PRIORITY: OK [ 247.548185] [U] test for unlimited opens: OK [ 247.936192] [U] Debug ioctls: [ 248.311265] [U] test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported) [ 249.058547] [U] test VIDIOC_LOG_STATUS: OK (Not Supported) [ 249.802868] [U] Input ioctls: [ 250.173701] [U] test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported) [ 250.914653] [U] test VIDIOC_G/S_FREQUENCY: OK (Not Supported) [ 251.657517] [U] test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported) [ 252.408231] [U] test VIDIOC_ENUMAUDIO: OK (Not Supported) [ 253.166559] [U] test VIDIOC_G/S/ENUMINPUT: OK (Not Supported) [ 253.933560] [U] test VIDIOC_G/S_AUDIO: OK (Not Supported) [ 254.695551] [U] Inputs: 0 Audio Inputs: 0 Tuners: 0 [ 255.082805] [U] Output ioctls: [ 255.462189] [U] test VIDIOC_G/S_MODULATOR: OK (Not Supported) [ 256.218699] [U] test VIDIOC_G/S_FREQUENCY: OK (Not Supported) [ 256.997586] [U] test VIDIOC_ENUMAUDOUT: OK (Not Supported) [ 257.796012] [U] test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported) [ 258.609978] [U] test VIDIOC_G/S_AUDOUT: OK (Not Supported) [ 259.453435] [U] Outputs: 0 Audio Outputs: 0 Modulators: 0 [ 260.303571] [U] Input/Output configuration ioctls: [ 260.741454] [U] test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported) [ 261.618607] [U] test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported) [ 262.517280] [U] test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported) [ 263.427620] [U] test VIDIOC_G/S_EDID: OK (Not Supported) [ 264.344630] [U] Control ioctls: [ 264.833262] [U] test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK [ 265.763394] [U] test VIDIOC_QUERYCTRL: OK [ 266.247635] [U] test VIDIOC_G/S_CTRL: OK [ 266.730244] [U] test VIDIOC_G/S/TRY_EXT_CTRLS: OK [ 267.651495] [U] test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK [ 268.573048] [U] test VIDIOC_G/S_JPEGCOMP: OK (Not Supported) [ 269.503304] [U] Standard Controls: 3 Private Controls: 0 [ 269.976154] [U] Format ioctls: [ 270.458701] [U] test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK [ 271.395051] [U] test VIDIOC_G/S_PARM: OK (Not Supported) [ 272.316304] [U] test VIDIOC_G_FBUF: OK (Not Supported) [ 273.242824] [U] test VIDIOC_G_FMT: OK [ 273.719213] [U] test VIDIOC_TRY_FMT: OK [ 274.187524] [U] test VIDIOC_S_FMT: OK [ 274.643930] [U] test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported) [ 275.547089] [U] test Cropping: OK (Not Supported) [ 276.446375] [U] test Composing: OK (Not Supported) [ 277.347458] [U] test Scaling: OK [ 277.800218] [U] Codec ioctls: [ 278.245926] [U] test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported) [ 279.140451] [U] test VIDIOC_G_ENC_INDEX: OK (Not Supported) [ 280.023765] [U] test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported) [ 280.910844] [U] Buffer ioctls: [ 281.466649] [U] test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK [ 282.381634] [U] test VIDIOC_EXPBUF: OK [ 282.830946] [U] test Requests: OK (Not Supported) [ 283.698629] [U] test TIME32/64: OK [ 284.157170] [U] Test input 0: [ 284.594093] [U] Stream using all formats: [ 288.379647] [U] [ 289.111860] [U] Video Capture: Captured 8 buffers [ 289.487473] [U] BA24 (32-bit ARGB 8-8-8-8) 1x1 -> BA24 (32-bit ARGB 8-8-8-8) 1x1: OK [ 293.012687] [U] [ 293.629532] [U] Video Capture: Captured 8 buffers [ 293.947618] [U] BA24 (32-bit ARGB 8-8-8-8) 1x1 -> RGB3 (24-bit RGB 8-8-8) 1x1: OK [ 296.900762] [U] [ 297.387693] [U] Video Capture: Captured 8 buffers [ 297.643353] [U] BA24 (32-bit ARGB 8-8-8-8) 1x1 -> RGBP (16-bit RGB 5-6-5) 1x1: OK [ 299.994539] [U] [ 300.426567] [U] Video Capture: Captured 8 buffers [ 300.669991] [U] BA24 (32-bit ARGB 8-8-8-8) 1x1 -> AR15 (16-bit ARGB 1-5-5-5) 1x1: OK [ 303.087504] [U] [ 303.519269] [U] Video Capture: Captured 8 buffers [ 303.757695] [U] BA24 (32-bit ARGB 8-8-8-8) 1x1 -> AR12 (16-bit ARGB 4-4-4-4) 1x1: OK [ 304.244993] stm-dma2d 4002b000.dma2d: dma alloc of size 26873856 failed [ 304.745438] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 305.257392] [U] BA24 (32-bit ARGB 8-8-8-8) 2592x2592 -> BA24 (32-bit ARGB 8-8-8-8) 2592x2592: FAIL [ 305.781175] stm-dma2d 4002b000.dma2d: dma alloc of size 26873856 failed [ 306.321901] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 306.902217] [U] BA24 (32-bit ARGB 8-8-8-8) 2592x2592 -> RGB3 (24-bit RGB 8-8-8) 2592x2592: FAIL [ 307.528929] stm-dma2d 4002b000.dma2d: dma alloc of size 26873856 failed [ 308.174441] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 308.848959] [U] BA24 (32-bit ARGB 8-8-8-8) 2592x2592 -> RGBP (16-bit RGB 5-6-5) 2592x2592: FAIL [ 309.535999] stm-dma2d 4002b000.dma2d: dma alloc of size 26873856 failed [ 310.217444] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 310.943592] [U] BA24 (32-bit ARGB 8-8-8-8) 2592x2592 -> AR15 (16-bit ARGB 1-5-5-5) 2592x2592: FAIL [ 311.713854] stm-dma2d 4002b000.dma2d: dma alloc of size 26873856 failed [ 312.508128] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 313.338010] [U] BA24 (32-bit ARGB 8-8-8-8) 2592x2592 -> AR12 (16-bit ARGB 4-4-4-4) 2592x2592: FAIL [ 317.675312] [U] [ 318.494207] [U] Video Capture: Captured 8 buffers [ 318.931776] [U] BA24 (32-bit ARGB 8-8-8-8) 240x320 -> BA24 (32-bit ARGB 8-8-8-8) 240x320: OK [ 323.087768] [U] [ 323.775244] [U] Video Capture: Captured 8 buffers [ 324.126855] [U] BA24 (32-bit ARGB 8-8-8-8) 240x320 -> RGB3 (24-bit RGB 8-8-8) 240x320: OK [ 327.479277] [U] [ 328.005695] [U] Video Capture: Captured 8 buffers [ 328.284117] [U] BA24 (32-bit ARGB 8-8-8-8) 240x320 -> RGBP (16-bit RGB 5-6-5) 240x320: OK [ 330.830015] [U] [ 331.260303] [U] Video Capture: Captured 8 buffers [ 331.497654] [U] BA24 (32-bit ARGB 8-8-8-8) 240x320 -> AR15 (16-bit ARGB 1-5-5-5) 240x320: OK [ 334.011389] [U] [ 334.440311] [U] Video Capture: Captured 8 buffers [ 334.677829] [U] BA24 (32-bit ARGB 8-8-8-8) 240x320 -> AR12 (16-bit ARGB 4-4-4-4) 240x320: OK [ 337.086566] [U] [ 337.517015] [U] Video Capture: Captured 8 buffers [ 337.756281] [U] RGB3 (24-bit RGB 8-8-8) 1x1 -> BA24 (32-bit ARGB 8-8-8-8) 1x1: OK [ 340.148849] [U] [ 340.579169] [U] Video Capture: Captured 8 buffers [ 340.823597] [U] RGB3 (24-bit RGB 8-8-8) 1x1 -> RGB3 (24-bit RGB 8-8-8) 1x1: OK [ 343.230816] [U] [ 343.661231] [U] Video Capture: Captured 8 buffers [ 343.899455] [U] RGB3 (24-bit RGB 8-8-8) 1x1 -> RGBP (16-bit RGB 5-6-5) 1x1: OK [ 346.276450] [U] [ 346.707406] [U] Video Capture: Captured 8 buffers [ 346.950489] [U] RGB3 (24-bit RGB 8-8-8) 1x1 -> AR15 (16-bit ARGB 1-5-5-5) 1x1: OK [ 349.363029] [U] [ 349.794791] [U] Video Capture: Captured 8 buffers [ 350.034303] [U] RGB3 (24-bit RGB 8-8-8) 1x1 -> AR12 (16-bit ARGB 4-4-4-4) 1x1: OK [ 350.526018] stm-dma2d 4002b000.dma2d: dma alloc of size 20156416 failed [ 351.023695] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 351.536683] [U] RGB3 (24-bit RGB 8-8-8) 2592x2592 -> BA24 (32-bit ARGB 8-8-8-8) 2592x2592: FAIL [ 352.060944] stm-dma2d 4002b000.dma2d: dma alloc of size 20156416 failed [ 352.603734] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 353.185847] [U] RGB3 (24-bit RGB 8-8-8) 2592x2592 -> RGB3 (24-bit RGB 8-8-8) 2592x2592: FAIL [ 353.814453] stm-dma2d 4002b000.dma2d: dma alloc of size 20156416 failed [ 354.463286] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 355.138479] [U] RGB3 (24-bit RGB 8-8-8) 2592x2592 -> RGBP (16-bit RGB 5-6-5) 2592x2592: FAIL [ 355.826797] stm-dma2d 4002b000.dma2d: dma alloc of size 20156416 failed [ 356.510828] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 357.237230] [U] RGB3 (24-bit RGB 8-8-8) 2592x2592 -> AR15 (16-bit ARGB 1-5-5-5) 2592x2592: FAIL [ 358.008304] stm-dma2d 4002b000.dma2d: dma alloc of size 20156416 failed [ 358.803816] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 359.630589] [U] RGB3 (24-bit RGB 8-8-8) 2592x2592 -> AR12 (16-bit ARGB 4-4-4-4) 2592x2592: FAIL [ 363.960327] [U] [ 364.781066] [U] Video Capture: Captured 8 buffers [ 365.214046] [U] RGB3 (24-bit RGB 8-8-8) 240x320 -> BA24 (32-bit ARGB 8-8-8-8) 240x320: OK [ 369.359436] [U] [ 370.047235] [U] Video Capture: Captured 8 buffers [ 370.411149] [U] RGB3 (24-bit RGB 8-8-8) 240x320 -> RGB3 (24-bit RGB 8-8-8) 240x320: OK [ 373.744081] [U] [ 374.268922] [U] Video Capture: Captured 8 buffers [ 374.538707] [U] RGB3 (24-bit RGB 8-8-8) 240x320 -> RGBP (16-bit RGB 5-6-5) 240x320: OK [ 377.084393] [U] [ 377.514706] [U] Video Capture: Captured 8 buffers [ 377.759132] [U] RGB3 (24-bit RGB 8-8-8) 240x320 -> AR15 (16-bit ARGB 1-5-5-5) 240x320: OK [ 380.203358] [U] [ 380.637202] [U] Video Capture: Captured 8 buffers [ 380.872188] [U] RGB3 (24-bit RGB 8-8-8) 240x320 -> AR12 (16-bit ARGB 4-4-4-4) 240x320: OK [ 383.271589] [U] [ 383.700928] [U] Video Capture: Captured 8 buffers [ 383.943595] [U] RGBP (16-bit RGB 5-6-5) 1x1 -> BA24 (32-bit ARGB 8-8-8-8) 1x1: OK [ 386.328863] [U] [ 386.764962] [U] Video Capture: Captured 8 buffers [ 386.999766] [U] RGBP (16-bit RGB 5-6-5) 1x1 -> RGB3 (24-bit RGB 8-8-8) 1x1: OK [ 389.410754] [U] [ 389.843266] [U] Video Capture: Captured 8 buffers [ 390.087088] [U] RGBP (16-bit RGB 5-6-5) 1x1 -> RGBP (16-bit RGB 5-6-5) 1x1: OK [ 392.471763] [U] [ 392.905730] [U] Video Capture: Captured 8 buffers [ 393.146591] [U] RGBP (16-bit RGB 5-6-5) 1x1 -> AR15 (16-bit ARGB 1-5-5-5) 1x1: OK [ 395.568817] [U] [ 396.000735] [U] Video Capture: Captured 8 buffers [ 396.239683] [U] RGBP (16-bit RGB 5-6-5) 1x1 -> AR12 (16-bit ARGB 4-4-4-4) 1x1: OK [ 396.726035] stm-dma2d 4002b000.dma2d: dma alloc of size 13438976 failed [ 397.228167] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 397.740467] [U] RGBP (16-bit RGB 5-6-5) 2592x2592 -> BA24 (32-bit ARGB 8-8-8-8) 2592x2592: FAIL [ 398.265046] stm-dma2d 4002b000.dma2d: dma alloc of size 13438976 failed [ 398.806330] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 399.386895] [U] RGBP (16-bit RGB 5-6-5) 2592x2592 -> RGB3 (24-bit RGB 8-8-8) 2592x2592: FAIL [ 400.014307] stm-dma2d 4002b000.dma2d: dma alloc of size 13438976 failed [ 400.661722] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 401.334815] [U] RGBP (16-bit RGB 5-6-5) 2592x2592 -> RGBP (16-bit RGB 5-6-5) 2592x2592: FAIL [ 402.022646] stm-dma2d 4002b000.dma2d: dma alloc of size 13438976 failed [ 402.705189] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 403.429313] [U] RGBP (16-bit RGB 5-6-5) 2592x2592 -> AR15 (16-bit ARGB 1-5-5-5) 2592x2592: FAIL [ 404.199336] stm-dma2d 4002b000.dma2d: dma alloc of size 13438976 failed [ 404.993926] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 405.824722] [U] RGBP (16-bit RGB 5-6-5) 2592x2592 -> AR12 (16-bit ARGB 4-4-4-4) 2592x2592: FAIL [ 410.123611] [U] [ 410.945529] [U] Video Capture: Captured 8 buffers [ 411.378867] [U] RGBP (16-bit RGB 5-6-5) 240x320 -> BA24 (32-bit ARGB 8-8-8-8) 240x320: OK [ 415.488227] [U] [ 416.177766] [U] Video Capture: Captured 8 buffers [ 416.538441] [U] RGBP (16-bit RGB 5-6-5) 240x320 -> RGB3 (24-bit RGB 8-8-8) 240x320: OK [ 419.826273] [U] [ 420.354543] [U] Video Capture: Captured 8 buffers [ 420.636913] [U] RGBP (16-bit RGB 5-6-5) 240x320 -> RGBP (16-bit RGB 5-6-5) 240x320: OK [ 423.163619] [U] [ 423.594915] [U] Video Capture: Captured 8 buffers [ 423.832290] [U] RGBP (16-bit RGB 5-6-5) 240x320 -> AR15 (16-bit ARGB 1-5-5-5) 240x320: OK [ 426.311384] [U] [ 426.741478] [U] Video Capture: Captured 8 buffers [ 426.982107] [U] RGBP (16-bit RGB 5-6-5) 240x320 -> AR12 (16-bit ARGB 4-4-4-4) 240x320: OK [ 429.371663] [U] [ 429.806431] [U] Video Capture: Captured 8 buffers [ 430.040867] [U] AR15 (16-bit ARGB 1-5-5-5) 1x1 -> BA24 (32-bit ARGB 8-8-8-8) 1x1: OK [ 432.455072] [U] [ 432.887528] [U] Video Capture: Captured 8 buffers [ 433.131724] [U] AR15 (16-bit ARGB 1-5-5-5) 1x1 -> RGB3 (24-bit RGB 8-8-8) 1x1: OK [ 435.531286] [U] [ 435.969388] [U] Video Capture: Captured 8 buffers [ 436.205712] [U] AR15 (16-bit ARGB 1-5-5-5) 1x1 -> RGBP (16-bit RGB 5-6-5) 1x1: OK [ 438.632679] [U] [ 439.067025] [U] Video Capture: Captured 8 buffers [ 439.307189] [U] AR15 (16-bit ARGB 1-5-5-5) 1x1 -> AR15 (16-bit ARGB 1-5-5-5) 1x1: OK [ 441.703205] [U] [ 442.135816] [U] Video Capture: Captured 8 buffers [ 442.379741] [U] AR15 (16-bit ARGB 1-5-5-5) 1x1 -> AR12 (16-bit ARGB 4-4-4-4) 1x1: OK [ 442.867674] stm-dma2d 4002b000.dma2d: dma alloc of size 13438976 failed [ 443.364265] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 443.879575] [U] AR15 (16-bit ARGB 1-5-5-5) 2592x2592 -> BA24 (32-bit ARGB 8-8-8-8) 2592x2592: FAIL [ 444.408321] stm-dma2d 4002b000.dma2d: dma alloc of size 13438976 failed [ 444.954042] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 445.542126] [U] AR15 (16-bit ARGB 1-5-5-5) 2592x2592 -> RGB3 (24-bit RGB 8-8-8) 2592x2592: FAIL [ 446.167742] stm-dma2d 4002b000.dma2d: dma alloc of size 13438976 failed [ 446.813974] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 447.484183] [U] AR15 (16-bit ARGB 1-5-5-5) 2592x2592 -> RGBP (16-bit RGB 5-6-5) 2592x2592: FAIL [ 448.169137] stm-dma2d 4002b000.dma2d: dma alloc of size 13438976 failed [ 448.857907] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 449.586237] [U] AR15 (16-bit ARGB 1-5-5-5) 2592x2592 -> AR15 (16-bit ARGB 1-5-5-5) 2592x2592: FAIL [ 450.354594] stm-dma2d 4002b000.dma2d: dma alloc of size 13438976 failed [ 451.147715] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 451.969070] [U] AR15 (16-bit ARGB 1-5-5-5) 2592x2592 -> AR12 (16-bit ARGB 4-4-4-4) 2592x2592: FAIL [ 456.270179] [U] [ 457.092815] [U] Video Capture: Captured 8 buffers [ 457.527337] [U] AR15 (16-bit ARGB 1-5-5-5) 240x320 -> BA24 (32-bit ARGB 8-8-8-8) 240x320: OK [ 461.646816] [U] [ 462.336816] [U] Video Capture: Captured 8 buffers [ 462.699807] [U] AR15 (16-bit ARGB 1-5-5-5) 240x320 -> RGB3 (24-bit RGB 8-8-8) 240x320: OK [ 466.018352] [U] [ 466.552070] [U] Video Capture: Captured 8 buffers [ 466.828635] [U] AR15 (16-bit ARGB 1-5-5-5) 240x320 -> RGBP (16-bit RGB 5-6-5) 240x320: OK [ 469.335696] [U] [ 469.773367] [U] Video Capture: Captured 8 buffers [ 470.010331] [U] AR15 (16-bit ARGB 1-5-5-5) 240x320 -> AR15 (16-bit ARGB 1-5-5-5) 240x320: OK [ 472.487852] [U] [ 472.925831] [U] Video Capture: Captured 8 buffers [ 473.167824] [U] AR15 (16-bit ARGB 1-5-5-5) 240x320 -> AR12 (16-bit ARGB 4-4-4-4) 240x320: OK [ 475.552623] [U] [ 475.985703] [U] Video Capture: Captured 8 buffers [ 476.229768] [U] AR12 (16-bit ARGB 4-4-4-4) 1x1 -> BA24 (32-bit ARGB 8-8-8-8) 1x1: OK [ 478.654381] [U] [ 479.086506] [U] Video Capture: Captured 8 buffers [ 479.326295] [U] AR12 (16-bit ARGB 4-4-4-4) 1x1 -> RGB3 (24-bit RGB 8-8-8) 1x1: OK [ 481.714968] [U] [ 482.146937] [U] Video Capture: Captured 8 buffers [ 482.390623] [U] AR12 (16-bit ARGB 4-4-4-4) 1x1 -> RGBP (16-bit RGB 5-6-5) 1x1: OK [ 484.807477] [U] [ 485.238512] [U] Video Capture: Captured 8 buffers [ 485.477276] [U] AR12 (16-bit ARGB 4-4-4-4) 1x1 -> AR15 (16-bit ARGB 1-5-5-5) 1x1: OK [ 487.860325] [U] [ 488.292229] [U] Video Capture: Captured 8 buffers [ 488.533258] [U] AR12 (16-bit ARGB 4-4-4-4) 1x1 -> AR12 (16-bit ARGB 4-4-4-4) 1x1: OK [ 489.019563] stm-dma2d 4002b000.dma2d: dma alloc of size 13438976 failed [ 489.515301] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 490.029317] [U] AR12 (16-bit ARGB 4-4-4-4) 2592x2592 -> BA24 (32-bit ARGB 8-8-8-8) 2592x2592: FAIL [ 490.556478] stm-dma2d 4002b000.dma2d: dma alloc of size 13438976 failed [ 491.097922] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 491.688235] [U] AR12 (16-bit ARGB 4-4-4-4) 2592x2592 -> RGB3 (24-bit RGB 8-8-8) 2592x2592: FAIL [ 492.312625] stm-dma2d 4002b000.dma2d: dma alloc of size 13438976 failed [ 492.957251] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 493.626205] [U] AR12 (16-bit ARGB 4-4-4-4) 2592x2592 -> RGBP (16-bit RGB 5-6-5) 2592x2592: FAIL [ 494.309810] stm-dma2d 4002b000.dma2d: dma alloc of size 13438976 failed [ 494.997367] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 495.724499] [U] AR12 (16-bit ARGB 4-4-4-4) 2592x2592 -> AR15 (16-bit ARGB 1-5-5-5) 2592x2592: FAIL [ 496.490971] stm-dma2d 4002b000.dma2d: dma alloc of size 13438976 failed [ 497.282391] [U] fail: v4l2-test-buffers.cpp(1349): q.reqbufs(node, 2) [ 498.101859] [U] AR12 (16-bit ARGB 4-4-4-4) 2592x2592 -> AR12 (16-bit ARGB 4-4-4-4) 2592x2592: FAIL [ 502.390697] [U] [ 503.210399] [U] Video Capture: Captured 8 buffers [ 503.643633] [U] AR12 (16-bit ARGB 4-4-4-4) 240x320 -> BA24 (32-bit ARGB 8-8-8-8) 240x320: OK [ 507.747367] [U] [ 508.434468] [U] Video Capture: Captured 8 buffers [ 508.784910] [U] AR12 (16-bit ARGB 4-4-4-4) 240x320 -> RGB3 (24-bit RGB 8-8-8) 240x320: OK [ 512.102183] [U] [ 512.630437] [U] Video Capture: Captured 8 buffers [ 512.906497] [U] AR12 (16-bit ARGB 4-4-4-4) 240x320 -> RGBP (16-bit RGB 5-6-5) 240x320: OK [ 515.423391] [U] [ 515.863057] [U] Video Capture: Captured 8 buffers [ 516.100521] [U] AR12 (16-bit ARGB 4-4-4-4) 240x320 -> AR15 (16-bit ARGB 1-5-5-5) 240x320: OK [ 518.575789] [U] [ 519.013201] [U] Video Capture: Captured 8 buffers [ 519.256483] [U] AR12 (16-bit ARGB 4-4-4-4) 240x320 -> AR12 (16-bit ARGB 4-4-4-4) 240x320: OK [ 519.746238] [U] Total for stm-dma2d device /dev/video0: 121, Succeeded: 96, Failed: 25, Warnings: 0 *** BLURB HERE *** Dillon Min (10): media: admin-guide: add stm32-dma2d description media: dt-bindings: media: add document for STM32 DMA2d bindings ARM: dts: stm32: Add DMA2D support for STM32F429 series soc ARM: dts: stm32: Enable DMA2D on STM32F469-DISCO board media: v4l2-mem2mem: add v4l2_m2m_get_unmapped_area for no-mmu platform media: videobuf2: Fix the size printk format media: v4l2-ctrls: Add V4L2_CID_COLORFX_CBCR max setting media: v4l2-ctrls: Add RGB color effects control clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after system enter shell media: stm32-dma2d: STM32 DMA2D driver .../admin-guide/media/platform-cardlist.rst | 1 + .../devicetree/bindings/media/st,stm32-dma2d.yaml | 71 ++ Documentation/userspace-api/media/v4l/control.rst | 9 + arch/arm/boot/dts/stm32f429.dtsi | 10 + arch/arm/boot/dts/stm32f469-disco.dts | 4 + drivers/clk/clk-stm32f4.c | 4 - .../media/common/videobuf2/videobuf2-dma-contig.c | 8 +- drivers/media/platform/Kconfig | 11 + drivers/media/platform/Makefile | 1 + drivers/media/platform/stm32/Makefile | 2 + drivers/media/platform/stm32/dma2d/dma2d-hw.c | 143 ++++ drivers/media/platform/stm32/dma2d/dma2d-regs.h | 113 ++++ drivers/media/platform/stm32/dma2d/dma2d.c | 739 +++++++++++++++++++++ drivers/media/platform/stm32/dma2d/dma2d.h | 135 ++++ drivers/media/v4l2-core/v4l2-ctrls-defs.c | 12 +- drivers/media/v4l2-core/v4l2-mem2mem.c | 21 + include/media/v4l2-mem2mem.h | 5 + include/uapi/linux/v4l2-controls.h | 4 +- 18 files changed, 1282 insertions(+), 11 deletions(-) create mode 100644 Documentation/devicetree/bindings/media/st,stm32-dma2d.yaml create mode 100644 drivers/media/platform/stm32/dma2d/dma2d-hw.c create mode 100644 drivers/media/platform/stm32/dma2d/dma2d-regs.h create mode 100644 drivers/media/platform/stm32/dma2d/dma2d.c create mode 100644 drivers/media/platform/stm32/dma2d/dma2d.h -- 2.7.4 ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v6 01/10] media: admin-guide: add stm32-dma2d description 2021-10-19 8:43 [PATCH v6 00/10] Add support for DMA2D of STMicroelectronics STM32 Soc series Dillon Min @ 2021-10-19 8:43 ` Dillon Min 2021-10-19 8:43 ` [PATCH v6 02/10] media: dt-bindings: media: add document for STM32 DMA2d bindings Dillon Min ` (8 subsequent siblings) 9 siblings, 0 replies; 14+ messages in thread From: Dillon Min @ 2021-10-19 8:43 UTC (permalink / raw) To: mchehab, mchehab+huawei, hverkuil-cisco, ezequiel, gnurou, pihsun, mcoquelin.stm32, alexandre.torgue, mturquette, sboyd, robh+dt, gabriel.fernandez, gabriel.fernandez Cc: patrice.chotard, hugues.fruchet, linux-media, linux-kernel, linux-stm32, linux-arm-kernel, linux-clk, devicetree add stm32-dma2d description for dma2d driver Signed-off-by: Dillon Min <dillon.minfei@gmail.com> --- v6: no change. Documentation/admin-guide/media/platform-cardlist.rst | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/admin-guide/media/platform-cardlist.rst b/Documentation/admin-guide/media/platform-cardlist.rst index 261e7772eb3e..ac73c4166d1e 100644 --- a/Documentation/admin-guide/media/platform-cardlist.rst +++ b/Documentation/admin-guide/media/platform-cardlist.rst @@ -60,6 +60,7 @@ s5p-mfc Samsung S5P MFC Video Codec sh_veu SuperH VEU mem2mem video processing sh_vou SuperH VOU video output stm32-dcmi STM32 Digital Camera Memory Interface (DCMI) +stm32-dma2d STM32 Chrom-Art Accelerator Unit sun4i-csi Allwinner A10 CMOS Sensor Interface Support sun6i-csi Allwinner V3s Camera Sensor Interface sun8i-di Allwinner Deinterlace -- 2.7.4 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v6 02/10] media: dt-bindings: media: add document for STM32 DMA2d bindings 2021-10-19 8:43 [PATCH v6 00/10] Add support for DMA2D of STMicroelectronics STM32 Soc series Dillon Min 2021-10-19 8:43 ` [PATCH v6 01/10] media: admin-guide: add stm32-dma2d description Dillon Min @ 2021-10-19 8:43 ` Dillon Min 2021-10-19 8:43 ` [PATCH v6 03/10] ARM: dts: stm32: Add DMA2D support for STM32F429 series soc Dillon Min ` (7 subsequent siblings) 9 siblings, 0 replies; 14+ messages in thread From: Dillon Min @ 2021-10-19 8:43 UTC (permalink / raw) To: mchehab, mchehab+huawei, hverkuil-cisco, ezequiel, gnurou, pihsun, mcoquelin.stm32, alexandre.torgue, mturquette, sboyd, robh+dt, gabriel.fernandez, gabriel.fernandez Cc: patrice.chotard, hugues.fruchet, linux-media, linux-kernel, linux-stm32, linux-arm-kernel, linux-clk, devicetree This adds documentation of device tree bindings for the STM32 DMA2D Signed-off-by: Dillon Min <dillon.minfei@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> --- v6: no change. .../devicetree/bindings/media/st,stm32-dma2d.yaml | 71 ++++++++++++++++++++++ 1 file changed, 71 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/st,stm32-dma2d.yaml diff --git a/Documentation/devicetree/bindings/media/st,stm32-dma2d.yaml b/Documentation/devicetree/bindings/media/st,stm32-dma2d.yaml new file mode 100644 index 000000000000..f97b4a246605 --- /dev/null +++ b/Documentation/devicetree/bindings/media/st,stm32-dma2d.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/st,stm32-dma2d.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STM32 Chrom-Art Accelerator DMA2D binding + +description: + Chrom-ART Accelerator(DMA2D), graphical hardware accelerator + enabling enhanced graphical user interface with minimum CPU load + + It can perform the following operations. + + - Filling a part or the whole of a destination image with a specific color. + - Copying a part or the whole of a source image into a part or the whole of + a destination image. + - Copying a part or the whole of a source image into a part or the whole of + a destination image with a pixel format conversion. + - Blending a part and/or two complete source images with different pixel + format and copy the result into a part or the whole of a destination image + with a different color format. (TODO) + + +maintainers: + - Dillon Min <dillon.minfei@gmail.com> + +properties: + compatible: + const: st,stm32-dma2d + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: dma2d + + resets: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/stm32fx-clock.h> + #include <dt-bindings/mfd/stm32f4-rcc.h> + dma2d: dma2d@4002b000 { + compatible = "st,stm32-dma2d"; + reg = <0x4002b000 0xc00>; + interrupts = <90>; + resets = <&rcc STM32F4_AHB1_RESET(DMA2D)>; + clocks = <&rcc 0 STM32F4_AHB1_CLOCK(DMA2D)>; + clock-names = "dma2d"; + }; + +... -- 2.7.4 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v6 03/10] ARM: dts: stm32: Add DMA2D support for STM32F429 series soc 2021-10-19 8:43 [PATCH v6 00/10] Add support for DMA2D of STMicroelectronics STM32 Soc series Dillon Min 2021-10-19 8:43 ` [PATCH v6 01/10] media: admin-guide: add stm32-dma2d description Dillon Min 2021-10-19 8:43 ` [PATCH v6 02/10] media: dt-bindings: media: add document for STM32 DMA2d bindings Dillon Min @ 2021-10-19 8:43 ` Dillon Min 2021-10-19 8:43 ` [PATCH v6 04/10] ARM: dts: stm32: Enable DMA2D on STM32F469-DISCO board Dillon Min ` (6 subsequent siblings) 9 siblings, 0 replies; 14+ messages in thread From: Dillon Min @ 2021-10-19 8:43 UTC (permalink / raw) To: mchehab, mchehab+huawei, hverkuil-cisco, ezequiel, gnurou, pihsun, mcoquelin.stm32, alexandre.torgue, mturquette, sboyd, robh+dt, gabriel.fernandez, gabriel.fernandez Cc: patrice.chotard, hugues.fruchet, linux-media, linux-kernel, linux-stm32, linux-arm-kernel, linux-clk, devicetree Add DMA2D for STM32F429 series soc. Signed-off-by: Dillon Min <dillon.minfei@gmail.com> --- v6: no change. arch/arm/boot/dts/stm32f429.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index 8748d5850298..1d8be5e7c8b8 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -743,6 +743,16 @@ st,mem2mem; }; + dma2d: dma2d@4002b000 { + compatible = "st,stm32-dma2d"; + reg = <0x4002b000 0xc00>; + interrupts = <90>; + resets = <&rcc STM32F4_AHB1_RESET(DMA2D)>; + clocks = <&rcc 0 STM32F4_AHB1_CLOCK(DMA2D)>; + clock-names = "dma2d"; + status = "disabled"; + }; + mac: ethernet@40028000 { compatible = "st,stm32-dwmac", "snps,dwmac-3.50a"; reg = <0x40028000 0x8000>; -- 2.7.4 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v6 04/10] ARM: dts: stm32: Enable DMA2D on STM32F469-DISCO board 2021-10-19 8:43 [PATCH v6 00/10] Add support for DMA2D of STMicroelectronics STM32 Soc series Dillon Min ` (2 preceding siblings ...) 2021-10-19 8:43 ` [PATCH v6 03/10] ARM: dts: stm32: Add DMA2D support for STM32F429 series soc Dillon Min @ 2021-10-19 8:43 ` Dillon Min 2021-10-19 8:43 ` [PATCH v6 05/10] media: v4l2-mem2mem: add v4l2_m2m_get_unmapped_area for no-mmu platform Dillon Min ` (5 subsequent siblings) 9 siblings, 0 replies; 14+ messages in thread From: Dillon Min @ 2021-10-19 8:43 UTC (permalink / raw) To: mchehab, mchehab+huawei, hverkuil-cisco, ezequiel, gnurou, pihsun, mcoquelin.stm32, alexandre.torgue, mturquette, sboyd, robh+dt, gabriel.fernandez, gabriel.fernandez Cc: patrice.chotard, hugues.fruchet, linux-media, linux-kernel, linux-stm32, linux-arm-kernel, linux-clk, devicetree Enable DMA2D on STM32F469-DISCO board. Signed-off-by: Dillon Min <dillon.minfei@gmail.com> --- v6: no change. arch/arm/boot/dts/stm32f469-disco.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/stm32f469-disco.dts b/arch/arm/boot/dts/stm32f469-disco.dts index 30905ce672a0..ba26a3375b0d 100644 --- a/arch/arm/boot/dts/stm32f469-disco.dts +++ b/arch/arm/boot/dts/stm32f469-disco.dts @@ -132,6 +132,10 @@ clock-frequency = <8000000>; }; +&dma2d { + status = "okay"; +}; + &dsi { #address-cells = <1>; #size-cells = <0>; -- 2.7.4 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v6 05/10] media: v4l2-mem2mem: add v4l2_m2m_get_unmapped_area for no-mmu platform 2021-10-19 8:43 [PATCH v6 00/10] Add support for DMA2D of STMicroelectronics STM32 Soc series Dillon Min ` (3 preceding siblings ...) 2021-10-19 8:43 ` [PATCH v6 04/10] ARM: dts: stm32: Enable DMA2D on STM32F469-DISCO board Dillon Min @ 2021-10-19 8:43 ` Dillon Min 2021-10-19 8:43 ` [PATCH v6 06/10] media: videobuf2: Fix the size printk format Dillon Min ` (4 subsequent siblings) 9 siblings, 0 replies; 14+ messages in thread From: Dillon Min @ 2021-10-19 8:43 UTC (permalink / raw) To: mchehab, mchehab+huawei, hverkuil-cisco, ezequiel, gnurou, pihsun, mcoquelin.stm32, alexandre.torgue, mturquette, sboyd, robh+dt, gabriel.fernandez, gabriel.fernandez Cc: patrice.chotard, hugues.fruchet, linux-media, linux-kernel, linux-stm32, linux-arm-kernel, linux-clk, devicetree For platforms without MMU the m2m provides a helper method v4l2_m2m_get_unmapped_area(), The mmap() routines will call this to get a proposed address for the mapping. More detailed information about get_unmapped_area can be found in Documentation/nommu-mmap.txt Signed-off-by: Dillon Min <dillon.minfei@gmail.com> --- v6: no change. drivers/media/v4l2-core/v4l2-mem2mem.c | 21 +++++++++++++++++++++ include/media/v4l2-mem2mem.h | 5 +++++ 2 files changed, 26 insertions(+) diff --git a/drivers/media/v4l2-core/v4l2-mem2mem.c b/drivers/media/v4l2-core/v4l2-mem2mem.c index e7f4bf5bc8dd..e2654b422334 100644 --- a/drivers/media/v4l2-core/v4l2-mem2mem.c +++ b/drivers/media/v4l2-core/v4l2-mem2mem.c @@ -966,6 +966,27 @@ int v4l2_m2m_mmap(struct file *file, struct v4l2_m2m_ctx *m2m_ctx, } EXPORT_SYMBOL(v4l2_m2m_mmap); +#ifndef CONFIG_MMU +unsigned long v4l2_m2m_get_unmapped_area(struct file *file, unsigned long addr, + unsigned long len, unsigned long pgoff, + unsigned long flags) +{ + struct v4l2_fh *fh = file->private_data; + unsigned long offset = pgoff << PAGE_SHIFT; + struct vb2_queue *vq; + + if (offset < DST_QUEUE_OFF_BASE) { + vq = v4l2_m2m_get_src_vq(fh->m2m_ctx); + } else { + vq = v4l2_m2m_get_dst_vq(fh->m2m_ctx); + pgoff -= (DST_QUEUE_OFF_BASE >> PAGE_SHIFT); + } + + return vb2_get_unmapped_area(vq, addr, len, pgoff, flags); +} +EXPORT_SYMBOL_GPL(v4l2_m2m_get_unmapped_area); +#endif + #if defined(CONFIG_MEDIA_CONTROLLER) void v4l2_m2m_unregister_media_controller(struct v4l2_m2m_dev *m2m_dev) { diff --git a/include/media/v4l2-mem2mem.h b/include/media/v4l2-mem2mem.h index 5a91b548ecc0..fdbd5257e020 100644 --- a/include/media/v4l2-mem2mem.h +++ b/include/media/v4l2-mem2mem.h @@ -495,6 +495,11 @@ __poll_t v4l2_m2m_poll(struct file *file, struct v4l2_m2m_ctx *m2m_ctx, int v4l2_m2m_mmap(struct file *file, struct v4l2_m2m_ctx *m2m_ctx, struct vm_area_struct *vma); +#ifndef CONFIG_MMU +unsigned long v4l2_m2m_get_unmapped_area(struct file *file, unsigned long addr, + unsigned long len, unsigned long pgoff, + unsigned long flags); +#endif /** * v4l2_m2m_init() - initialize per-driver m2m data * -- 2.7.4 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v6 06/10] media: videobuf2: Fix the size printk format 2021-10-19 8:43 [PATCH v6 00/10] Add support for DMA2D of STMicroelectronics STM32 Soc series Dillon Min ` (4 preceding siblings ...) 2021-10-19 8:43 ` [PATCH v6 05/10] media: v4l2-mem2mem: add v4l2_m2m_get_unmapped_area for no-mmu platform Dillon Min @ 2021-10-19 8:43 ` Dillon Min 2021-10-19 8:43 ` [PATCH v6 07/10] media: v4l2-ctrls: Add V4L2_CID_COLORFX_CBCR max setting Dillon Min ` (3 subsequent siblings) 9 siblings, 0 replies; 14+ messages in thread From: Dillon Min @ 2021-10-19 8:43 UTC (permalink / raw) To: mchehab, mchehab+huawei, hverkuil-cisco, ezequiel, gnurou, pihsun, mcoquelin.stm32, alexandre.torgue, mturquette, sboyd, robh+dt, gabriel.fernandez, gabriel.fernandez Cc: patrice.chotard, hugues.fruchet, linux-media, linux-kernel, linux-stm32, linux-arm-kernel, linux-clk, devicetree Since the type of parameter size is unsigned long, it should printk by %lu, instead of %ld, fix it. Fixes: 7952be9b6ece ("media: drivers/media/common/videobuf2: rename from videobuf") Signed-off-by: Dillon Min <dillon.minfei@gmail.com> --- v6: no change. drivers/media/common/videobuf2/videobuf2-dma-contig.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/media/common/videobuf2/videobuf2-dma-contig.c b/drivers/media/common/videobuf2/videobuf2-dma-contig.c index b052a4e36961..7cd6648ccd26 100644 --- a/drivers/media/common/videobuf2/videobuf2-dma-contig.c +++ b/drivers/media/common/videobuf2/videobuf2-dma-contig.c @@ -257,7 +257,7 @@ static void *vb2_dc_alloc(struct vb2_buffer *vb, ret = vb2_dc_alloc_coherent(buf); if (ret) { - dev_err(dev, "dma alloc of size %ld failed\n", size); + dev_err(dev, "dma alloc of size %lu failed\n", size); kfree(buf); return ERR_PTR(-ENOMEM); } @@ -298,9 +298,9 @@ static int vb2_dc_mmap(void *buf_priv, struct vm_area_struct *vma) vma->vm_ops->open(vma); - pr_debug("%s: mapped dma addr 0x%08lx at 0x%08lx, size %ld\n", - __func__, (unsigned long)buf->dma_addr, vma->vm_start, - buf->size); + pr_debug("%s: mapped dma addr 0x%08lx at 0x%08lx, size %lu\n", + __func__, (unsigned long)buf->dma_addr, vma->vm_start, + buf->size); return 0; } -- 2.7.4 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v6 07/10] media: v4l2-ctrls: Add V4L2_CID_COLORFX_CBCR max setting 2021-10-19 8:43 [PATCH v6 00/10] Add support for DMA2D of STMicroelectronics STM32 Soc series Dillon Min ` (5 preceding siblings ...) 2021-10-19 8:43 ` [PATCH v6 06/10] media: videobuf2: Fix the size printk format Dillon Min @ 2021-10-19 8:43 ` Dillon Min 2021-10-19 8:43 ` [PATCH v6 08/10] media: v4l2-ctrls: Add RGB color effects control Dillon Min ` (2 subsequent siblings) 9 siblings, 0 replies; 14+ messages in thread From: Dillon Min @ 2021-10-19 8:43 UTC (permalink / raw) To: mchehab, mchehab+huawei, hverkuil-cisco, ezequiel, gnurou, pihsun, mcoquelin.stm32, alexandre.torgue, mturquette, sboyd, robh+dt, gabriel.fernandez, gabriel.fernandez Cc: patrice.chotard, hugues.fruchet, linux-media, linux-kernel, linux-stm32, linux-arm-kernel, linux-clk, devicetree The max of V4L2_CID_COLORFX_CBCR is 0xffff, so add it to v4l2_ctrl_fill() to sure not beyond that. Signed-off-by: Dillon Min <dillon.minfei@gmail.com> --- v6: no change. drivers/media/v4l2-core/v4l2-ctrls-defs.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/media/v4l2-core/v4l2-ctrls-defs.c b/drivers/media/v4l2-core/v4l2-ctrls-defs.c index ebe82b6ba6e6..0cb6c0f18b39 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls-defs.c +++ b/drivers/media/v4l2-core/v4l2-ctrls-defs.c @@ -1400,6 +1400,12 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, /* Max is calculated as RGB888 that is 2^24 */ *max = 0xFFFFFF; break; + case V4L2_CID_COLORFX_CBCR: + *type = V4L2_CTRL_TYPE_INTEGER; + *step = 1; + *min = 0; + *max = 0xffff; + break; case V4L2_CID_FLASH_FAULT: case V4L2_CID_JPEG_ACTIVE_MARKER: case V4L2_CID_3A_LOCK: -- 2.7.4 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v6 08/10] media: v4l2-ctrls: Add RGB color effects control 2021-10-19 8:43 [PATCH v6 00/10] Add support for DMA2D of STMicroelectronics STM32 Soc series Dillon Min ` (6 preceding siblings ...) 2021-10-19 8:43 ` [PATCH v6 07/10] media: v4l2-ctrls: Add V4L2_CID_COLORFX_CBCR max setting Dillon Min @ 2021-10-19 8:43 ` Dillon Min 2021-10-19 8:43 ` [PATCH v6 09/10] clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after system enter shell Dillon Min 2021-10-19 8:43 ` [PATCH v6 10/10] media: stm32-dma2d: STM32 DMA2D driver Dillon Min 9 siblings, 0 replies; 14+ messages in thread From: Dillon Min @ 2021-10-19 8:43 UTC (permalink / raw) To: mchehab, mchehab+huawei, hverkuil-cisco, ezequiel, gnurou, pihsun, mcoquelin.stm32, alexandre.torgue, mturquette, sboyd, robh+dt, gabriel.fernandez, gabriel.fernandez Cc: patrice.chotard, hugues.fruchet, linux-media, linux-kernel, linux-stm32, linux-arm-kernel, linux-clk, devicetree Add V4L2_COLORFX_SET_RGB color effects control, V4L2_CID_COLORFX_RGB for RGB color setting. with two mirror changes: - change 0xFFFFFF to 0xffffff - fix comments 2^24 to 2^24 - 1 Signed-off-by: Dillon Min <dillon.minfei@gmail.com> --- v6: add space in '(V4L2_CID_BASE+43)' to avoid checkpatch warrnings. Documentation/userspace-api/media/v4l/control.rst | 9 +++++++++ drivers/media/v4l2-core/v4l2-ctrls-defs.c | 6 ++++-- include/uapi/linux/v4l2-controls.h | 4 +++- 3 files changed, 16 insertions(+), 3 deletions(-) diff --git a/Documentation/userspace-api/media/v4l/control.rst b/Documentation/userspace-api/media/v4l/control.rst index f8d0b923da20..3eec65174260 100644 --- a/Documentation/userspace-api/media/v4l/control.rst +++ b/Documentation/userspace-api/media/v4l/control.rst @@ -242,8 +242,17 @@ Control IDs * - ``V4L2_COLORFX_SET_CBCR`` - The Cb and Cr chroma components are replaced by fixed coefficients determined by ``V4L2_CID_COLORFX_CBCR`` control. + * - ``V4L2_COLORFX_SET_RGB`` + - The RGB components are replaced by the fixed RGB components determined + by ``V4L2_CID_COLORFX_RGB`` control. +``V4L2_CID_COLORFX_RGB`` ``(integer)`` + Determines the Red, Green, and Blue coefficients for + ``V4L2_COLORFX_SET_RGB`` color effect. + Bits [7:0] of the supplied 32 bit value are interpreted as Blue component, + bits [15:8] as Green component, bits [23:16] as Red component, and + bits [31:24] must be zero. ``V4L2_CID_COLORFX_CBCR`` ``(integer)`` Determines the Cb and Cr coefficients for ``V4L2_COLORFX_SET_CBCR`` diff --git a/drivers/media/v4l2-core/v4l2-ctrls-defs.c b/drivers/media/v4l2-core/v4l2-ctrls-defs.c index 0cb6c0f18b39..431f7ec17557 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls-defs.c +++ b/drivers/media/v4l2-core/v4l2-ctrls-defs.c @@ -785,6 +785,7 @@ const char *v4l2_ctrl_get_name(u32 id) case V4L2_CID_MIN_BUFFERS_FOR_OUTPUT: return "Min Number of Output Buffers"; case V4L2_CID_ALPHA_COMPONENT: return "Alpha Component"; case V4L2_CID_COLORFX_CBCR: return "Color Effects, CbCr"; + case V4L2_CID_COLORFX_RGB: return "Color Effects, RGB"; /* * Codec controls @@ -1394,11 +1395,12 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, *min = *max = *step = *def = 0; break; case V4L2_CID_BG_COLOR: + case V4L2_CID_COLORFX_RGB: *type = V4L2_CTRL_TYPE_INTEGER; *step = 1; *min = 0; - /* Max is calculated as RGB888 that is 2^24 */ - *max = 0xFFFFFF; + /* Max is calculated as RGB888 that is 2^24 - 1 */ + *max = 0xffffff; break; case V4L2_CID_COLORFX_CBCR: *type = V4L2_CTRL_TYPE_INTEGER; diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h index 133e20444939..1406df0cc107 100644 --- a/include/uapi/linux/v4l2-controls.h +++ b/include/uapi/linux/v4l2-controls.h @@ -128,6 +128,7 @@ enum v4l2_colorfx { V4L2_COLORFX_SOLARIZATION = 13, V4L2_COLORFX_ANTIQUE = 14, V4L2_COLORFX_SET_CBCR = 15, + V4L2_COLORFX_SET_RGB = 16, }; #define V4L2_CID_AUTOBRIGHTNESS (V4L2_CID_BASE+32) #define V4L2_CID_BAND_STOP_FILTER (V4L2_CID_BASE+33) @@ -145,9 +146,10 @@ enum v4l2_colorfx { #define V4L2_CID_ALPHA_COMPONENT (V4L2_CID_BASE+41) #define V4L2_CID_COLORFX_CBCR (V4L2_CID_BASE+42) +#define V4L2_CID_COLORFX_RGB (V4L2_CID_BASE + 43) /* last CID + 1 */ -#define V4L2_CID_LASTP1 (V4L2_CID_BASE+43) +#define V4L2_CID_LASTP1 (V4L2_CID_BASE + 44) /* USER-class private control IDs */ -- 2.7.4 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v6 09/10] clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after system enter shell 2021-10-19 8:43 [PATCH v6 00/10] Add support for DMA2D of STMicroelectronics STM32 Soc series Dillon Min ` (7 preceding siblings ...) 2021-10-19 8:43 ` [PATCH v6 08/10] media: v4l2-ctrls: Add RGB color effects control Dillon Min @ 2021-10-19 8:43 ` Dillon Min 2021-10-22 7:25 ` Dillon Min 2021-10-19 8:43 ` [PATCH v6 10/10] media: stm32-dma2d: STM32 DMA2D driver Dillon Min 9 siblings, 1 reply; 14+ messages in thread From: Dillon Min @ 2021-10-19 8:43 UTC (permalink / raw) To: mchehab, mchehab+huawei, hverkuil-cisco, ezequiel, gnurou, pihsun, mcoquelin.stm32, alexandre.torgue, mturquette, sboyd, robh+dt, gabriel.fernandez, gabriel.fernandez Cc: patrice.chotard, hugues.fruchet, linux-media, linux-kernel, linux-stm32, linux-arm-kernel, linux-clk, devicetree stm32's clk driver register two ltdc gate clk to clk core by clk_hw_register_gate() and clk_hw_register_composite() first: 'stm32f429_gates[]', clk name is 'ltdc', which no user to use. second: 'stm32f429_aux_clk[]', clk name is 'lcd-tft', used by ltdc driver both of them point to the same offset of stm32's RCC register. after kernel enter console, clk core turn off ltdc's clk as 'stm32f429_gates[]' is no one to use. but, actually 'stm32f429_aux_clk[]' is in use. stm32f469/746/769 have the same issue, fix it. Fixes: daf2d117cbca ("clk: stm32f4: Add lcd-tft clock") Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/linux-arm-kernel/1590564453-24499-7-git-send-email-dillon.minfei@gmail.com/ Link: https://lore.kernel.org/lkml/CAPTRvHkf0cK_4ZidM17rPo99gWDmxgqFt4CDUjqFFwkOeQeFDg@mail.gmail.com/ Signed-off-by: Dillon Min <dillon.minfei@gmail.com> --- v6: no change. drivers/clk/clk-stm32f4.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c index af46176ad053..473dfe632cc5 100644 --- a/drivers/clk/clk-stm32f4.c +++ b/drivers/clk/clk-stm32f4.c @@ -129,7 +129,6 @@ static const struct stm32f4_gate_data stm32f429_gates[] __initconst = { { STM32F4_RCC_APB2ENR, 20, "spi5", "apb2_div" }, { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, }; static const struct stm32f4_gate_data stm32f469_gates[] __initconst = { @@ -211,7 +210,6 @@ static const struct stm32f4_gate_data stm32f469_gates[] __initconst = { { STM32F4_RCC_APB2ENR, 20, "spi5", "apb2_div" }, { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, }; static const struct stm32f4_gate_data stm32f746_gates[] __initconst = { @@ -286,7 +284,6 @@ static const struct stm32f4_gate_data stm32f746_gates[] __initconst = { { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, { STM32F4_RCC_APB2ENR, 23, "sai2", "apb2_div" }, - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, }; static const struct stm32f4_gate_data stm32f769_gates[] __initconst = { @@ -364,7 +361,6 @@ static const struct stm32f4_gate_data stm32f769_gates[] __initconst = { { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, { STM32F4_RCC_APB2ENR, 23, "sai2", "apb2_div" }, - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, { STM32F4_RCC_APB2ENR, 30, "mdio", "apb2_div" }, }; -- 2.7.4 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v6 09/10] clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after system enter shell 2021-10-19 8:43 ` [PATCH v6 09/10] clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after system enter shell Dillon Min @ 2021-10-22 7:25 ` Dillon Min 2021-10-22 9:10 ` gabriel.fernandez 0 siblings, 1 reply; 14+ messages in thread From: Dillon Min @ 2021-10-22 7:25 UTC (permalink / raw) To: Mauro Carvalho Chehab, mchehab+huawei, Hans Verkuil, ezequiel, gnurou, Pi-Hsun Shih, Maxime Coquelin, Alexandre TORGUE, Michael Turquette, Stephen Boyd, Rob Herring, gabriel.fernandez, gabriel.fernandez Cc: Patrice CHOTARD, hugues.fruchet, linux-media, Linux Kernel Mailing List, linux-stm32, Linux ARM, linux-clk, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS Hi Gabriel I guess you are the maintainer of stm32 clk subsystem from [1], Could you help to review this patch, just give a brief of the history: - this patch was acked by Stephen Boyd at [2]. - reviewed by Patrice Chotard at [3]. Without this patch , the kernel will turn off ltdc's clk after the system reach shell. [1] https://lore.kernel.org/lkml/AM8PR10MB4785545DC980090C1E7D66B281009@AM8PR10MB4785.EURPRD10.PROD.OUTLOOK.COM/ [2] https://lore.kernel.org/linux-arm-kernel/159056850835.88029.9264848839121822798@swboyd.mtv.corp.google.com/ [3] https://lore.kernel.org/lkml/6915fa2a-e211-476f-8317-6825e280c322@foss.st.com/#t Best Regards Dillon On Tue, 19 Oct 2021 at 16:44, Dillon Min <dillon.minfei@gmail.com> wrote: > > stm32's clk driver register two ltdc gate clk to clk core by > clk_hw_register_gate() and clk_hw_register_composite() > > first: 'stm32f429_gates[]', clk name is 'ltdc', which no user to use. > second: 'stm32f429_aux_clk[]', clk name is 'lcd-tft', used by ltdc driver > > both of them point to the same offset of stm32's RCC register. after > kernel enter console, clk core turn off ltdc's clk as 'stm32f429_gates[]' > is no one to use. but, actually 'stm32f429_aux_clk[]' is in use. > > stm32f469/746/769 have the same issue, fix it. > > Fixes: daf2d117cbca ("clk: stm32f4: Add lcd-tft clock") > Acked-by: Stephen Boyd <sboyd@kernel.org> > Link: https://lore.kernel.org/linux-arm-kernel/1590564453-24499-7-git-send-email-dillon.minfei@gmail.com/ > Link: https://lore.kernel.org/lkml/CAPTRvHkf0cK_4ZidM17rPo99gWDmxgqFt4CDUjqFFwkOeQeFDg@mail.gmail.com/ > Signed-off-by: Dillon Min <dillon.minfei@gmail.com> > --- > v6: no change. > > drivers/clk/clk-stm32f4.c | 4 ---- > 1 file changed, 4 deletions(-) > > diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c > index af46176ad053..473dfe632cc5 100644 > --- a/drivers/clk/clk-stm32f4.c > +++ b/drivers/clk/clk-stm32f4.c > @@ -129,7 +129,6 @@ static const struct stm32f4_gate_data stm32f429_gates[] __initconst = { > { STM32F4_RCC_APB2ENR, 20, "spi5", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, > - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, > }; > > static const struct stm32f4_gate_data stm32f469_gates[] __initconst = { > @@ -211,7 +210,6 @@ static const struct stm32f4_gate_data stm32f469_gates[] __initconst = { > { STM32F4_RCC_APB2ENR, 20, "spi5", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, > - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, > }; > > static const struct stm32f4_gate_data stm32f746_gates[] __initconst = { > @@ -286,7 +284,6 @@ static const struct stm32f4_gate_data stm32f746_gates[] __initconst = { > { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 23, "sai2", "apb2_div" }, > - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, > }; > > static const struct stm32f4_gate_data stm32f769_gates[] __initconst = { > @@ -364,7 +361,6 @@ static const struct stm32f4_gate_data stm32f769_gates[] __initconst = { > { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 23, "sai2", "apb2_div" }, > - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 30, "mdio", "apb2_div" }, > }; > > -- > 2.7.4 > ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v6 09/10] clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after system enter shell 2021-10-22 7:25 ` Dillon Min @ 2021-10-22 9:10 ` gabriel.fernandez 2021-10-22 9:14 ` Dillon Min 0 siblings, 1 reply; 14+ messages in thread From: gabriel.fernandez @ 2021-10-22 9:10 UTC (permalink / raw) To: Dillon Min, Mauro Carvalho Chehab, mchehab+huawei, Hans Verkuil, ezequiel, gnurou, Pi-Hsun Shih, Maxime Coquelin, Alexandre TORGUE, Michael Turquette, Stephen Boyd, Rob Herring, gabriel.fernandez Cc: Patrice CHOTARD, hugues.fruchet, linux-media, Linux Kernel Mailing List, linux-stm32, Linux ARM, linux-clk, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS Hi Dillon, You can add my Acked-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Best Regards Gabriel On 10/22/21 9:25 AM, Dillon Min wrote: > Hi Gabriel > > I guess you are the maintainer of stm32 clk subsystem from [1], Could > you help to review this patch, just give a brief of the history: > > - this patch was acked by Stephen Boyd at [2]. > - reviewed by Patrice Chotard at [3]. > > Without this patch , the kernel will turn off ltdc's clk after the > system reach shell. > > [1] https://lore.kernel.org/lkml/AM8PR10MB4785545DC980090C1E7D66B281009@AM8PR10MB4785.EURPRD10.PROD.OUTLOOK.COM/ > > [2] https://lore.kernel.org/linux-arm-kernel/159056850835.88029.9264848839121822798@swboyd.mtv.corp.google.com/ > > [3] https://lore.kernel.org/lkml/6915fa2a-e211-476f-8317-6825e280c322@foss.st.com/#t > > Best Regards > Dillon > > On Tue, 19 Oct 2021 at 16:44, Dillon Min <dillon.minfei@gmail.com> wrote: >> >> stm32's clk driver register two ltdc gate clk to clk core by >> clk_hw_register_gate() and clk_hw_register_composite() >> >> first: 'stm32f429_gates[]', clk name is 'ltdc', which no user to use. >> second: 'stm32f429_aux_clk[]', clk name is 'lcd-tft', used by ltdc driver >> >> both of them point to the same offset of stm32's RCC register. after >> kernel enter console, clk core turn off ltdc's clk as 'stm32f429_gates[]' >> is no one to use. but, actually 'stm32f429_aux_clk[]' is in use. >> >> stm32f469/746/769 have the same issue, fix it. >> >> Fixes: daf2d117cbca ("clk: stm32f4: Add lcd-tft clock") >> Acked-by: Stephen Boyd <sboyd@kernel.org> >> Link: https://lore.kernel.org/linux-arm-kernel/1590564453-24499-7-git-send-email-dillon.minfei@gmail.com/ >> Link: https://lore.kernel.org/lkml/CAPTRvHkf0cK_4ZidM17rPo99gWDmxgqFt4CDUjqFFwkOeQeFDg@mail.gmail.com/ >> Signed-off-by: Dillon Min <dillon.minfei@gmail.com> >> --- >> v6: no change. >> >> drivers/clk/clk-stm32f4.c | 4 ---- >> 1 file changed, 4 deletions(-) >> >> diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c >> index af46176ad053..473dfe632cc5 100644 >> --- a/drivers/clk/clk-stm32f4.c >> +++ b/drivers/clk/clk-stm32f4.c >> @@ -129,7 +129,6 @@ static const struct stm32f4_gate_data stm32f429_gates[] __initconst = { >> { STM32F4_RCC_APB2ENR, 20, "spi5", "apb2_div" }, >> { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, >> { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, >> - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, >> }; >> >> static const struct stm32f4_gate_data stm32f469_gates[] __initconst = { >> @@ -211,7 +210,6 @@ static const struct stm32f4_gate_data stm32f469_gates[] __initconst = { >> { STM32F4_RCC_APB2ENR, 20, "spi5", "apb2_div" }, >> { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, >> { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, >> - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, >> }; >> >> static const struct stm32f4_gate_data stm32f746_gates[] __initconst = { >> @@ -286,7 +284,6 @@ static const struct stm32f4_gate_data stm32f746_gates[] __initconst = { >> { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, >> { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, >> { STM32F4_RCC_APB2ENR, 23, "sai2", "apb2_div" }, >> - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, >> }; >> >> static const struct stm32f4_gate_data stm32f769_gates[] __initconst = { >> @@ -364,7 +361,6 @@ static const struct stm32f4_gate_data stm32f769_gates[] __initconst = { >> { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, >> { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, >> { STM32F4_RCC_APB2ENR, 23, "sai2", "apb2_div" }, >> - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, >> { STM32F4_RCC_APB2ENR, 30, "mdio", "apb2_div" }, >> }; >> >> -- >> 2.7.4 >> ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v6 09/10] clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after system enter shell 2021-10-22 9:10 ` gabriel.fernandez @ 2021-10-22 9:14 ` Dillon Min 0 siblings, 0 replies; 14+ messages in thread From: Dillon Min @ 2021-10-22 9:14 UTC (permalink / raw) To: gabriel.fernandez Cc: Mauro Carvalho Chehab, mchehab+huawei, Hans Verkuil, ezequiel, gnurou, Pi-Hsun Shih, Maxime Coquelin, Alexandre TORGUE, Michael Turquette, Stephen Boyd, Rob Herring, gabriel.fernandez, Patrice CHOTARD, hugues.fruchet, linux-media, Linux Kernel Mailing List, linux-stm32, Linux ARM, linux-clk, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS Hi Gabriel Thanks for the quick response. Best Regards Dillon On Fri, 22 Oct 2021 at 17:10, gabriel.fernandez@foss.st.com <gabriel.fernandez@foss.st.com> wrote: > > Hi Dillon, > > You can add my Acked-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> > > Best Regards > Gabriel > > On 10/22/21 9:25 AM, Dillon Min wrote: > > Hi Gabriel > > > > I guess you are the maintainer of stm32 clk subsystem from [1], Could > > you help to review this patch, just give a brief of the history: > > > > - this patch was acked by Stephen Boyd at [2]. > > - reviewed by Patrice Chotard at [3]. > > > > Without this patch , the kernel will turn off ltdc's clk after the > > system reach shell. > > > > [1] https://lore.kernel.org/lkml/AM8PR10MB4785545DC980090C1E7D66B281009@AM8PR10MB4785.EURPRD10.PROD.OUTLOOK.COM/ > > > > [2] https://lore.kernel.org/linux-arm-kernel/159056850835.88029.9264848839121822798@swboyd.mtv.corp.google.com/ > > > > [3] https://lore.kernel.org/lkml/6915fa2a-e211-476f-8317-6825e280c322@foss.st.com/#t > > > > Best Regards > > Dillon > > > > On Tue, 19 Oct 2021 at 16:44, Dillon Min <dillon.minfei@gmail.com> wrote: > >> > >> stm32's clk driver register two ltdc gate clk to clk core by > >> clk_hw_register_gate() and clk_hw_register_composite() > >> > >> first: 'stm32f429_gates[]', clk name is 'ltdc', which no user to use. > >> second: 'stm32f429_aux_clk[]', clk name is 'lcd-tft', used by ltdc driver > >> > >> both of them point to the same offset of stm32's RCC register. after > >> kernel enter console, clk core turn off ltdc's clk as 'stm32f429_gates[]' > >> is no one to use. but, actually 'stm32f429_aux_clk[]' is in use. > >> > >> stm32f469/746/769 have the same issue, fix it. > >> > >> Fixes: daf2d117cbca ("clk: stm32f4: Add lcd-tft clock") > >> Acked-by: Stephen Boyd <sboyd@kernel.org> > >> Link: https://lore.kernel.org/linux-arm-kernel/1590564453-24499-7-git-send-email-dillon.minfei@gmail.com/ > >> Link: https://lore.kernel.org/lkml/CAPTRvHkf0cK_4ZidM17rPo99gWDmxgqFt4CDUjqFFwkOeQeFDg@mail.gmail.com/ > >> Signed-off-by: Dillon Min <dillon.minfei@gmail.com> > >> --- > >> v6: no change. > >> > >> drivers/clk/clk-stm32f4.c | 4 ---- > >> 1 file changed, 4 deletions(-) > >> > >> diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c > >> index af46176ad053..473dfe632cc5 100644 > >> --- a/drivers/clk/clk-stm32f4.c > >> +++ b/drivers/clk/clk-stm32f4.c > >> @@ -129,7 +129,6 @@ static const struct stm32f4_gate_data stm32f429_gates[] __initconst = { > >> { STM32F4_RCC_APB2ENR, 20, "spi5", "apb2_div" }, > >> { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, > >> { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, > >> - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, > >> }; > >> > >> static const struct stm32f4_gate_data stm32f469_gates[] __initconst = { > >> @@ -211,7 +210,6 @@ static const struct stm32f4_gate_data stm32f469_gates[] __initconst = { > >> { STM32F4_RCC_APB2ENR, 20, "spi5", "apb2_div" }, > >> { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, > >> { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, > >> - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, > >> }; > >> > >> static const struct stm32f4_gate_data stm32f746_gates[] __initconst = { > >> @@ -286,7 +284,6 @@ static const struct stm32f4_gate_data stm32f746_gates[] __initconst = { > >> { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, > >> { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, > >> { STM32F4_RCC_APB2ENR, 23, "sai2", "apb2_div" }, > >> - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, > >> }; > >> > >> static const struct stm32f4_gate_data stm32f769_gates[] __initconst = { > >> @@ -364,7 +361,6 @@ static const struct stm32f4_gate_data stm32f769_gates[] __initconst = { > >> { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, > >> { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, > >> { STM32F4_RCC_APB2ENR, 23, "sai2", "apb2_div" }, > >> - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, > >> { STM32F4_RCC_APB2ENR, 30, "mdio", "apb2_div" }, > >> }; > >> > >> -- > >> 2.7.4 > >> ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v6 10/10] media: stm32-dma2d: STM32 DMA2D driver 2021-10-19 8:43 [PATCH v6 00/10] Add support for DMA2D of STMicroelectronics STM32 Soc series Dillon Min ` (8 preceding siblings ...) 2021-10-19 8:43 ` [PATCH v6 09/10] clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after system enter shell Dillon Min @ 2021-10-19 8:43 ` Dillon Min 9 siblings, 0 replies; 14+ messages in thread From: Dillon Min @ 2021-10-19 8:43 UTC (permalink / raw) To: mchehab, mchehab+huawei, hverkuil-cisco, ezequiel, gnurou, pihsun, mcoquelin.stm32, alexandre.torgue, mturquette, sboyd, robh+dt, gabriel.fernandez, gabriel.fernandez Cc: patrice.chotard, hugues.fruchet, linux-media, linux-kernel, linux-stm32, linux-arm-kernel, linux-clk, devicetree This V4L2 subdev m2m driver enables Chrom-Art Accelerator unit of STMicroelectronics STM32 SoC series. Currently support r2m, m2m, m2m_pfc functions. - r2m, Filling a part or the whole of a destination image with a specific color. - m2m, Copying a part or the whole of a source image into a part or the whole of a destination. - m2m_pfc, Copying a part or the whole of a source image into a part or the whole of a destination image with a pixel format conversion. Signed-off-by: Dillon Min <dillon.minfei@gmail.com> --- v6: use 2592x2592 instead of 0x3fff, 0xffff. drivers/media/platform/Kconfig | 11 + drivers/media/platform/Makefile | 1 + drivers/media/platform/stm32/Makefile | 2 + drivers/media/platform/stm32/dma2d/dma2d-hw.c | 143 +++++ drivers/media/platform/stm32/dma2d/dma2d-regs.h | 113 ++++ drivers/media/platform/stm32/dma2d/dma2d.c | 739 ++++++++++++++++++++++++ drivers/media/platform/stm32/dma2d/dma2d.h | 135 +++++ 7 files changed, 1144 insertions(+) create mode 100644 drivers/media/platform/stm32/dma2d/dma2d-hw.c create mode 100644 drivers/media/platform/stm32/dma2d/dma2d-regs.h create mode 100644 drivers/media/platform/stm32/dma2d/dma2d.c create mode 100644 drivers/media/platform/stm32/dma2d/dma2d.h diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index d9f90084c2f6..0b3bdf56b44e 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig @@ -476,6 +476,17 @@ config VIDEO_STI_DELTA_DRIVER endif # VIDEO_STI_DELTA +config VIDEO_STM32_DMA2D + tristate "STM32 Chrom-Art Accelerator (DMA2D)" + depends on (VIDEO_DEV && VIDEO_V4L2 && ARCH_STM32) || COMPILE_TEST + select VIDEOBUF2_DMA_CONTIG + select V4L2_MEM2MEM_DEV + help + Enables DMA2D hwarware support on stm32. + + The STM32 DMA2D is a memory-to-memory engine for pixel conversion + and specialized DMA dedicated to image manipulation. + config VIDEO_RENESAS_FDP1 tristate "Renesas Fine Display Processor" depends on VIDEO_DEV && VIDEO_V4L2 diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile index 73ce083c2fc6..46f1c05bc576 100644 --- a/drivers/media/platform/Makefile +++ b/drivers/media/platform/Makefile @@ -70,6 +70,7 @@ obj-$(CONFIG_VIDEO_ATMEL_ISI) += atmel/ obj-$(CONFIG_VIDEO_ATMEL_XISC) += atmel/ obj-$(CONFIG_VIDEO_STM32_DCMI) += stm32/ +obj-$(CONFIG_VIDEO_STM32_DMA2D) += stm32/ obj-$(CONFIG_VIDEO_MEDIATEK_VPU) += mtk-vpu/ diff --git a/drivers/media/platform/stm32/Makefile b/drivers/media/platform/stm32/Makefile index 48b36db2c2e2..896ef98a73ab 100644 --- a/drivers/media/platform/stm32/Makefile +++ b/drivers/media/platform/stm32/Makefile @@ -1,2 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_VIDEO_STM32_DCMI) += stm32-dcmi.o +stm32-dma2d-objs := dma2d/dma2d.o dma2d/dma2d-hw.o +obj-$(CONFIG_VIDEO_STM32_DMA2D) += stm32-dma2d.o diff --git a/drivers/media/platform/stm32/dma2d/dma2d-hw.c b/drivers/media/platform/stm32/dma2d/dma2d-hw.c new file mode 100644 index 000000000000..8c1c664ab13b --- /dev/null +++ b/drivers/media/platform/stm32/dma2d/dma2d-hw.c @@ -0,0 +1,143 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * ST stm32 Chrom-Art - 2D Graphics Accelerator Driver + * + * Copyright (c) 2021 Dillon Min + * Dillon Min, <dillon.minfei@gmail.com> + * + * based on s5p-g2d + * + * Copyright (c) 2011 Samsung Electronics Co., Ltd. + * Kamil Debski, <k.debski@samsung.com> + */ + +#include <linux/io.h> + +#include "dma2d.h" +#include "dma2d-regs.h" + +static inline u32 reg_read(void __iomem *base, u32 reg) +{ + return readl_relaxed(base + reg); +} + +static inline void reg_write(void __iomem *base, u32 reg, u32 val) +{ + writel_relaxed(val, base + reg); +} + +static inline void reg_set(void __iomem *base, u32 reg, u32 mask) +{ + reg_write(base, reg, reg_read(base, reg) | mask); +} + +static inline void reg_clear(void __iomem *base, u32 reg, u32 mask) +{ + reg_write(base, reg, reg_read(base, reg) & ~mask); +} + +static inline void reg_update_bits(void __iomem *base, u32 reg, u32 mask, + u32 val) +{ + reg_write(base, reg, (reg_read(base, reg) & ~mask) | val); +} + +void dma2d_start(struct dma2d_dev *d) +{ + reg_update_bits(d->regs, DMA2D_CR_REG, CR_START, CR_START); +} + +u32 dma2d_get_int(struct dma2d_dev *d) +{ + return reg_read(d->regs, DMA2D_ISR_REG); +} + +void dma2d_clear_int(struct dma2d_dev *d) +{ + u32 isr_val = reg_read(d->regs, DMA2D_ISR_REG); + + reg_write(d->regs, DMA2D_IFCR_REG, isr_val & 0x003f); +} + +void dma2d_config_common(struct dma2d_dev *d, enum dma2d_op_mode op_mode, + u16 width, u16 height) +{ + reg_update_bits(d->regs, DMA2D_CR_REG, CR_MODE_MASK, + op_mode << CR_MODE_SHIFT); + + reg_write(d->regs, DMA2D_NLR_REG, (width << 16) | height); +} + +void dma2d_config_out(struct dma2d_dev *d, struct dma2d_frame *frm, + dma_addr_t o_addr) +{ + reg_update_bits(d->regs, DMA2D_CR_REG, CR_CEIE, CR_CEIE); + reg_update_bits(d->regs, DMA2D_CR_REG, CR_CTCIE, CR_CTCIE); + reg_update_bits(d->regs, DMA2D_CR_REG, CR_CAEIE, CR_CAEIE); + reg_update_bits(d->regs, DMA2D_CR_REG, CR_TCIE, CR_TCIE); + reg_update_bits(d->regs, DMA2D_CR_REG, CR_TEIE, CR_TEIE); + + if (frm->fmt->cmode >= CM_MODE_ARGB8888 && + frm->fmt->cmode <= CM_MODE_ARGB4444) + reg_update_bits(d->regs, DMA2D_OPFCCR_REG, OPFCCR_CM_MASK, + frm->fmt->cmode); + + reg_write(d->regs, DMA2D_OMAR_REG, o_addr); + + reg_write(d->regs, DMA2D_OCOLR_REG, + (frm->a_rgb[3] << 24) | + (frm->a_rgb[2] << 16) | + (frm->a_rgb[1] << 8) | + frm->a_rgb[0]); + + reg_update_bits(d->regs, DMA2D_OOR_REG, OOR_LO_MASK, + frm->line_offset & 0x3fff); +} + +void dma2d_config_fg(struct dma2d_dev *d, struct dma2d_frame *frm, + dma_addr_t f_addr) +{ + reg_write(d->regs, DMA2D_FGMAR_REG, f_addr); + reg_update_bits(d->regs, DMA2D_FGOR_REG, FGOR_LO_MASK, + frm->line_offset); + + if (frm->fmt->cmode >= CM_MODE_ARGB8888 && + frm->fmt->cmode <= CM_MODE_A4) + reg_update_bits(d->regs, DMA2D_FGPFCCR_REG, FGPFCCR_CM_MASK, + frm->fmt->cmode); + + reg_update_bits(d->regs, DMA2D_FGPFCCR_REG, FGPFCCR_AM_MASK, + (frm->a_mode << 16) & 0x03); + + reg_update_bits(d->regs, DMA2D_FGPFCCR_REG, FGPFCCR_ALPHA_MASK, + frm->a_rgb[3] << 24); + + reg_write(d->regs, DMA2D_FGCOLR_REG, + (frm->a_rgb[2] << 16) | + (frm->a_rgb[1] << 8) | + frm->a_rgb[0]); +} + +void dma2d_config_bg(struct dma2d_dev *d, struct dma2d_frame *frm, + dma_addr_t b_addr) +{ + reg_write(d->regs, DMA2D_BGMAR_REG, b_addr); + reg_update_bits(d->regs, DMA2D_BGOR_REG, BGOR_LO_MASK, + frm->line_offset); + + if (frm->fmt->cmode >= CM_MODE_ARGB8888 && + frm->fmt->cmode <= CM_MODE_A4) + reg_update_bits(d->regs, DMA2D_BGPFCCR_REG, BGPFCCR_CM_MASK, + frm->fmt->cmode); + + reg_update_bits(d->regs, DMA2D_BGPFCCR_REG, BGPFCCR_AM_MASK, + (frm->a_mode << 16) & 0x03); + + reg_update_bits(d->regs, DMA2D_BGPFCCR_REG, BGPFCCR_ALPHA_MASK, + frm->a_rgb[3] << 24); + + reg_write(d->regs, DMA2D_BGCOLR_REG, + (frm->a_rgb[2] << 16) | + (frm->a_rgb[1] << 8) | + frm->a_rgb[0]); +} diff --git a/drivers/media/platform/stm32/dma2d/dma2d-regs.h b/drivers/media/platform/stm32/dma2d/dma2d-regs.h new file mode 100644 index 000000000000..6444592d415b --- /dev/null +++ b/drivers/media/platform/stm32/dma2d/dma2d-regs.h @@ -0,0 +1,113 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * ST stm32 Chrom-Art - 2D Graphics Accelerator Driver + * + * Copyright (c) 2021 Dillon Min + * Dillon Min, <dillon.minfei@gmail.com> + * + * based on s5p-g2d + * + * Copyright (c) 2011 Samsung Electronics Co., Ltd. + * Kamil Debski, <k.debski@samsung.com> + */ + +#ifndef __DMA2D_REGS_H__ +#define __DMA2D_REGS_H__ + +#define DMA2D_CR_REG 0x0000 +#define CR_MODE_MASK GENMASK(17, 16) +#define CR_MODE_SHIFT 16 +#define CR_M2M 0x0000 +#define CR_M2M_PFC BIT(16) +#define CR_M2M_BLEND BIT(17) +#define CR_R2M (BIT(17) | BIT(16)) +#define CR_CEIE BIT(13) +#define CR_CTCIE BIT(12) +#define CR_CAEIE BIT(11) +#define CR_TWIE BIT(10) +#define CR_TCIE BIT(9) +#define CR_TEIE BIT(8) +#define CR_ABORT BIT(2) +#define CR_SUSP BIT(1) +#define CR_START BIT(0) + +#define DMA2D_ISR_REG 0x0004 +#define ISR_CEIF BIT(5) +#define ISR_CTCIF BIT(4) +#define ISR_CAEIF BIT(3) +#define ISR_TWIF BIT(2) +#define ISR_TCIF BIT(1) +#define ISR_TEIF BIT(0) + +#define DMA2D_IFCR_REG 0x0008 +#define IFCR_CCEIF BIT(5) +#define IFCR_CCTCIF BIT(4) +#define IFCR_CAECIF BIT(3) +#define IFCR_CTWIF BIT(2) +#define IFCR_CTCIF BIT(1) +#define IFCR_CTEIF BIT(0) + +#define DMA2D_FGMAR_REG 0x000c +#define DMA2D_FGOR_REG 0x0010 +#define FGOR_LO_MASK GENMASK(13, 0) + +#define DMA2D_BGMAR_REG 0x0014 +#define DMA2D_BGOR_REG 0x0018 +#define BGOR_LO_MASK GENMASK(13, 0) + +#define DMA2D_FGPFCCR_REG 0x001c +#define FGPFCCR_ALPHA_MASK GENMASK(31, 24) +#define FGPFCCR_AM_MASK GENMASK(17, 16) +#define FGPFCCR_CS_MASK GENMASK(15, 8) +#define FGPFCCR_START BIT(5) +#define FGPFCCR_CCM_RGB888 BIT(4) +#define FGPFCCR_CM_MASK GENMASK(3, 0) + +#define DMA2D_FGCOLR_REG 0x0020 +#define FGCOLR_REG_MASK GENMASK(23, 16) +#define FGCOLR_GREEN_MASK GENMASK(15, 8) +#define FGCOLR_BLUE_MASK GENMASK(7, 0) + +#define DMA2D_BGPFCCR_REG 0x0024 +#define BGPFCCR_ALPHA_MASK GENMASK(31, 24) +#define BGPFCCR_AM_MASK GENMASK(17, 16) +#define BGPFCCR_CS_MASK GENMASK(15, 8) +#define BGPFCCR_START BIT(5) +#define BGPFCCR_CCM_RGB888 BIT(4) +#define BGPFCCR_CM_MASK GENMASK(3, 0) + +#define DMA2D_BGCOLR_REG 0x0028 +#define BGCOLR_REG_MASK GENMASK(23, 16) +#define BGCOLR_GREEN_MASK GENMASK(15, 8) +#define BGCOLR_BLUE_MASK GENMASK(7, 0) + +#define DMA2D_OPFCCR_REG 0x0034 +#define OPFCCR_CM_MASK GENMASK(2, 0) + +#define DMA2D_OCOLR_REG 0x0038 +#define OCOLR_ALPHA_MASK GENMASK(31, 24) +#define OCOLR_RED_MASK GENMASK(23, 16) +#define OCOLR_GREEN_MASK GENMASK(15, 8) +#define OCOLR_BLUE_MASK GENMASK(7, 0) + +#define DMA2D_OMAR_REG 0x003c + +#define DMA2D_OOR_REG 0x0040 +#define OOR_LO_MASK GENMASK(13, 0) + +#define DMA2D_NLR_REG 0x0044 +#define NLR_PL_MASK GENMASK(29, 16) +#define NLR_NL_MASK GENMASK(15, 0) + +/* Hardware limits */ +#define MAX_WIDTH 2592 +#define MAX_HEIGHT 2592 + +#define DEFAULT_WIDTH 240 +#define DEFAULT_HEIGHT 320 +#define DEFAULT_SIZE 307200 + +#define CM_MODE_ARGB8888 0x00 +#define CM_MODE_ARGB4444 0x04 +#define CM_MODE_A4 0x0a +#endif /* __DMA2D_REGS_H__ */ diff --git a/drivers/media/platform/stm32/dma2d/dma2d.c b/drivers/media/platform/stm32/dma2d/dma2d.c new file mode 100644 index 000000000000..17af90d86898 --- /dev/null +++ b/drivers/media/platform/stm32/dma2d/dma2d.c @@ -0,0 +1,739 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * STM32 DMA2D - 2D Graphics Accelerator Driver + * + * Copyright (c) 2021 Dillon Min + * Dillon Min, <dillon.minfei@gmail.com> + * + * based on s5p-g2d + * + * Copyright (c) 2011 Samsung Electronics Co., Ltd. + * Kamil Debski, <k.debski@samsung.com> + */ + +#include <linux/module.h> +#include <linux/fs.h> +#include <linux/timer.h> +#include <linux/sched.h> +#include <linux/slab.h> +#include <linux/clk.h> +#include <linux/interrupt.h> +#include <linux/of.h> + +#include <linux/platform_device.h> +#include <media/v4l2-mem2mem.h> +#include <media/v4l2-device.h> +#include <media/v4l2-ioctl.h> +#include <media/v4l2-event.h> +#include <media/videobuf2-v4l2.h> +#include <media/videobuf2-dma-contig.h> + +#include "dma2d.h" +#include "dma2d-regs.h" + +/* + * This V4L2 subdev m2m driver enables Chrom-Art Accelerator unit + * of STMicroelectronics STM32 SoC series. + * + * Currently support r2m, m2m, m2m_pfc. + * + * - r2m, Filling a part or the whole of a destination image with a specific + * color. + * - m2m, Copying a part or the whole of a source image into a part or the + * whole of a destination. + * - m2m_pfc, Copying a part or the whole of a source image into a part or the + * whole of a destination image with a pixel format conversion. + */ + +#define fh2ctx(__fh) container_of(__fh, struct dma2d_ctx, fh) + +static const struct dma2d_fmt formats[] = { + { + .fourcc = V4L2_PIX_FMT_ARGB32, + .cmode = DMA2D_CMODE_ARGB8888, + .depth = 32, + }, + { + .fourcc = V4L2_PIX_FMT_RGB24, + .cmode = DMA2D_CMODE_RGB888, + .depth = 24, + }, + { + .fourcc = V4L2_PIX_FMT_RGB565, + .cmode = DMA2D_CMODE_RGB565, + .depth = 16, + }, + { + .fourcc = V4L2_PIX_FMT_ARGB555, + .cmode = DMA2D_CMODE_ARGB1555, + .depth = 16, + }, + { + .fourcc = V4L2_PIX_FMT_ARGB444, + .cmode = DMA2D_CMODE_ARGB4444, + .depth = 16, + }, +}; + +#define NUM_FORMATS ARRAY_SIZE(formats) + +static const struct dma2d_frame def_frame = { + .width = DEFAULT_WIDTH, + .height = DEFAULT_HEIGHT, + .line_offset = 0, + .a_rgb = {0x00, 0x00, 0x00, 0xff}, + .a_mode = DMA2D_ALPHA_MODE_NO_MODIF, + .fmt = (struct dma2d_fmt *)&formats[0], + .size = DEFAULT_SIZE, +}; + +static struct dma2d_fmt *find_fmt(int pixelformat) +{ + unsigned int i; + + for (i = 0; i < NUM_FORMATS; i++) { + if (formats[i].fourcc == pixelformat) + return (struct dma2d_fmt *)&formats[i]; + } + + return NULL; +} + +static struct dma2d_frame *get_frame(struct dma2d_ctx *ctx, + enum v4l2_buf_type type) +{ + return V4L2_TYPE_IS_OUTPUT(type) ? &ctx->cap : &ctx->out; +} + +static int dma2d_queue_setup(struct vb2_queue *vq, + unsigned int *nbuffers, unsigned int *nplanes, + unsigned int sizes[], struct device *alloc_devs[]) +{ + struct dma2d_ctx *ctx = vb2_get_drv_priv(vq); + struct dma2d_frame *f = get_frame(ctx, vq->type); + + if (*nplanes) + return sizes[0] < f->size ? -EINVAL : 0; + + sizes[0] = f->size; + *nplanes = 1; + + return 0; +} + +static int dma2d_buf_out_validate(struct vb2_buffer *vb) +{ + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + + if (vbuf->field == V4L2_FIELD_ANY) + vbuf->field = V4L2_FIELD_NONE; + if (vbuf->field != V4L2_FIELD_NONE) + return -EINVAL; + + return 0; +} + +static int dma2d_buf_prepare(struct vb2_buffer *vb) +{ + struct dma2d_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); + struct dma2d_frame *f = get_frame(ctx, vb->vb2_queue->type); + + if (vb2_plane_size(vb, 0) < f->size) + return -EINVAL; + + vb2_set_plane_payload(vb, 0, f->size); + + return 0; +} + +static void dma2d_buf_queue(struct vb2_buffer *vb) +{ + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + struct dma2d_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); + + v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf); +} + +static int dma2d_start_streaming(struct vb2_queue *q, unsigned int count) +{ + struct dma2d_ctx *ctx = vb2_get_drv_priv(q); + struct dma2d_frame *f = get_frame(ctx, q->type); + + f->sequence = 0; + return 0; +} + +static void dma2d_stop_streaming(struct vb2_queue *q) +{ + struct dma2d_ctx *ctx = vb2_get_drv_priv(q); + struct vb2_v4l2_buffer *vbuf; + + for (;;) { + if (V4L2_TYPE_IS_OUTPUT(q->type)) + vbuf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); + else + vbuf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); + if (!vbuf) + return; + v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_ERROR); + } +} + +static const struct vb2_ops dma2d_qops = { + .queue_setup = dma2d_queue_setup, + .buf_out_validate = dma2d_buf_out_validate, + .buf_prepare = dma2d_buf_prepare, + .buf_queue = dma2d_buf_queue, + .start_streaming = dma2d_start_streaming, + .stop_streaming = dma2d_stop_streaming, + .wait_prepare = vb2_ops_wait_prepare, + .wait_finish = vb2_ops_wait_finish, +}; + +static int queue_init(void *priv, struct vb2_queue *src_vq, + struct vb2_queue *dst_vq) +{ + struct dma2d_ctx *ctx = priv; + int ret; + + src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT; + src_vq->io_modes = VB2_MMAP | VB2_DMABUF; + src_vq->drv_priv = ctx; + src_vq->ops = &dma2d_qops; + src_vq->mem_ops = &vb2_dma_contig_memops; + src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); + src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; + src_vq->lock = &ctx->dev->mutex; + src_vq->dev = ctx->dev->v4l2_dev.dev; + + ret = vb2_queue_init(src_vq); + if (ret) + return ret; + + dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + dst_vq->io_modes = VB2_MMAP | VB2_DMABUF; + dst_vq->drv_priv = ctx; + dst_vq->ops = &dma2d_qops; + dst_vq->mem_ops = &vb2_dma_contig_memops; + dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); + dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; + dst_vq->lock = &ctx->dev->mutex; + dst_vq->dev = ctx->dev->v4l2_dev.dev; + + return vb2_queue_init(dst_vq); +} + +static int dma2d_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct dma2d_frame *frm; + struct dma2d_ctx *ctx = container_of(ctrl->handler, struct dma2d_ctx, + ctrl_handler); + unsigned long flags; + + spin_lock_irqsave(&ctx->dev->ctrl_lock, flags); + switch (ctrl->id) { + case V4L2_CID_COLORFX: + if (ctrl->val == V4L2_COLORFX_SET_RGB) + ctx->op_mode = DMA2D_MODE_R2M; + else if (ctrl->val == V4L2_COLORFX_NONE) + ctx->op_mode = DMA2D_MODE_M2M; + break; + case V4L2_CID_COLORFX_RGB: + frm = get_frame(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); + frm->a_rgb[2] = (ctrl->val >> 16) & 0xff; + frm->a_rgb[1] = (ctrl->val >> 8) & 0xff; + frm->a_rgb[0] = (ctrl->val >> 0) & 0xff; + break; + default: + spin_unlock_irqrestore(&ctx->dev->ctrl_lock, flags); + return -EINVAL; + } + spin_unlock_irqrestore(&ctx->dev->ctrl_lock, flags); + + return 0; +} + +static const struct v4l2_ctrl_ops dma2d_ctrl_ops = { + .s_ctrl = dma2d_s_ctrl, +}; + +static int dma2d_setup_ctrls(struct dma2d_ctx *ctx) +{ + struct v4l2_ctrl_handler *handler = &ctx->ctrl_handler; + + v4l2_ctrl_handler_init(handler, 2); + + v4l2_ctrl_new_std_menu(handler, &dma2d_ctrl_ops, V4L2_CID_COLORFX, + V4L2_COLORFX_SET_RGB, ~0x10001, + V4L2_COLORFX_NONE); + + v4l2_ctrl_new_std(handler, &dma2d_ctrl_ops, V4L2_CID_COLORFX_RGB, 0, + 0xffffff, 1, 0); + + return 0; +} + +static int dma2d_open(struct file *file) +{ + struct dma2d_dev *dev = video_drvdata(file); + struct dma2d_ctx *ctx = NULL; + int ret = 0; + + ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return -ENOMEM; + ctx->dev = dev; + /* Set default formats */ + ctx->cap = def_frame; + ctx->bg = def_frame; + ctx->out = def_frame; + ctx->op_mode = DMA2D_MODE_M2M_FPC; + ctx->colorspace = V4L2_COLORSPACE_REC709; + if (mutex_lock_interruptible(&dev->mutex)) { + kfree(ctx); + return -ERESTARTSYS; + } + + ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx, &queue_init); + if (IS_ERR(ctx->fh.m2m_ctx)) { + ret = PTR_ERR(ctx->fh.m2m_ctx); + mutex_unlock(&dev->mutex); + kfree(ctx); + return ret; + } + + v4l2_fh_init(&ctx->fh, video_devdata(file)); + file->private_data = &ctx->fh; + v4l2_fh_add(&ctx->fh); + + dma2d_setup_ctrls(ctx); + + /* Write the default values to the ctx struct */ + v4l2_ctrl_handler_setup(&ctx->ctrl_handler); + + ctx->fh.ctrl_handler = &ctx->ctrl_handler; + mutex_unlock(&dev->mutex); + + return 0; +} + +static int dma2d_release(struct file *file) +{ + struct dma2d_dev *dev = video_drvdata(file); + struct dma2d_ctx *ctx = fh2ctx(file->private_data); + + mutex_lock(&dev->mutex); + v4l2_m2m_ctx_release(ctx->fh.m2m_ctx); + mutex_unlock(&dev->mutex); + v4l2_ctrl_handler_free(&ctx->ctrl_handler); + v4l2_fh_del(&ctx->fh); + v4l2_fh_exit(&ctx->fh); + kfree(ctx); + + return 0; +} + +static int vidioc_querycap(struct file *file, void *priv, + struct v4l2_capability *cap) +{ + strscpy(cap->driver, DMA2D_NAME, sizeof(cap->driver)); + strscpy(cap->card, DMA2D_NAME, sizeof(cap->card)); + strscpy(cap->bus_info, BUS_INFO, sizeof(cap->bus_info)); + + return 0; +} + +static int vidioc_enum_fmt(struct file *file, void *prv, struct v4l2_fmtdesc *f) +{ + if (f->index >= NUM_FORMATS) + return -EINVAL; + + f->pixelformat = formats[f->index].fourcc; + return 0; +} + +static int vidioc_g_fmt(struct file *file, void *prv, struct v4l2_format *f) +{ + struct dma2d_ctx *ctx = prv; + struct vb2_queue *vq; + struct dma2d_frame *frm; + + vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); + if (!vq) + return -EINVAL; + + frm = get_frame(ctx, f->type); + f->fmt.pix.width = frm->width; + f->fmt.pix.height = frm->height; + f->fmt.pix.field = V4L2_FIELD_NONE; + f->fmt.pix.pixelformat = frm->fmt->fourcc; + f->fmt.pix.bytesperline = (frm->width * frm->fmt->depth) >> 3; + f->fmt.pix.sizeimage = frm->size; + f->fmt.pix.colorspace = ctx->colorspace; + f->fmt.pix.xfer_func = ctx->xfer_func; + f->fmt.pix.ycbcr_enc = ctx->ycbcr_enc; + f->fmt.pix.quantization = ctx->quant; + + return 0; +} + +static int vidioc_try_fmt(struct file *file, void *prv, struct v4l2_format *f) +{ + struct dma2d_ctx *ctx = prv; + struct dma2d_fmt *fmt; + enum v4l2_field *field; + u32 fourcc = f->fmt.pix.pixelformat; + + fmt = find_fmt(fourcc); + if (!fmt) { + f->fmt.pix.pixelformat = formats[0].fourcc; + fmt = find_fmt(f->fmt.pix.pixelformat); + } + + field = &f->fmt.pix.field; + if (*field == V4L2_FIELD_ANY) + *field = V4L2_FIELD_NONE; + else if (*field != V4L2_FIELD_NONE) + return -EINVAL; + + if (f->fmt.pix.width > MAX_WIDTH) + f->fmt.pix.width = MAX_WIDTH; + if (f->fmt.pix.height > MAX_HEIGHT) + f->fmt.pix.height = MAX_HEIGHT; + + if (f->fmt.pix.width < 1) + f->fmt.pix.width = 1; + if (f->fmt.pix.height < 1) + f->fmt.pix.height = 1; + + if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT && !f->fmt.pix.colorspace) { + f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709; + } else if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) { + f->fmt.pix.colorspace = ctx->colorspace; + f->fmt.pix.xfer_func = ctx->xfer_func; + f->fmt.pix.ycbcr_enc = ctx->ycbcr_enc; + f->fmt.pix.quantization = ctx->quant; + } + f->fmt.pix.bytesperline = (f->fmt.pix.width * fmt->depth) >> 3; + f->fmt.pix.sizeimage = f->fmt.pix.height * f->fmt.pix.bytesperline; + + return 0; +} + +static int vidioc_s_fmt(struct file *file, void *prv, struct v4l2_format *f) +{ + struct dma2d_ctx *ctx = prv; + struct vb2_queue *vq; + struct dma2d_frame *frm; + struct dma2d_fmt *fmt; + int ret = 0; + + /* Adjust all values accordingly to the hardware capabilities + * and chosen format. + */ + ret = vidioc_try_fmt(file, prv, f); + if (ret) + return ret; + + vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); + if (vb2_is_busy(vq)) + return -EBUSY; + + fmt = find_fmt(f->fmt.pix.pixelformat); + if (!fmt) + return -EINVAL; + + if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) { + ctx->colorspace = f->fmt.pix.colorspace; + ctx->xfer_func = f->fmt.pix.xfer_func; + ctx->ycbcr_enc = f->fmt.pix.ycbcr_enc; + ctx->quant = f->fmt.pix.quantization; + } + + frm = get_frame(ctx, f->type); + frm->width = f->fmt.pix.width; + frm->height = f->fmt.pix.height; + frm->size = f->fmt.pix.sizeimage; + /* Reset crop settings */ + frm->o_width = 0; + frm->o_height = 0; + frm->c_width = frm->width; + frm->c_height = frm->height; + frm->right = frm->width; + frm->bottom = frm->height; + frm->fmt = fmt; + frm->line_offset = 0; + + return 0; +} + +static void device_run(void *prv) +{ + struct dma2d_ctx *ctx = prv; + struct dma2d_dev *dev = ctx->dev; + struct dma2d_frame *frm_out, *frm_cap; + struct vb2_v4l2_buffer *src, *dst; + unsigned long flags; + + spin_lock_irqsave(&dev->ctrl_lock, flags); + dev->curr = ctx; + + src = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); + dst = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); + if (!dst || !src) + goto end; + + frm_cap = get_frame(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); + frm_out = get_frame(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT); + if (!frm_cap || !frm_out) + goto end; + + src->sequence = frm_out->sequence++; + dst->sequence = frm_cap->sequence++; + v4l2_m2m_buf_copy_metadata(src, dst, true); + + clk_enable(dev->gate); + + dma2d_config_fg(dev, frm_out, + vb2_dma_contig_plane_dma_addr(&src->vb2_buf, 0)); + + /* TODO: add M2M_BLEND handler here */ + + if (ctx->op_mode != DMA2D_MODE_R2M) { + if (frm_out->fmt->fourcc == frm_cap->fmt->fourcc) + ctx->op_mode = DMA2D_MODE_M2M; + else + ctx->op_mode = DMA2D_MODE_M2M_FPC; + } + + dma2d_config_out(dev, frm_cap, + vb2_dma_contig_plane_dma_addr(&dst->vb2_buf, 0)); + dma2d_config_common(dev, ctx->op_mode, frm_cap->width, frm_cap->height); + + dma2d_start(dev); +end: + spin_unlock_irqrestore(&dev->ctrl_lock, flags); +} + +static irqreturn_t dma2d_isr(int irq, void *prv) +{ + struct dma2d_dev *dev = prv; + struct dma2d_ctx *ctx = dev->curr; + struct vb2_v4l2_buffer *src, *dst; + u32 s = dma2d_get_int(dev); + + dma2d_clear_int(dev); + if (s & ISR_TCIF || s == 0) { + clk_disable(dev->gate); + + WARN_ON(!ctx); + + src = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); + dst = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); + + WARN_ON(!dst); + WARN_ON(!src); + + v4l2_m2m_buf_done(src, VB2_BUF_STATE_DONE); + v4l2_m2m_buf_done(dst, VB2_BUF_STATE_DONE); + v4l2_m2m_job_finish(dev->m2m_dev, ctx->fh.m2m_ctx); + + dev->curr = NULL; + } + + return IRQ_HANDLED; +} + +static const struct v4l2_file_operations dma2d_fops = { + .owner = THIS_MODULE, + .open = dma2d_open, + .release = dma2d_release, + .poll = v4l2_m2m_fop_poll, + .unlocked_ioctl = video_ioctl2, + .mmap = v4l2_m2m_fop_mmap, +#ifndef CONFIG_MMU + .get_unmapped_area = v4l2_m2m_get_unmapped_area, +#endif +}; + +static const struct v4l2_ioctl_ops dma2d_ioctl_ops = { + .vidioc_querycap = vidioc_querycap, + + .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt, + .vidioc_g_fmt_vid_cap = vidioc_g_fmt, + .vidioc_try_fmt_vid_cap = vidioc_try_fmt, + .vidioc_s_fmt_vid_cap = vidioc_s_fmt, + + .vidioc_enum_fmt_vid_out = vidioc_enum_fmt, + .vidioc_g_fmt_vid_out = vidioc_g_fmt, + .vidioc_try_fmt_vid_out = vidioc_try_fmt, + .vidioc_s_fmt_vid_out = vidioc_s_fmt, + + .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs, + .vidioc_querybuf = v4l2_m2m_ioctl_querybuf, + .vidioc_qbuf = v4l2_m2m_ioctl_qbuf, + .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf, + .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf, + .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs, + .vidioc_expbuf = v4l2_m2m_ioctl_expbuf, + + .vidioc_streamon = v4l2_m2m_ioctl_streamon, + .vidioc_streamoff = v4l2_m2m_ioctl_streamoff, + + .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, + .vidioc_unsubscribe_event = v4l2_event_unsubscribe, +}; + +static const struct video_device dma2d_videodev = { + .name = DMA2D_NAME, + .fops = &dma2d_fops, + .ioctl_ops = &dma2d_ioctl_ops, + .minor = -1, + .release = video_device_release, + .vfl_dir = VFL_DIR_M2M, +}; + +static const struct v4l2_m2m_ops dma2d_m2m_ops = { + .device_run = device_run, +}; + +static const struct of_device_id stm32_dma2d_match[]; + +static int dma2d_probe(struct platform_device *pdev) +{ + struct dma2d_dev *dev; + struct video_device *vfd; + struct resource *res; + int ret = 0; + + dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + spin_lock_init(&dev->ctrl_lock); + mutex_init(&dev->mutex); + atomic_set(&dev->num_inst, 0); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + + dev->regs = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(dev->regs)) + return PTR_ERR(dev->regs); + + dev->gate = clk_get(&pdev->dev, "dma2d"); + if (IS_ERR(dev->gate)) { + dev_err(&pdev->dev, "failed to get dma2d clock gate\n"); + ret = -ENXIO; + return ret; + } + + ret = clk_prepare(dev->gate); + if (ret) { + dev_err(&pdev->dev, "failed to prepare dma2d clock gate\n"); + goto put_clk_gate; + } + + res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (!res) { + dev_err(&pdev->dev, "failed to find IRQ\n"); + ret = -ENXIO; + goto unprep_clk_gate; + } + + dev->irq = res->start; + + ret = devm_request_irq(&pdev->dev, dev->irq, dma2d_isr, + 0, pdev->name, dev); + if (ret) { + dev_err(&pdev->dev, "failed to install IRQ\n"); + goto unprep_clk_gate; + } + + ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev); + if (ret) + goto unprep_clk_gate; + + vfd = video_device_alloc(); + if (!vfd) { + v4l2_err(&dev->v4l2_dev, "Failed to allocate video device\n"); + ret = -ENOMEM; + goto unreg_v4l2_dev; + } + + *vfd = dma2d_videodev; + vfd->lock = &dev->mutex; + vfd->v4l2_dev = &dev->v4l2_dev; + vfd->device_caps = V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING; + + platform_set_drvdata(pdev, dev); + dev->m2m_dev = v4l2_m2m_init(&dma2d_m2m_ops); + if (IS_ERR(dev->m2m_dev)) { + v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n"); + ret = PTR_ERR(dev->m2m_dev); + goto rel_vdev; + } + + ret = video_register_device(vfd, VFL_TYPE_VIDEO, 0); + if (ret) { + v4l2_err(&dev->v4l2_dev, "Failed to register video device\n"); + goto free_m2m; + } + + video_set_drvdata(vfd, dev); + dev->vfd = vfd; + v4l2_info(&dev->v4l2_dev, "device registered as /dev/video%d\n", + vfd->num); + return 0; + +free_m2m: + v4l2_m2m_release(dev->m2m_dev); +rel_vdev: + video_device_release(vfd); +unreg_v4l2_dev: + v4l2_device_unregister(&dev->v4l2_dev); +unprep_clk_gate: + clk_unprepare(dev->gate); +put_clk_gate: + clk_put(dev->gate); + + return ret; +} + +static int dma2d_remove(struct platform_device *pdev) +{ + struct dma2d_dev *dev = platform_get_drvdata(pdev); + + v4l2_info(&dev->v4l2_dev, "Removing " DMA2D_NAME); + v4l2_m2m_release(dev->m2m_dev); + video_unregister_device(dev->vfd); + v4l2_device_unregister(&dev->v4l2_dev); + vb2_dma_contig_clear_max_seg_size(&pdev->dev); + clk_unprepare(dev->gate); + clk_put(dev->gate); + + return 0; +} + +static const struct of_device_id stm32_dma2d_match[] = { + { + .compatible = "st,stm32-dma2d", + .data = NULL, + }, + {}, +}; +MODULE_DEVICE_TABLE(of, stm32_dma2d_match); + +static struct platform_driver dma2d_pdrv = { + .probe = dma2d_probe, + .remove = dma2d_remove, + .driver = { + .name = DMA2D_NAME, + .of_match_table = stm32_dma2d_match, + }, +}; + +module_platform_driver(dma2d_pdrv); + +MODULE_AUTHOR("Dillon Min <dillon.minfei@gmail.com>"); +MODULE_DESCRIPTION("STM32 Chrom-Art Accelerator DMA2D driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/media/platform/stm32/dma2d/dma2d.h b/drivers/media/platform/stm32/dma2d/dma2d.h new file mode 100644 index 000000000000..3f03a7ca9ee3 --- /dev/null +++ b/drivers/media/platform/stm32/dma2d/dma2d.h @@ -0,0 +1,135 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * ST stm32 DMA2D - 2D Graphics Accelerator Driver + * + * Copyright (c) 2021 Dillon Min + * Dillon Min, <dillon.minfei@gmail.com> + * + * based on s5p-g2d + * + * Copyright (c) 2011 Samsung Electronics Co., Ltd. + * Kamil Debski, <k.debski@samsung.com> + */ + +#ifndef __DMA2D_H__ +#define __DMA2D_H__ + +#include <linux/platform_device.h> +#include <media/v4l2-device.h> +#include <media/v4l2-ctrls.h> + +#define DMA2D_NAME "stm-dma2d" +#define BUS_INFO "platform:stm-dma2d" +enum dma2d_op_mode { + DMA2D_MODE_M2M, + DMA2D_MODE_M2M_FPC, + DMA2D_MODE_M2M_BLEND, + DMA2D_MODE_R2M +}; + +enum dma2d_cmode { + /* output pfc cmode from ARGB888 to ARGB4444 */ + DMA2D_CMODE_ARGB8888, + DMA2D_CMODE_RGB888, + DMA2D_CMODE_RGB565, + DMA2D_CMODE_ARGB1555, + DMA2D_CMODE_ARGB4444, + /* bg or fg pfc cmode from L8 to A4 */ + DMA2D_CMODE_L8, + DMA2D_CMODE_AL44, + DMA2D_CMODE_AL88, + DMA2D_CMODE_L4, + DMA2D_CMODE_A8, + DMA2D_CMODE_A4 +}; + +enum dma2d_alpha_mode { + DMA2D_ALPHA_MODE_NO_MODIF, + DMA2D_ALPHA_MODE_REPLACE, + DMA2D_ALPHA_MODE_COMBINE +}; + +struct dma2d_fmt { + u32 fourcc; + int depth; + enum dma2d_cmode cmode; +}; + +struct dma2d_frame { + /* Original dimensions */ + u32 width; + u32 height; + /* Crop size */ + u32 c_width; + u32 c_height; + /* Offset */ + u32 o_width; + u32 o_height; + u32 bottom; + u32 right; + u16 line_offset; + /* Image format */ + struct dma2d_fmt *fmt; + /* [0]: blue + * [1]: green + * [2]: red + * [3]: alpha + */ + u8 a_rgb[4]; + /* + * AM[1:0] of DMA2D_FGPFCCR + */ + enum dma2d_alpha_mode a_mode; + u32 size; + unsigned int sequence; +}; + +struct dma2d_ctx { + struct v4l2_fh fh; + struct dma2d_dev *dev; + struct dma2d_frame cap; + struct dma2d_frame out; + struct dma2d_frame bg; + /* fb_buf always point to bg address */ + struct v4l2_framebuffer fb_buf; + /* + * MODE[17:16] of DMA2D_CR + */ + enum dma2d_op_mode op_mode; + struct v4l2_ctrl_handler ctrl_handler; + enum v4l2_colorspace colorspace; + enum v4l2_ycbcr_encoding ycbcr_enc; + enum v4l2_xfer_func xfer_func; + enum v4l2_quantization quant; +}; + +struct dma2d_dev { + struct v4l2_device v4l2_dev; + struct v4l2_m2m_dev *m2m_dev; + struct video_device *vfd; + /* for device open/close etc */ + struct mutex mutex; + /* to avoid the conflict with device running and user setting + * at the same time + */ + spinlock_t ctrl_lock; + atomic_t num_inst; + void __iomem *regs; + struct clk *gate; + struct dma2d_ctx *curr; + int irq; +}; + +void dma2d_start(struct dma2d_dev *d); +u32 dma2d_get_int(struct dma2d_dev *d); +void dma2d_clear_int(struct dma2d_dev *d); +void dma2d_config_out(struct dma2d_dev *d, struct dma2d_frame *frm, + dma_addr_t o_addr); +void dma2d_config_fg(struct dma2d_dev *d, struct dma2d_frame *frm, + dma_addr_t f_addr); +void dma2d_config_bg(struct dma2d_dev *d, struct dma2d_frame *frm, + dma_addr_t b_addr); +void dma2d_config_common(struct dma2d_dev *d, enum dma2d_op_mode op_mode, + u16 width, u16 height); + +#endif /* __DMA2D_H__ */ -- 2.7.4 ^ permalink raw reply related [flat|nested] 14+ messages in thread
end of thread, other threads:[~2021-10-22 9:15 UTC | newest] Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-10-19 8:43 [PATCH v6 00/10] Add support for DMA2D of STMicroelectronics STM32 Soc series Dillon Min 2021-10-19 8:43 ` [PATCH v6 01/10] media: admin-guide: add stm32-dma2d description Dillon Min 2021-10-19 8:43 ` [PATCH v6 02/10] media: dt-bindings: media: add document for STM32 DMA2d bindings Dillon Min 2021-10-19 8:43 ` [PATCH v6 03/10] ARM: dts: stm32: Add DMA2D support for STM32F429 series soc Dillon Min 2021-10-19 8:43 ` [PATCH v6 04/10] ARM: dts: stm32: Enable DMA2D on STM32F469-DISCO board Dillon Min 2021-10-19 8:43 ` [PATCH v6 05/10] media: v4l2-mem2mem: add v4l2_m2m_get_unmapped_area for no-mmu platform Dillon Min 2021-10-19 8:43 ` [PATCH v6 06/10] media: videobuf2: Fix the size printk format Dillon Min 2021-10-19 8:43 ` [PATCH v6 07/10] media: v4l2-ctrls: Add V4L2_CID_COLORFX_CBCR max setting Dillon Min 2021-10-19 8:43 ` [PATCH v6 08/10] media: v4l2-ctrls: Add RGB color effects control Dillon Min 2021-10-19 8:43 ` [PATCH v6 09/10] clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after system enter shell Dillon Min 2021-10-22 7:25 ` Dillon Min 2021-10-22 9:10 ` gabriel.fernandez 2021-10-22 9:14 ` Dillon Min 2021-10-19 8:43 ` [PATCH v6 10/10] media: stm32-dma2d: STM32 DMA2D driver Dillon Min
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