linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: "tip-bot2 for Thomas Gleixner" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Borislav Petkov <bp@suse.de>,
	x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: x86/fpu] x86/fpu: Move fpregs_restore_userregs() to core
Date: Wed, 20 Oct 2021 13:44:32 -0000	[thread overview]
Message-ID: <163473747212.25758.16427292081904612917.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20211015011539.686806639@linutronix.de>

The following commit has been merged into the x86/fpu branch of tip:

Commit-ID:     9848fb96839bfd6ad4c00748842ccfd5bd3b0346
Gitweb:        https://git.kernel.org/tip/9848fb96839bfd6ad4c00748842ccfd5bd3b0346
Author:        Thomas Gleixner <tglx@linutronix.de>
AuthorDate:    Fri, 15 Oct 2021 03:16:30 +02:00
Committer:     Borislav Petkov <bp@suse.de>
CommitterDate: Wed, 20 Oct 2021 15:27:28 +02:00

x86/fpu: Move fpregs_restore_userregs() to core

Only used internally in the FPU core code.

While at it, convert to the percpu accessors which verify preemption is
disabled.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20211015011539.686806639@linutronix.de
---
 arch/x86/include/asm/fpu/internal.h | 83 +---------------------------
 arch/x86/kernel/fpu/context.h       | 85 ++++++++++++++++++++++++++++-
 arch/x86/kernel/fpu/core.c          |  1 +-
 arch/x86/kernel/fpu/regset.c        |  1 +-
 arch/x86/kernel/fpu/signal.c        |  1 +-
 5 files changed, 88 insertions(+), 83 deletions(-)
 create mode 100644 arch/x86/kernel/fpu/context.h

diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h
index f8413a5..74b7cc3 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -55,89 +55,6 @@ extern void restore_fpregs_from_fpstate(union fpregs_state *fpstate, u64 mask);
 
 extern bool copy_fpstate_to_sigframe(void __user *buf, void __user *fp, int size);
 
-/*
- * FPU context switch related helper methods:
- */
-
 DECLARE_PER_CPU(struct fpu *, fpu_fpregs_owner_ctx);
 
-/*
- * The in-register FPU state for an FPU context on a CPU is assumed to be
- * valid if the fpu->last_cpu matches the CPU, and the fpu_fpregs_owner_ctx
- * matches the FPU.
- *
- * If the FPU register state is valid, the kernel can skip restoring the
- * FPU state from memory.
- *
- * Any code that clobbers the FPU registers or updates the in-memory
- * FPU state for a task MUST let the rest of the kernel know that the
- * FPU registers are no longer valid for this task.
- *
- * Either one of these invalidation functions is enough. Invalidate
- * a resource you control: CPU if using the CPU for something else
- * (with preemption disabled), FPU for the current task, or a task that
- * is prevented from running by the current task.
- */
-static inline void __cpu_invalidate_fpregs_state(void)
-{
-	__this_cpu_write(fpu_fpregs_owner_ctx, NULL);
-}
-
-static inline void __fpu_invalidate_fpregs_state(struct fpu *fpu)
-{
-	fpu->last_cpu = -1;
-}
-
-static inline int fpregs_state_valid(struct fpu *fpu, unsigned int cpu)
-{
-	return fpu == this_cpu_read(fpu_fpregs_owner_ctx) && cpu == fpu->last_cpu;
-}
-
-/*
- * These generally need preemption protection to work,
- * do try to avoid using these on their own:
- */
-static inline void fpregs_deactivate(struct fpu *fpu)
-{
-	this_cpu_write(fpu_fpregs_owner_ctx, NULL);
-	trace_x86_fpu_regs_deactivated(fpu);
-}
-
-static inline void fpregs_activate(struct fpu *fpu)
-{
-	this_cpu_write(fpu_fpregs_owner_ctx, fpu);
-	trace_x86_fpu_regs_activated(fpu);
-}
-
-/* Internal helper for switch_fpu_return() and signal frame setup */
-static inline void fpregs_restore_userregs(void)
-{
-	struct fpu *fpu = &current->thread.fpu;
-	int cpu = smp_processor_id();
-
-	if (WARN_ON_ONCE(current->flags & PF_KTHREAD))
-		return;
-
-	if (!fpregs_state_valid(fpu, cpu)) {
-		u64 mask;
-
-		/*
-		 * This restores _all_ xstate which has not been
-		 * established yet.
-		 *
-		 * If PKRU is enabled, then the PKRU value is already
-		 * correct because it was either set in switch_to() or in
-		 * flush_thread(). So it is excluded because it might be
-		 * not up to date in current->thread.fpu.xsave state.
-		 */
-		mask = xfeatures_mask_restore_user() |
-			xfeatures_mask_supervisor();
-		restore_fpregs_from_fpstate(&fpu->state, mask);
-
-		fpregs_activate(fpu);
-		fpu->last_cpu = cpu;
-	}
-	clear_thread_flag(TIF_NEED_FPU_LOAD);
-}
-
 #endif /* _ASM_X86_FPU_INTERNAL_H */
diff --git a/arch/x86/kernel/fpu/context.h b/arch/x86/kernel/fpu/context.h
new file mode 100644
index 0000000..e652282
--- /dev/null
+++ b/arch/x86/kernel/fpu/context.h
@@ -0,0 +1,85 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __X86_KERNEL_FPU_CONTEXT_H
+#define __X86_KERNEL_FPU_CONTEXT_H
+
+#include <asm/fpu/xstate.h>
+#include <asm/trace/fpu.h>
+
+/* Functions related to FPU context tracking */
+
+/*
+ * The in-register FPU state for an FPU context on a CPU is assumed to be
+ * valid if the fpu->last_cpu matches the CPU, and the fpu_fpregs_owner_ctx
+ * matches the FPU.
+ *
+ * If the FPU register state is valid, the kernel can skip restoring the
+ * FPU state from memory.
+ *
+ * Any code that clobbers the FPU registers or updates the in-memory
+ * FPU state for a task MUST let the rest of the kernel know that the
+ * FPU registers are no longer valid for this task.
+ *
+ * Either one of these invalidation functions is enough. Invalidate
+ * a resource you control: CPU if using the CPU for something else
+ * (with preemption disabled), FPU for the current task, or a task that
+ * is prevented from running by the current task.
+ */
+static inline void __cpu_invalidate_fpregs_state(void)
+{
+	__this_cpu_write(fpu_fpregs_owner_ctx, NULL);
+}
+
+static inline void __fpu_invalidate_fpregs_state(struct fpu *fpu)
+{
+	fpu->last_cpu = -1;
+}
+
+static inline int fpregs_state_valid(struct fpu *fpu, unsigned int cpu)
+{
+	return fpu == this_cpu_read(fpu_fpregs_owner_ctx) && cpu == fpu->last_cpu;
+}
+
+static inline void fpregs_deactivate(struct fpu *fpu)
+{
+	__this_cpu_write(fpu_fpregs_owner_ctx, NULL);
+	trace_x86_fpu_regs_deactivated(fpu);
+}
+
+static inline void fpregs_activate(struct fpu *fpu)
+{
+	__this_cpu_write(fpu_fpregs_owner_ctx, fpu);
+	trace_x86_fpu_regs_activated(fpu);
+}
+
+/* Internal helper for switch_fpu_return() and signal frame setup */
+static inline void fpregs_restore_userregs(void)
+{
+	struct fpu *fpu = &current->thread.fpu;
+	int cpu = smp_processor_id();
+
+	if (WARN_ON_ONCE(current->flags & PF_KTHREAD))
+		return;
+
+	if (!fpregs_state_valid(fpu, cpu)) {
+		u64 mask;
+
+		/*
+		 * This restores _all_ xstate which has not been
+		 * established yet.
+		 *
+		 * If PKRU is enabled, then the PKRU value is already
+		 * correct because it was either set in switch_to() or in
+		 * flush_thread(). So it is excluded because it might be
+		 * not up to date in current->thread.fpu.xsave state.
+		 */
+		mask = xfeatures_mask_restore_user() |
+			xfeatures_mask_supervisor();
+		restore_fpregs_from_fpstate(&fpu->state, mask);
+
+		fpregs_activate(fpu);
+		fpu->last_cpu = cpu;
+	}
+	clear_thread_flag(TIF_NEED_FPU_LOAD);
+}
+
+#endif
diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c
index a009c82..7397288 100644
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -17,6 +17,7 @@
 #include <linux/hardirq.h>
 #include <linux/pkeys.h>
 
+#include "context.h"
 #include "internal.h"
 #include "legacy.h"
 #include "xstate.h"
diff --git a/arch/x86/kernel/fpu/regset.c b/arch/x86/kernel/fpu/regset.c
index ccf0c59..a40150e 100644
--- a/arch/x86/kernel/fpu/regset.c
+++ b/arch/x86/kernel/fpu/regset.c
@@ -10,6 +10,7 @@
 #include <asm/fpu/regset.h>
 #include <asm/fpu/xstate.h>
 
+#include "context.h"
 #include "internal.h"
 
 /*
diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c
index e0198b2..32dbcde 100644
--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -16,6 +16,7 @@
 #include <asm/trapnr.h>
 #include <asm/trace/fpu.h>
 
+#include "context.h"
 #include "internal.h"
 #include "legacy.h"
 #include "xstate.h"

  parent reply	other threads:[~2021-10-20 13:44 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-15  1:15 [patch V2 00/30] x86/fpu: Preparatory cleanups for AMX support (part 1) Thomas Gleixner
2021-10-15  1:15 ` [patch V2 01/30] x86/fpu: Remove pointless argument from switch_fpu_finish() Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:15 ` [patch V2 02/30] x86/fpu: Update stale comments Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:15 ` [patch V2 03/30] x86/pkru: Remove useless include Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:15 ` [patch V2 04/30] x86/fpu: Restrict xsaves()/xrstors() to independent states Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 05/30] x86/fpu: Cleanup the on_boot_cpu clutter Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 06/30] x86/fpu: Remove pointless memset in fpu_clone() Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 07/30] x86/process: Clone FPU in copy_thread() Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 08/30] x86/fpu: Do not inherit FPU context for kernel and IO worker threads Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 09/30] x86/fpu: Cleanup xstate xcomp_bv initialization Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 10/30] x86/fpu/xstate: Provide and use for_each_xfeature() Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 11/30] x86/fpu/xstate: Mark all init only functions __init Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 12/30] x86/fpu: Move KVMs FPU swapping to FPU core Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 13/30] x86/fpu: Replace KVMs home brewed FPU copy from user Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 14/30] x86/fpu: Rework copy_xstate_to_uabi_buf() Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 15/30] x86/fpu: Replace KVMs home brewed FPU copy to user Thomas Gleixner
2021-10-21 15:12   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 16/30] x86/fpu: Mark fpu__init_prepare_fx_sw_frame() as __init Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 17/30] x86/fpu: Move context switch and exit to user inlines into sched.h Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 18/30] x86/fpu: Clean up cpu feature tests Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] x86/fpu: Clean up CPU " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 19/30] x86/fpu: Make os_xrstor_booting() private Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 20/30] x86/fpu: Move os_xsave() and os_xrstor() to core Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 21/30] x86/fpu: Move legacy ASM wrappers " Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 22/30] x86/fpu: Make WARN_ON_FPU() private Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 23/30] x86/fpu: Move fpregs_restore_userregs() to core Thomas Gleixner
2021-10-19 18:11   ` Borislav Petkov
2021-10-20 13:44   ` tip-bot2 for Thomas Gleixner [this message]
2021-10-15  1:16 ` [patch V2 24/30] x86/fpu: Move mxcsr related code " Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 25/30] x86/fpu: Move fpstate functions to api.h Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 26/30] x86/fpu: Remove internal.h dependency from fpu/signal.h Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 27/30] x86/sev: Include fpu/xcr.h Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 28/30] x86/fpu: Mop up the internal.h leftovers Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 29/30] x86/fpu: Replace the includes of fpu/internal.h Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15  1:16 ` [patch V2 30/30] x86/fpu: Provide a proper function for ex_handler_fprestore() Thomas Gleixner
2021-10-20 13:44   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=163473747212.25758.16427292081904612917.tip-bot2@tip-bot2 \
    --to=tip-bot2@linutronix.de \
    --cc=bp@suse.de \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-tip-commits@vger.kernel.org \
    --cc=tglx@linutronix.de \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).