From: "tip-bot2 for Thomas Gleixner" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>,
Borislav Petkov <bp@suse.de>,
x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: x86/fpu] x86/fpu: Move legacy ASM wrappers to core
Date: Wed, 20 Oct 2021 13:44:33 -0000 [thread overview]
Message-ID: <163473747346.25758.17742319638444376009.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20211015011539.572439164@linutronix.de>
The following commit has been merged into the x86/fpu branch of tip:
Commit-ID: 34002571cb4199a446f7582704424d20a01c276e
Gitweb: https://git.kernel.org/tip/34002571cb4199a446f7582704424d20a01c276e
Author: Thomas Gleixner <tglx@linutronix.de>
AuthorDate: Fri, 15 Oct 2021 03:16:26 +02:00
Committer: Borislav Petkov <bp@suse.de>
CommitterDate: Wed, 20 Oct 2021 15:27:28 +02:00
x86/fpu: Move legacy ASM wrappers to core
Nothing outside the core code requires them.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20211015011539.572439164@linutronix.de
---
arch/x86/include/asm/fpu/internal.h | 101 +-------------------------
arch/x86/kernel/fpu/core.c | 1 +-
arch/x86/kernel/fpu/legacy.h | 108 +++++++++++++++++++++++++++-
arch/x86/kernel/fpu/signal.c | 1 +-
arch/x86/kernel/fpu/xstate.c | 1 +-
5 files changed, 111 insertions(+), 101 deletions(-)
create mode 100644 arch/x86/kernel/fpu/legacy.h
diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h
index b68f994..7722aad 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -60,107 +60,6 @@ extern void fpstate_init_soft(struct swregs_state *soft);
static inline void fpstate_init_soft(struct swregs_state *soft) {}
#endif
-/*
- * Returns 0 on success or the trap number when the operation raises an
- * exception.
- */
-#define user_insn(insn, output, input...) \
-({ \
- int err; \
- \
- might_fault(); \
- \
- asm volatile(ASM_STAC "\n" \
- "1: " #insn "\n" \
- "2: " ASM_CLAC "\n" \
- _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_FAULT_MCE_SAFE) \
- : [err] "=a" (err), output \
- : "0"(0), input); \
- err; \
-})
-
-#define kernel_insn_err(insn, output, input...) \
-({ \
- int err; \
- asm volatile("1:" #insn "\n\t" \
- "2:\n" \
- ".section .fixup,\"ax\"\n" \
- "3: movl $-1,%[err]\n" \
- " jmp 2b\n" \
- ".previous\n" \
- _ASM_EXTABLE(1b, 3b) \
- : [err] "=r" (err), output \
- : "0"(0), input); \
- err; \
-})
-
-#define kernel_insn(insn, output, input...) \
- asm volatile("1:" #insn "\n\t" \
- "2:\n" \
- _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_FPU_RESTORE) \
- : output : input)
-
-static inline int fnsave_to_user_sigframe(struct fregs_state __user *fx)
-{
- return user_insn(fnsave %[fx]; fwait, [fx] "=m" (*fx), "m" (*fx));
-}
-
-static inline int fxsave_to_user_sigframe(struct fxregs_state __user *fx)
-{
- if (IS_ENABLED(CONFIG_X86_32))
- return user_insn(fxsave %[fx], [fx] "=m" (*fx), "m" (*fx));
- else
- return user_insn(fxsaveq %[fx], [fx] "=m" (*fx), "m" (*fx));
-
-}
-
-static inline void fxrstor(struct fxregs_state *fx)
-{
- if (IS_ENABLED(CONFIG_X86_32))
- kernel_insn(fxrstor %[fx], "=m" (*fx), [fx] "m" (*fx));
- else
- kernel_insn(fxrstorq %[fx], "=m" (*fx), [fx] "m" (*fx));
-}
-
-static inline int fxrstor_safe(struct fxregs_state *fx)
-{
- if (IS_ENABLED(CONFIG_X86_32))
- return kernel_insn_err(fxrstor %[fx], "=m" (*fx), [fx] "m" (*fx));
- else
- return kernel_insn_err(fxrstorq %[fx], "=m" (*fx), [fx] "m" (*fx));
-}
-
-static inline int fxrstor_from_user_sigframe(struct fxregs_state __user *fx)
-{
- if (IS_ENABLED(CONFIG_X86_32))
- return user_insn(fxrstor %[fx], "=m" (*fx), [fx] "m" (*fx));
- else
- return user_insn(fxrstorq %[fx], "=m" (*fx), [fx] "m" (*fx));
-}
-
-static inline void frstor(struct fregs_state *fx)
-{
- kernel_insn(frstor %[fx], "=m" (*fx), [fx] "m" (*fx));
-}
-
-static inline int frstor_safe(struct fregs_state *fx)
-{
- return kernel_insn_err(frstor %[fx], "=m" (*fx), [fx] "m" (*fx));
-}
-
-static inline int frstor_from_user_sigframe(struct fregs_state __user *fx)
-{
- return user_insn(frstor %[fx], "=m" (*fx), [fx] "m" (*fx));
-}
-
-static inline void fxsave(struct fxregs_state *fx)
-{
- if (IS_ENABLED(CONFIG_X86_32))
- asm volatile( "fxsave %[fx]" : [fx] "=m" (*fx));
- else
- asm volatile("fxsaveq %[fx]" : [fx] "=m" (*fx));
-}
-
extern void restore_fpregs_from_fpstate(union fpregs_state *fpstate, u64 mask);
extern bool copy_fpstate_to_sigframe(void __user *buf, void __user *fp, int size);
diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c
index e9b51c7..a009c82 100644
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -18,6 +18,7 @@
#include <linux/pkeys.h>
#include "internal.h"
+#include "legacy.h"
#include "xstate.h"
#define CREATE_TRACE_POINTS
diff --git a/arch/x86/kernel/fpu/legacy.h b/arch/x86/kernel/fpu/legacy.h
new file mode 100644
index 0000000..2ff36b0
--- /dev/null
+++ b/arch/x86/kernel/fpu/legacy.h
@@ -0,0 +1,108 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __X86_KERNEL_FPU_LEGACY_H
+#define __X86_KERNEL_FPU_LEGACY_H
+
+#include <asm/fpu/types.h>
+
+/*
+ * Returns 0 on success or the trap number when the operation raises an
+ * exception.
+ */
+#define user_insn(insn, output, input...) \
+({ \
+ int err; \
+ \
+ might_fault(); \
+ \
+ asm volatile(ASM_STAC "\n" \
+ "1: " #insn "\n" \
+ "2: " ASM_CLAC "\n" \
+ _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_FAULT_MCE_SAFE) \
+ : [err] "=a" (err), output \
+ : "0"(0), input); \
+ err; \
+})
+
+#define kernel_insn_err(insn, output, input...) \
+({ \
+ int err; \
+ asm volatile("1:" #insn "\n\t" \
+ "2:\n" \
+ ".section .fixup,\"ax\"\n" \
+ "3: movl $-1,%[err]\n" \
+ " jmp 2b\n" \
+ ".previous\n" \
+ _ASM_EXTABLE(1b, 3b) \
+ : [err] "=r" (err), output \
+ : "0"(0), input); \
+ err; \
+})
+
+#define kernel_insn(insn, output, input...) \
+ asm volatile("1:" #insn "\n\t" \
+ "2:\n" \
+ _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_FPU_RESTORE) \
+ : output : input)
+
+static inline int fnsave_to_user_sigframe(struct fregs_state __user *fx)
+{
+ return user_insn(fnsave %[fx]; fwait, [fx] "=m" (*fx), "m" (*fx));
+}
+
+static inline int fxsave_to_user_sigframe(struct fxregs_state __user *fx)
+{
+ if (IS_ENABLED(CONFIG_X86_32))
+ return user_insn(fxsave %[fx], [fx] "=m" (*fx), "m" (*fx));
+ else
+ return user_insn(fxsaveq %[fx], [fx] "=m" (*fx), "m" (*fx));
+
+}
+
+static inline void fxrstor(struct fxregs_state *fx)
+{
+ if (IS_ENABLED(CONFIG_X86_32))
+ kernel_insn(fxrstor %[fx], "=m" (*fx), [fx] "m" (*fx));
+ else
+ kernel_insn(fxrstorq %[fx], "=m" (*fx), [fx] "m" (*fx));
+}
+
+static inline int fxrstor_safe(struct fxregs_state *fx)
+{
+ if (IS_ENABLED(CONFIG_X86_32))
+ return kernel_insn_err(fxrstor %[fx], "=m" (*fx), [fx] "m" (*fx));
+ else
+ return kernel_insn_err(fxrstorq %[fx], "=m" (*fx), [fx] "m" (*fx));
+}
+
+static inline int fxrstor_from_user_sigframe(struct fxregs_state __user *fx)
+{
+ if (IS_ENABLED(CONFIG_X86_32))
+ return user_insn(fxrstor %[fx], "=m" (*fx), [fx] "m" (*fx));
+ else
+ return user_insn(fxrstorq %[fx], "=m" (*fx), [fx] "m" (*fx));
+}
+
+static inline void frstor(struct fregs_state *fx)
+{
+ kernel_insn(frstor %[fx], "=m" (*fx), [fx] "m" (*fx));
+}
+
+static inline int frstor_safe(struct fregs_state *fx)
+{
+ return kernel_insn_err(frstor %[fx], "=m" (*fx), [fx] "m" (*fx));
+}
+
+static inline int frstor_from_user_sigframe(struct fregs_state __user *fx)
+{
+ return user_insn(frstor %[fx], "=m" (*fx), [fx] "m" (*fx));
+}
+
+static inline void fxsave(struct fxregs_state *fx)
+{
+ if (IS_ENABLED(CONFIG_X86_32))
+ asm volatile( "fxsave %[fx]" : [fx] "=m" (*fx));
+ else
+ asm volatile("fxsaveq %[fx]" : [fx] "=m" (*fx));
+}
+
+#endif
diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c
index 3b38c59..e0198b2 100644
--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -17,6 +17,7 @@
#include <asm/trace/fpu.h>
#include "internal.h"
+#include "legacy.h"
#include "xstate.h"
static struct _fpx_sw_bytes fx_sw_reserved __ro_after_init;
diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c
index b712c06..246a7fe 100644
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -20,6 +20,7 @@
#include <asm/tlbflush.h>
#include "internal.h"
+#include "legacy.h"
#include "xstate.h"
#define for_each_extended_xfeature(bit, mask) \
next prev parent reply other threads:[~2021-10-20 13:44 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-15 1:15 [patch V2 00/30] x86/fpu: Preparatory cleanups for AMX support (part 1) Thomas Gleixner
2021-10-15 1:15 ` [patch V2 01/30] x86/fpu: Remove pointless argument from switch_fpu_finish() Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:15 ` [patch V2 02/30] x86/fpu: Update stale comments Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:15 ` [patch V2 03/30] x86/pkru: Remove useless include Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:15 ` [patch V2 04/30] x86/fpu: Restrict xsaves()/xrstors() to independent states Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 05/30] x86/fpu: Cleanup the on_boot_cpu clutter Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 06/30] x86/fpu: Remove pointless memset in fpu_clone() Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 07/30] x86/process: Clone FPU in copy_thread() Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 08/30] x86/fpu: Do not inherit FPU context for kernel and IO worker threads Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 09/30] x86/fpu: Cleanup xstate xcomp_bv initialization Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 10/30] x86/fpu/xstate: Provide and use for_each_xfeature() Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 11/30] x86/fpu/xstate: Mark all init only functions __init Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 12/30] x86/fpu: Move KVMs FPU swapping to FPU core Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 13/30] x86/fpu: Replace KVMs home brewed FPU copy from user Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 14/30] x86/fpu: Rework copy_xstate_to_uabi_buf() Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 15/30] x86/fpu: Replace KVMs home brewed FPU copy to user Thomas Gleixner
2021-10-21 15:12 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 16/30] x86/fpu: Mark fpu__init_prepare_fx_sw_frame() as __init Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 17/30] x86/fpu: Move context switch and exit to user inlines into sched.h Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 18/30] x86/fpu: Clean up cpu feature tests Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] x86/fpu: Clean up CPU " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 19/30] x86/fpu: Make os_xrstor_booting() private Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 20/30] x86/fpu: Move os_xsave() and os_xrstor() to core Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 21/30] x86/fpu: Move legacy ASM wrappers " Thomas Gleixner
2021-10-20 13:44 ` tip-bot2 for Thomas Gleixner [this message]
2021-10-15 1:16 ` [patch V2 22/30] x86/fpu: Make WARN_ON_FPU() private Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 23/30] x86/fpu: Move fpregs_restore_userregs() to core Thomas Gleixner
2021-10-19 18:11 ` Borislav Petkov
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 24/30] x86/fpu: Move mxcsr related code " Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 25/30] x86/fpu: Move fpstate functions to api.h Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 26/30] x86/fpu: Remove internal.h dependency from fpu/signal.h Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 27/30] x86/sev: Include fpu/xcr.h Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 28/30] x86/fpu: Mop up the internal.h leftovers Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 29/30] x86/fpu: Replace the includes of fpu/internal.h Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-15 1:16 ` [patch V2 30/30] x86/fpu: Provide a proper function for ex_handler_fprestore() Thomas Gleixner
2021-10-20 13:44 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=163473747346.25758.17742319638444376009.tip-bot2@tip-bot2 \
--to=tip-bot2@linutronix.de \
--cc=bp@suse.de \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-tip-commits@vger.kernel.org \
--cc=tglx@linutronix.de \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).