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From: "tip-bot2 for Thomas Gleixner" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Borislav Petkov <bp@suse.de>,
	x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: x86/fpu] x86/fpu/regset: Convert to fpstate
Date: Thu, 21 Oct 2021 15:12:33 -0000	[thread overview]
Message-ID: <163482915341.25758.6298773277711142435.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20211013145322.555239736@linutronix.de>

The following commit has been merged into the x86/fpu branch of tip:

Commit-ID:     caee31a36c33ed7788d0b3d93a663860157f6c55
Gitweb:        https://git.kernel.org/tip/caee31a36c33ed7788d0b3d93a663860157f6c55
Author:        Thomas Gleixner <tglx@linutronix.de>
AuthorDate:    Wed, 13 Oct 2021 16:55:36 +02:00
Committer:     Borislav Petkov <bp@suse.de>
CommitterDate: Wed, 20 Oct 2021 22:35:29 +02:00

x86/fpu/regset: Convert to fpstate

Convert regset related code to the new register storage mechanism in
preparation for dynamically sized buffers.

No functional change.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20211013145322.555239736@linutronix.de
---
 arch/x86/kernel/fpu/regset.c | 27 ++++++++++++++-------------
 1 file changed, 14 insertions(+), 13 deletions(-)

diff --git a/arch/x86/kernel/fpu/regset.c b/arch/x86/kernel/fpu/regset.c
index 01a1d97..ec77779 100644
--- a/arch/x86/kernel/fpu/regset.c
+++ b/arch/x86/kernel/fpu/regset.c
@@ -78,8 +78,8 @@ int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
 	sync_fpstate(fpu);
 
 	if (!use_xsave()) {
-		return membuf_write(&to, &fpu->state.fxsave,
-				    sizeof(fpu->state.fxsave));
+		return membuf_write(&to, &fpu->fpstate->regs.fxsave,
+				    sizeof(fpu->fpstate->regs.fxsave));
 	}
 
 	copy_xstate_to_uabi_buf(to, target, XSTATE_COPY_FX);
@@ -114,15 +114,15 @@ int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
 	fpu_force_restore(fpu);
 
 	/* Copy the state  */
-	memcpy(&fpu->state.fxsave, &newstate, sizeof(newstate));
+	memcpy(&fpu->fpstate->regs.fxsave, &newstate, sizeof(newstate));
 
 	/* Clear xmm8..15 */
-	BUILD_BUG_ON(sizeof(fpu->state.fxsave.xmm_space) != 16 * 16);
-	memset(&fpu->state.fxsave.xmm_space[8], 0, 8 * 16);
+	BUILD_BUG_ON(sizeof(fpu->__fpstate.regs.fxsave.xmm_space) != 16 * 16);
+	memset(&fpu->fpstate->regs.fxsave.xmm_space[8], 0, 8 * 16);
 
 	/* Mark FP and SSE as in use when XSAVE is enabled */
 	if (use_xsave())
-		fpu->state.xsave.header.xfeatures |= XFEATURE_MASK_FPSSE;
+		fpu->fpstate->regs.xsave.header.xfeatures |= XFEATURE_MASK_FPSSE;
 
 	return 0;
 }
@@ -168,7 +168,8 @@ int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
 	}
 
 	fpu_force_restore(fpu);
-	ret = copy_uabi_from_kernel_to_xstate(&fpu->state.xsave, kbuf ?: tmpbuf);
+	ret = copy_uabi_from_kernel_to_xstate(&fpu->fpstate->regs.xsave,
+					      kbuf ?: tmpbuf);
 
 out:
 	vfree(tmpbuf);
@@ -287,7 +288,7 @@ static void __convert_from_fxsr(struct user_i387_ia32_struct *env,
 void
 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
 {
-	__convert_from_fxsr(env, tsk, &tsk->thread.fpu.state.fxsave);
+	__convert_from_fxsr(env, tsk, &tsk->thread.fpu.fpstate->regs.fxsave);
 }
 
 void convert_to_fxsr(struct fxregs_state *fxsave,
@@ -330,7 +331,7 @@ int fpregs_get(struct task_struct *target, const struct user_regset *regset,
 		return fpregs_soft_get(target, regset, to);
 
 	if (!cpu_feature_enabled(X86_FEATURE_FXSR)) {
-		return membuf_write(&to, &fpu->state.fsave,
+		return membuf_write(&to, &fpu->fpstate->regs.fsave,
 				    sizeof(struct fregs_state));
 	}
 
@@ -341,7 +342,7 @@ int fpregs_get(struct task_struct *target, const struct user_regset *regset,
 		copy_xstate_to_uabi_buf(mb, target, XSTATE_COPY_FP);
 		fx = &fxsave;
 	} else {
-		fx = &fpu->state.fxsave;
+		fx = &fpu->fpstate->regs.fxsave;
 	}
 
 	__convert_from_fxsr(&env, target, fx);
@@ -370,16 +371,16 @@ int fpregs_set(struct task_struct *target, const struct user_regset *regset,
 	fpu_force_restore(fpu);
 
 	if (cpu_feature_enabled(X86_FEATURE_FXSR))
-		convert_to_fxsr(&fpu->state.fxsave, &env);
+		convert_to_fxsr(&fpu->fpstate->regs.fxsave, &env);
 	else
-		memcpy(&fpu->state.fsave, &env, sizeof(env));
+		memcpy(&fpu->fpstate->regs.fsave, &env, sizeof(env));
 
 	/*
 	 * Update the header bit in the xsave header, indicating the
 	 * presence of FP.
 	 */
 	if (cpu_feature_enabled(X86_FEATURE_XSAVE))
-		fpu->state.xsave.header.xfeatures |= XFEATURE_MASK_FP;
+		fpu->fpstate->regs.xsave.header.xfeatures |= XFEATURE_MASK_FP;
 
 	return 0;
 }

  reply	other threads:[~2021-10-21 15:13 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-13 14:55 [patch 00/21] x86/fpu: Move register state into a container struct (part 2) Thomas Gleixner
2021-10-13 14:55 ` [patch 01/21] x86/fpu: Provide struct fpstate Thomas Gleixner
2021-10-21 15:12   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-13 14:55 ` [patch 02/21] x86/fpu: Convert fpstate_init() to " Thomas Gleixner
2021-10-21 15:12   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-13 14:55 ` [patch 03/21] x86/fpu: Convert restore_fpregs_from_fpstate() " Thomas Gleixner
2021-10-21 15:12   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-13 14:55 ` [patch 04/21] x86/fpu: Replace KVMs xstate component clearing Thomas Gleixner
2021-10-21 15:12   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-13 14:55 ` [patch 05/21] x86/KVM: Convert to fpstate Thomas Gleixner
2021-10-13 15:11   ` Paolo Bonzini
2021-10-21 15:12   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-13 14:55 ` [patch 06/21] x86/fpu: Convert tracing " Thomas Gleixner
2021-10-21 15:12   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-13 14:55 ` [patch 07/21] x86/fpu/regset: Convert " Thomas Gleixner
2021-10-21 15:12   ` tip-bot2 for Thomas Gleixner [this message]
2021-10-13 14:55 ` [patch 08/21] x86/fpu/signal: " Thomas Gleixner
2021-10-21 15:12   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-13 14:55 ` [patch 09/21] x86/fpu/core: " Thomas Gleixner
2021-10-21 15:12   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-13 14:55 ` [patch 10/21] x86/math-emu: " Thomas Gleixner
2021-10-21 15:12   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-13 14:55 ` [patch 11/21] x86/fpu: Remove fpu::state Thomas Gleixner
2021-10-21 15:12   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-13 14:55 ` [patch 12/21] x86/fpu: Do not leak fpstate pointer on fork Thomas Gleixner
2021-10-21 15:12   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-13 14:55 ` [patch 13/21] x86/process: Move arch_thread_struct_whitelist() out of line Thomas Gleixner
2021-10-21 15:12   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-13 14:55 ` [patch 14/21] x86/fpu: Add size and mask information to fpstate Thomas Gleixner
2021-10-21 15:12   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-13 14:55 ` [patch 15/21] x86/fpu: Use fpstate::size Thomas Gleixner
2021-10-21 15:12   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-13 14:55 ` [patch 16/21] x86/fpu/xstate: Use fpstate for os_xsave() Thomas Gleixner
2021-10-21 15:12   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-13 14:55 ` [patch 17/21] x86/fpu/xstate: Use fpstate for xsave_to_user_sigframe() Thomas Gleixner
2021-10-21 15:12   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-13 14:55 ` [patch 18/21] x86/fpu: Use fpstate in fpu_copy_kvm_uabi_to_fpstate() Thomas Gleixner
2021-10-21 15:12   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-13 14:55 ` [patch 19/21] x86/fpu: Use fpstate in __copy_xstate_to_uabi_buf() Thomas Gleixner
2021-10-21 15:12   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-13 14:55 ` [patch 20/21] x86/fpu/xstate: Use fpstate for copy_uabi_to_xstate() Thomas Gleixner
2021-10-21 15:12   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-10-13 14:55 ` [patch 21/21] x86/fpu/signal: Use fpstate for size and features Thomas Gleixner
2021-10-14 22:51   ` [patch V2 " Thomas Gleixner
2021-10-21 15:12     ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner

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