[PATCH 0/2] dts: Add CEC clock to DW HDMI

[PATCH 0/2] dts: Add CEC clock to DW HDMI

[Jernej Skrabec]

Experimentation proved that CEC controller in H3-like DW-HDMI core
depends on 32 kHz clock output from RTC. If board has external 32768 Hz
crystal, HDMI CEC always work. However, if external crystal is missing
and 32 kHz clock is generated by internal oscillator, CEC communication
may or may not work, depending on accuracy. Changing internal oscillator
prescaler can make CEC work.

This was totally missed when implementing HDMI support, because user
manual has no CEC information besides the fact that it exists.

Please take a look.

Best regards,
Jernej

Jernej Skrabec (2):
  arm64: dts: allwinner: a64: Add CEC clock to HDMI
  ARM: dts: sunxi: Add CEC clock to DW-HDMI

 arch/arm/boot/dts/sun8i-r40.dtsi              | 4 ++--
 arch/arm/boot/dts/sunxi-h3-h5.dtsi            | 4 ++--
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

-- 
2.34.0

[PATCH 1/2] arm64: dts: allwinner: a64: Add CEC clock to HDMI

[Jernej Skrabec]

Experimentation determined that HDMI CEC controller inside DW HDMI block
depends on 32k clock from RTC. If this clock is tampered with, HDMI CEC
communication starts or stops working, depending on situation.

SoC user manual doesn't say anything about CEC, so this was overlooked.
Fix this by adding dependency to RTC 32k clock.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 5ba379078500..741bd19fa8ec 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -1220,8 +1220,8 @@ hdmi: hdmi@1ee0000 {
 			reg-io-width = <1>;
 			interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
-				 <&ccu CLK_HDMI>;
-			clock-names = "iahb", "isfr", "tmds";
+				 <&ccu CLK_HDMI>, <&rtc 0>;
+			clock-names = "iahb", "isfr", "tmds", "cec";
 			resets = <&ccu RST_BUS_HDMI1>;
 			reset-names = "ctrl";
 			phys = <&hdmi_phy>;
-- 
2.34.0

[PATCH 2/2] ARM: dts: sunxi: Add CEC clock to DW-HDMI

[Jernej Skrabec]

Experimentation determined that HDMI CEC controller inside DW HDMI block
depends on 32k clock from RTC. If this clock is tampered with, HDMI CEC
communication starts or stops working, depending on situation.

SoC user manual doesn't say anything about CEC, so this was overlooked.
Fix this by adding dependency to RTC 32k clock.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
---
 arch/arm/boot/dts/sun8i-r40.dtsi   | 4 ++--
 arch/arm/boot/dts/sunxi-h3-h5.dtsi | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 1d87fc0c24ee..f10436b7869c 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -1212,8 +1212,8 @@ hdmi: hdmi@1ee0000 {
 			reg-io-width = <1>;
 			interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&ccu CLK_BUS_HDMI0>, <&ccu CLK_HDMI_SLOW>,
-				 <&ccu CLK_HDMI>;
-			clock-names = "iahb", "isfr", "tmds";
+				 <&ccu CLK_HDMI>, <&rtc 0>;
+			clock-names = "iahb", "isfr", "tmds", "cec";
 			resets = <&ccu RST_BUS_HDMI1>;
 			reset-names = "ctrl";
 			phys = <&hdmi_phy>;
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index c7428df9469e..d1e974886fdf 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -813,8 +813,8 @@ hdmi: hdmi@1ee0000 {
 			reg-io-width = <1>;
 			interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
-				 <&ccu CLK_HDMI>;
-			clock-names = "iahb", "isfr", "tmds";
+				 <&ccu CLK_HDMI>, <&rtc 0>;
+			clock-names = "iahb", "isfr", "tmds", "cec";
 			resets = <&ccu RST_BUS_HDMI1>;
 			reset-names = "ctrl";
 			phys = <&hdmi_phy>;
-- 
2.34.0

Re: [PATCH 0/2] dts: Add CEC clock to DW HDMI

[Maxime Ripard]

On Sat, 20 Nov 2021 08:34:46 +0100, Jernej Skrabec wrote:
> Experimentation proved that CEC controller in H3-like DW-HDMI core
> depends on 32 kHz clock output from RTC. If board has external 32768 Hz
> crystal, HDMI CEC always work. However, if external crystal is missing
> and 32 kHz clock is generated by internal oscillator, CEC communication
> may or may not work, depending on accuracy. Changing internal oscillator
> prescaler can make CEC work.
> 
> [...]

Applied to sunxi/linux.git (sunxi/dt-for-5.17).

Thanks!
Maxime