From: "tip-bot2 for Maciej W. Rozycki" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: "Maciej W. Rozycki" <macro@orcam.me.uk>,
Thomas Gleixner <tglx@linutronix.de>,
x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: x86/irq] x86/PCI: Fix ALi M1487 (IBC) PIRQ router link value interpretation
Date: Wed, 02 Feb 2022 20:30:39 -0000 [thread overview]
Message-ID: <164383383990.16921.10511731021620392794.tip-bot2@tip-bot2> (raw)
In-Reply-To: <alpine.DEB.2.21.2201022131050.56863@angie.orcam.me.uk>
The following commit has been merged into the x86/irq branch of tip:
Commit-ID: 07a9d83afc3d193da7abad1929725ba3fcfb703c
Gitweb: https://git.kernel.org/tip/07a9d83afc3d193da7abad1929725ba3fcfb703c
Author: Maciej W. Rozycki <macro@orcam.me.uk>
AuthorDate: Thu, 06 Jan 2022 11:24:16
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Wed, 02 Feb 2022 21:27:55 +01:00
x86/PCI: Fix ALi M1487 (IBC) PIRQ router link value interpretation
Correct ALi M1487 (IBC) PIRQ router link value (`pirq' cookie)
interpretation according to findings in the BIOS.
Credit to Nikolai Zhubr for the detective work as to the bit layout.
Fixes: 1ce849c75534 ("x86/PCI: Add support for the ALi M1487 (IBC) PIRQ router")
Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/alpine.DEB.2.21.2201022131050.56863@angie.orcam.me.uk
---
arch/x86/pci/irq.c | 19 ++++++++++++++++---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c
index 486ba58..b0d0640 100644
--- a/arch/x86/pci/irq.c
+++ b/arch/x86/pci/irq.c
@@ -324,6 +324,15 @@ static void write_pc_conf_nybble(u8 base, u8 index, u8 val)
pc_conf_set(reg, x);
}
+/*
+ * FinALi pirq rules are as follows:
+ *
+ * - bit 0 selects between INTx Routing Table Mapping Registers,
+ *
+ * - bit 3 selects the nibble within the INTx Routing Table Mapping Register,
+ *
+ * - bits 7:4 map to bits 3:0 of the PCI INTx Sensitivity Register.
+ */
static int pirq_finali_get(struct pci_dev *router, struct pci_dev *dev,
int pirq)
{
@@ -331,11 +340,13 @@ static int pirq_finali_get(struct pci_dev *router, struct pci_dev *dev,
0, 9, 3, 10, 4, 5, 7, 6, 0, 11, 0, 12, 0, 14, 0, 15
};
unsigned long flags;
+ u8 index;
u8 x;
+ index = (pirq & 1) << 1 | (pirq & 8) >> 3;
raw_spin_lock_irqsave(&pc_conf_lock, flags);
pc_conf_set(PC_CONF_FINALI_LOCK, PC_CONF_FINALI_LOCK_KEY);
- x = irqmap[read_pc_conf_nybble(PC_CONF_FINALI_PCI_INTX_RT1, pirq - 1)];
+ x = irqmap[read_pc_conf_nybble(PC_CONF_FINALI_PCI_INTX_RT1, index)];
pc_conf_set(PC_CONF_FINALI_LOCK, 0);
raw_spin_unlock_irqrestore(&pc_conf_lock, flags);
return x;
@@ -349,13 +360,15 @@ static int pirq_finali_set(struct pci_dev *router, struct pci_dev *dev,
};
u8 val = irqmap[irq];
unsigned long flags;
+ u8 index;
if (!val)
return 0;
+ index = (pirq & 1) << 1 | (pirq & 8) >> 3;
raw_spin_lock_irqsave(&pc_conf_lock, flags);
pc_conf_set(PC_CONF_FINALI_LOCK, PC_CONF_FINALI_LOCK_KEY);
- write_pc_conf_nybble(PC_CONF_FINALI_PCI_INTX_RT1, pirq - 1, val);
+ write_pc_conf_nybble(PC_CONF_FINALI_PCI_INTX_RT1, index, val);
pc_conf_set(PC_CONF_FINALI_LOCK, 0);
raw_spin_unlock_irqrestore(&pc_conf_lock, flags);
return 1;
@@ -364,7 +377,7 @@ static int pirq_finali_set(struct pci_dev *router, struct pci_dev *dev,
static int pirq_finali_lvl(struct pci_dev *router, struct pci_dev *dev,
int pirq, int irq)
{
- u8 mask = ~(1u << (pirq - 1));
+ u8 mask = ~((pirq & 0xf0u) >> 4);
unsigned long flags;
u8 trig;
next prev parent reply other threads:[~2022-02-02 20:30 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-06 11:24 [PATCH v3 0/4] x86/PCI: Improve $PIR and add $IRT PIRQ routing support Maciej W. Rozycki
2022-01-06 11:24 ` [PATCH v3 1/4] x86/PCI: Handle PIRQ routing tables with no router device given Maciej W. Rozycki
2022-02-02 20:30 ` [tip: x86/irq] " tip-bot2 for Maciej W. Rozycki
2022-01-06 11:24 ` [PATCH v3 2/4] x86/PCI: Add $IRT PIRQ routing table support Maciej W. Rozycki
2022-02-02 20:30 ` [tip: x86/irq] " tip-bot2 for Maciej W. Rozycki
2022-03-14 22:37 ` [PATCH v3 2/4] " Dmitry Osipenko
2022-03-16 18:09 ` Maciej W. Rozycki
2022-03-21 16:50 ` Dmitry Osipenko
2022-01-06 11:24 ` [PATCH v3 3/4] x86/PCI: Fix ALi M1487 (IBC) PIRQ router link value interpretation Maciej W. Rozycki
2022-02-02 20:30 ` tip-bot2 for Maciej W. Rozycki [this message]
2022-01-06 11:24 ` [PATCH v3 4/4] x86/PCI: Fix coding style in PIRQ table search functions Maciej W. Rozycki
2022-02-02 20:30 ` [tip: x86/irq] " tip-bot2 for Maciej W. Rozycki
2022-02-01 10:50 ` [PING][PATCH v3 0/4] x86/PCI: Improve $PIR and add $IRT PIRQ routing support Maciej W. Rozycki
2022-02-02 10:13 ` [PATCH " Thomas Gleixner
2022-02-03 10:28 ` Maciej W. Rozycki
2022-03-31 7:11 [PATCH v4 4/5] x86/PCI: Fix ALi M1487 (IBC) PIRQ router link value interpretation Maciej W. Rozycki
2022-04-10 10:54 ` [tip: x86/irq] " tip-bot2 for Maciej W. Rozycki
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