* [PATCH] clk: qcom: ipq8074: Use floor ops for SDCC1 clock
@ 2022-02-10 17:31 Robert Marko
2022-02-18 0:14 ` Stephen Boyd
2022-02-24 20:54 ` (subset) " Bjorn Andersson
0 siblings, 2 replies; 3+ messages in thread
From: Robert Marko @ 2022-02-10 17:31 UTC (permalink / raw)
To: agross, bjorn.andersson, mturquette, sboyd, absahu,
linux-arm-msm, linux-clk, linux-kernel
Cc: Dirk Buchwalder, Robert Marko
From: Dirk Buchwalder <buchwalder@posteo.de>
Use floor ops on SDCC1 APPS clock in order to round down selected clock
frequency and avoid overclocking SD/eMMC cards.
For example, currently HS200 cards were failling tuning as they were
actually being clocked at 384MHz instead of 192MHz.
This caused some boards to disable 1.8V I/O and force the eMMC into the
standard HS mode (50MHz) and that appeared to work despite the eMMC being
overclocked to 96Mhz in that case.
There was a previous commit to use floor ops on SDCC clocks, but it looks
to have only covered SDCC2 clock.
Fixes: 9607f6224b39 ("clk: qcom: ipq8074: add PCIE, USB and SDCC clocks")
Signed-off-by: Dirk Buchwalder <buchwalder@posteo.de>
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
drivers/clk/qcom/gcc-ipq8074.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/gcc-ipq8074.c b/drivers/clk/qcom/gcc-ipq8074.c
index 1e493f19fa44..c24e33321f72 100644
--- a/drivers/clk/qcom/gcc-ipq8074.c
+++ b/drivers/clk/qcom/gcc-ipq8074.c
@@ -1074,7 +1074,7 @@ static struct clk_rcg2 sdcc1_apps_clk_src = {
.name = "sdcc1_apps_clk_src",
.parent_names = gcc_xo_gpll0_gpll2_gpll0_out_main_div2,
.num_parents = 4,
- .ops = &clk_rcg2_ops,
+ .ops = &clk_rcg2_floor_ops,
},
};
--
2.35.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] clk: qcom: ipq8074: Use floor ops for SDCC1 clock
2022-02-10 17:31 [PATCH] clk: qcom: ipq8074: Use floor ops for SDCC1 clock Robert Marko
@ 2022-02-18 0:14 ` Stephen Boyd
2022-02-24 20:54 ` (subset) " Bjorn Andersson
1 sibling, 0 replies; 3+ messages in thread
From: Stephen Boyd @ 2022-02-18 0:14 UTC (permalink / raw)
To: Robert Marko, absahu, agross, bjorn.andersson, linux-arm-msm,
linux-clk, linux-kernel, mturquette
Cc: Dirk Buchwalder, Robert Marko
Quoting Robert Marko (2022-02-10 09:31:00)
> From: Dirk Buchwalder <buchwalder@posteo.de>
>
> Use floor ops on SDCC1 APPS clock in order to round down selected clock
> frequency and avoid overclocking SD/eMMC cards.
>
> For example, currently HS200 cards were failling tuning as they were
> actually being clocked at 384MHz instead of 192MHz.
> This caused some boards to disable 1.8V I/O and force the eMMC into the
> standard HS mode (50MHz) and that appeared to work despite the eMMC being
> overclocked to 96Mhz in that case.
>
> There was a previous commit to use floor ops on SDCC clocks, but it looks
> to have only covered SDCC2 clock.
>
> Fixes: 9607f6224b39 ("clk: qcom: ipq8074: add PCIE, USB and SDCC clocks")
>
> Signed-off-by: Dirk Buchwalder <buchwalder@posteo.de>
> Signed-off-by: Robert Marko <robimarko@gmail.com>
> ---
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: (subset) [PATCH] clk: qcom: ipq8074: Use floor ops for SDCC1 clock
2022-02-10 17:31 [PATCH] clk: qcom: ipq8074: Use floor ops for SDCC1 clock Robert Marko
2022-02-18 0:14 ` Stephen Boyd
@ 2022-02-24 20:54 ` Bjorn Andersson
1 sibling, 0 replies; 3+ messages in thread
From: Bjorn Andersson @ 2022-02-24 20:54 UTC (permalink / raw)
To: absahu, linux-kernel, linux-clk, agross, linux-arm-msm, sboyd,
mturquette, Robert Marko
Cc: Dirk Buchwalder
On Thu, 10 Feb 2022 18:31:00 +0100, Robert Marko wrote:
> From: Dirk Buchwalder <buchwalder@posteo.de>
>
> Use floor ops on SDCC1 APPS clock in order to round down selected clock
> frequency and avoid overclocking SD/eMMC cards.
>
> For example, currently HS200 cards were failling tuning as they were
> actually being clocked at 384MHz instead of 192MHz.
> This caused some boards to disable 1.8V I/O and force the eMMC into the
> standard HS mode (50MHz) and that appeared to work despite the eMMC being
> overclocked to 96Mhz in that case.
>
> [...]
Applied, thanks!
[1/1] clk: qcom: ipq8074: Use floor ops for SDCC1 clock
commit: b77d8306d84f83d1da68028a68c91da9c867b6f6
Best regards,
--
Bjorn Andersson <bjorn.andersson@linaro.org>
^ permalink raw reply [flat|nested] 3+ messages in thread
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2022-02-18 0:14 ` Stephen Boyd
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