* [PATCH v3 1/5] dt-bindings: phy: uniphier-usb2: Add vbus-supply
2022-03-30 10:55 [PATCH v3 0/5] dt-bindings: phy: Fix uniphier descriptions Kunihiko Hayashi
@ 2022-03-30 10:55 ` Kunihiko Hayashi
2022-03-30 10:55 ` [PATCH v3 2/5] dt-bindings: phy: uniphier-usb3ss: Treat vbus-supply as optional Kunihiko Hayashi
` (4 subsequent siblings)
5 siblings, 0 replies; 10+ messages in thread
From: Kunihiko Hayashi @ 2022-03-30 10:55 UTC (permalink / raw)
To: Vinod Koul, Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Masami Hiramatsu, linux-phy, devicetree, linux-arm-kernel,
linux-kernel, Kunihiko Hayashi
UniPhier USB2 PHY controller can apply vbus-supply.
Add "vbus-supply" property to fix the following warning.
uniphier-pro4-ace.dtb: usb-glue: phy@2: 'vbus-supply' does not match any of the regexes: 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml
index 479b203f7aa6..63dab914a48d 100644
--- a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml
@@ -43,6 +43,9 @@ patternProperties:
"#phy-cells":
const: 0
+ vbus-supply:
+ description: A phandle to the regulator for USB VBUS, only for USB host
+
required:
- reg
- "#phy-cells"
--
2.25.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v3 2/5] dt-bindings: phy: uniphier-usb3ss: Treat vbus-supply as optional
2022-03-30 10:55 [PATCH v3 0/5] dt-bindings: phy: Fix uniphier descriptions Kunihiko Hayashi
2022-03-30 10:55 ` [PATCH v3 1/5] dt-bindings: phy: uniphier-usb2: Add vbus-supply Kunihiko Hayashi
@ 2022-03-30 10:55 ` Kunihiko Hayashi
2022-03-30 10:55 ` [PATCH v3 3/5] dt-bindings: phy: uniphier-ahci: Fix missing reset-names Kunihiko Hayashi
` (3 subsequent siblings)
5 siblings, 0 replies; 10+ messages in thread
From: Kunihiko Hayashi @ 2022-03-30 10:55 UTC (permalink / raw)
To: Vinod Koul, Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Masami Hiramatsu, linux-phy, devicetree, linux-arm-kernel,
linux-kernel, Kunihiko Hayashi
The usb-device doesn't need "vbus-supply" property, so the property should
be removed from required.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml
index 92d46eb913a3..06c957d52d23 100644
--- a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml
@@ -61,7 +61,7 @@ properties:
- const: phy
vbus-supply:
- description: A phandle to the regulator for USB VBUS
+ description: A phandle to the regulator for USB VBUS, only for USB host
required:
- compatible
@@ -71,7 +71,6 @@ required:
- clock-names
- resets
- reset-names
- - vbus-supply
additionalProperties: false
--
2.25.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v3 3/5] dt-bindings: phy: uniphier-ahci: Fix missing reset-names
2022-03-30 10:55 [PATCH v3 0/5] dt-bindings: phy: Fix uniphier descriptions Kunihiko Hayashi
2022-03-30 10:55 ` [PATCH v3 1/5] dt-bindings: phy: uniphier-usb2: Add vbus-supply Kunihiko Hayashi
2022-03-30 10:55 ` [PATCH v3 2/5] dt-bindings: phy: uniphier-usb3ss: Treat vbus-supply as optional Kunihiko Hayashi
@ 2022-03-30 10:55 ` Kunihiko Hayashi
2022-03-30 10:55 ` [PATCH v3 4/5] dt-bindings: phy: uniphier-usb3hs: Fix incorrect clock-names and reset-names Kunihiko Hayashi
` (2 subsequent siblings)
5 siblings, 0 replies; 10+ messages in thread
From: Kunihiko Hayashi @ 2022-03-30 10:55 UTC (permalink / raw)
To: Vinod Koul, Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Masami Hiramatsu, linux-phy, devicetree, linux-arm-kernel,
linux-kernel, Kunihiko Hayashi
UniPhier AHCI PHY controller needs to specify 6 reset lines, so this adds
missing "phy" to reset-names and increases maxItems of resets.
Fixes: 34f92b67621f ("dt-bindings: phy: uniphier-ahci: Add bindings for Pro4 SoC")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml
index 3b400a85b44a..14f7579e7daa 100644
--- a/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml
@@ -43,13 +43,14 @@ properties:
resets:
minItems: 2
- maxItems: 5
+ maxItems: 6
reset-names:
oneOf:
- items: # for Pro4
- const: link
- const: gio
+ - const: phy
- const: pm
- const: tx
- const: rx
--
2.25.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v3 4/5] dt-bindings: phy: uniphier-usb3hs: Fix incorrect clock-names and reset-names
2022-03-30 10:55 [PATCH v3 0/5] dt-bindings: phy: Fix uniphier descriptions Kunihiko Hayashi
` (2 preceding siblings ...)
2022-03-30 10:55 ` [PATCH v3 3/5] dt-bindings: phy: uniphier-ahci: Fix missing reset-names Kunihiko Hayashi
@ 2022-03-30 10:55 ` Kunihiko Hayashi
2022-03-30 10:55 ` [PATCH v3 5/5] dt-bindings: phy: uniphier: Clean up clocks, resets, and their names using compatible string Kunihiko Hayashi
2022-04-13 6:42 ` [PATCH v3 0/5] dt-bindings: phy: Fix uniphier descriptions Vinod Koul
5 siblings, 0 replies; 10+ messages in thread
From: Kunihiko Hayashi @ 2022-03-30 10:55 UTC (permalink / raw)
To: Vinod Koul, Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Masami Hiramatsu, linux-phy, devicetree, linux-arm-kernel,
linux-kernel, Kunihiko Hayashi
There is no clock-names and reset-names for Pro5 SoC, that should have two
properties, "gio" and "link" like usb3-ssphy.
And according to the existing PXs2 devicetree, the clock-names for PXs2 SoC
should have "link" and "phy", and minItems of clocks should be 2.
Fixes: 134ab2845acb ("dt-bindings: phy: Convert UniPhier USB3-PHY conroller to json-schema")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../phy/socionext,uniphier-usb3hs-phy.yaml | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
index 33946efcac5e..1bbd164f2527 100644
--- a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
@@ -31,12 +31,14 @@ properties:
const: 0
clocks:
- minItems: 1
+ minItems: 2
maxItems: 3
clock-names:
oneOf:
- - const: link # for PXs2
+ - items: # for Pro5
+ - const: gio
+ - const: link
- items: # for PXs3 with phy-ext
- const: link
- const: phy
@@ -49,9 +51,13 @@ properties:
maxItems: 2
reset-names:
- items:
- - const: link
- - const: phy
+ oneOf:
+ - items: # for Pro5
+ - const: gio
+ - const: link
+ - items: # for others
+ - const: link
+ - const: phy
vbus-supply:
description: A phandle to the regulator for USB VBUS
--
2.25.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v3 5/5] dt-bindings: phy: uniphier: Clean up clocks, resets, and their names using compatible string
2022-03-30 10:55 [PATCH v3 0/5] dt-bindings: phy: Fix uniphier descriptions Kunihiko Hayashi
` (3 preceding siblings ...)
2022-03-30 10:55 ` [PATCH v3 4/5] dt-bindings: phy: uniphier-usb3hs: Fix incorrect clock-names and reset-names Kunihiko Hayashi
@ 2022-03-30 10:55 ` Kunihiko Hayashi
2022-03-30 17:40 ` Krzysztof Kozlowski
2022-04-13 6:42 ` [PATCH v3 0/5] dt-bindings: phy: Fix uniphier descriptions Vinod Koul
5 siblings, 1 reply; 10+ messages in thread
From: Kunihiko Hayashi @ 2022-03-30 10:55 UTC (permalink / raw)
To: Vinod Koul, Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Masami Hiramatsu, linux-phy, devicetree, linux-arm-kernel,
linux-kernel, Kunihiko Hayashi
Instead of "oneOf:" choices, use "allOf:" and "if:" to define clocks,
clock-names, resets, and reset-names that can be taken by the compatible
string.
The order of clock-names and reset-names doesn't change here.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
.../phy/socionext,uniphier-ahci-phy.yaml | 90 +++++++++++++-----
.../phy/socionext,uniphier-pcie-phy.yaml | 47 ++++++---
.../phy/socionext,uniphier-usb3hs-phy.yaml | 93 ++++++++++++++----
.../phy/socionext,uniphier-usb3ss-phy.yaml | 95 +++++++++++++++----
4 files changed, 251 insertions(+), 74 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml
index 14f7579e7daa..a3cd45acea28 100644
--- a/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml
@@ -30,33 +30,79 @@ properties:
minItems: 1
maxItems: 2
- clock-names:
- oneOf:
- - items: # for PXs2
- - const: link
- - items: # for Pro4
- - const: link
- - const: gio
- - items: # for others
- - const: link
- - const: phy
+ clock-names: true
resets:
minItems: 2
maxItems: 6
- reset-names:
- oneOf:
- - items: # for Pro4
- - const: link
- - const: gio
- - const: phy
- - const: pm
- - const: tx
- - const: rx
- - items: # for others
- - const: link
- - const: phy
+ reset-names: true
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: socionext,uniphier-pro4-ahci-phy
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ maxItems: 2
+ clock-names:
+ items:
+ - const: link
+ - const: gio
+ resets:
+ minItems: 6
+ maxItems: 6
+ reset-names:
+ items:
+ - const: link
+ - const: gio
+ - const: phy
+ - const: pm
+ - const: tx
+ - const: rx
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: socionext,uniphier-pxs2-ahci-phy
+ then:
+ properties:
+ clocks:
+ maxItems: 1
+ clock-names:
+ const: link
+ resets:
+ minItems: 2
+ maxItems: 2
+ reset-names:
+ items:
+ - const: link
+ - const: phy
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: socionext,uniphier-pxs3-ahci-phy
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ maxItems: 2
+ clock-names:
+ items:
+ - const: link
+ - const: phy
+ resets:
+ minItems: 2
+ maxItems: 2
+ reset-names:
+ items:
+ - const: link
+ - const: phy
required:
- compatible
diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml
index fbb71d6dd531..b3ed2f74a414 100644
--- a/Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml
@@ -31,28 +31,51 @@ properties:
minItems: 1
maxItems: 2
- clock-names:
- oneOf:
- - items: # for Pro5
- - const: gio
- - const: link
- - const: link # for others
+ clock-names: true
resets:
minItems: 1
maxItems: 2
- reset-names:
- oneOf:
- - items: # for Pro5
- - const: gio
- - const: link
- - const: link # for others
+ reset-names: true
socionext,syscon:
$ref: /schemas/types.yaml#/definitions/phandle
description: A phandle to system control to set configurations for phy
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: socionext,uniphier-pro5-pcie-phy
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ maxItems: 2
+ clock-names:
+ items:
+ - const: gio
+ - const: link
+ resets:
+ minItems: 2
+ maxItems: 2
+ reset-names:
+ items:
+ - const: gio
+ - const: link
+ else:
+ properties:
+ clocks:
+ maxItems: 1
+ clock-names:
+ const: link
+ resets:
+ maxItems: 1
+ reset-names:
+ const: link
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
index 1bbd164f2527..21e4414eea60 100644
--- a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
@@ -34,30 +34,12 @@ properties:
minItems: 2
maxItems: 3
- clock-names:
- oneOf:
- - items: # for Pro5
- - const: gio
- - const: link
- - items: # for PXs3 with phy-ext
- - const: link
- - const: phy
- - const: phy-ext
- - items: # for others
- - const: link
- - const: phy
+ clock-names: true
resets:
maxItems: 2
- reset-names:
- oneOf:
- - items: # for Pro5
- - const: gio
- - const: link
- - items: # for others
- - const: link
- - const: phy
+ reset-names: true
vbus-supply:
description: A phandle to the regulator for USB VBUS
@@ -80,6 +62,77 @@ properties:
required for each port, if any one is omitted, the trimming data
of the port will not be set at all.
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: socionext,uniphier-pro5-usb3-hsphy
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ maxItems: 2
+ clock-names:
+ items:
+ - const: gio
+ - const: link
+ resets:
+ minItems: 2
+ maxItems: 2
+ reset-names:
+ items:
+ - const: gio
+ - const: link
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - socionext,uniphier-pxs2-usb3-hsphy
+ - socionext,uniphier-ld20-usb3-hsphy
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ maxItems: 2
+ clock-names:
+ items:
+ - const: link
+ - const: phy
+ resets:
+ minItems: 2
+ maxItems: 2
+ reset-names:
+ items:
+ - const: link
+ - const: phy
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - socionext,uniphier-pxs3-usb3-hsphy
+ - socionext,uniphier-nx1-usb3-hsphy
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ maxItems: 3
+ clock-names:
+ minItems: 2
+ items:
+ - const: link
+ - const: phy
+ - const: phy-ext
+ resets:
+ minItems: 2
+ maxItems: 2
+ reset-names:
+ items:
+ - const: link
+ - const: phy
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml
index 06c957d52d23..4c26d2d2303d 100644
--- a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml
@@ -35,34 +35,89 @@ properties:
minItems: 2
maxItems: 3
- clock-names:
- oneOf:
- - items: # for Pro4, Pro5
- - const: gio
- - const: link
- - items: # for PXs3 with phy-ext
- - const: link
- - const: phy
- - const: phy-ext
- - items: # for others
- - const: link
- - const: phy
+ clock-names: true
resets:
maxItems: 2
- reset-names:
- oneOf:
- - items: # for Pro4,Pro5
- - const: gio
- - const: link
- - items: # for others
- - const: link
- - const: phy
+ reset-names: true
vbus-supply:
description: A phandle to the regulator for USB VBUS, only for USB host
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - socionext,uniphier-pro4-usb3-ssphy
+ - socionext,uniphier-pro5-usb3-ssphy
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ maxItems: 2
+ clock-names:
+ items:
+ - const: gio
+ - const: link
+ resets:
+ minItems: 2
+ maxItems: 2
+ reset-names:
+ items:
+ - const: gio
+ - const: link
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - socionext,uniphier-pxs2-usb3-ssphy
+ - socionext,uniphier-ld20-usb3-ssphy
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ maxItems: 2
+ clock-names:
+ items:
+ - const: link
+ - const: phy
+ resets:
+ minItems: 2
+ maxItems: 2
+ reset-names:
+ items:
+ - const: link
+ - const: phy
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - socionext,uniphier-pxs3-usb3-ssphy
+ - socionext,uniphier-nx1-usb3-ssphy
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ maxItems: 3
+ clock-names:
+ minItems: 2
+ items:
+ - const: link
+ - const: phy
+ - const: phy-ext
+ resets:
+ minItems: 2
+ maxItems: 2
+ reset-names:
+ items:
+ - const: link
+ - const: phy
+
required:
- compatible
- reg
--
2.25.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH v3 5/5] dt-bindings: phy: uniphier: Clean up clocks, resets, and their names using compatible string
2022-03-30 10:55 ` [PATCH v3 5/5] dt-bindings: phy: uniphier: Clean up clocks, resets, and their names using compatible string Kunihiko Hayashi
@ 2022-03-30 17:40 ` Krzysztof Kozlowski
2022-03-31 0:50 ` Kunihiko Hayashi
0 siblings, 1 reply; 10+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-30 17:40 UTC (permalink / raw)
To: Kunihiko Hayashi, Vinod Koul, Kishon Vijay Abraham I,
Rob Herring, Krzysztof Kozlowski
Cc: Masami Hiramatsu, linux-phy, devicetree, linux-arm-kernel, linux-kernel
On 30/03/2022 12:55, Kunihiko Hayashi wrote:
> Instead of "oneOf:" choices, use "allOf:" and "if:" to define clocks,
> clock-names, resets, and reset-names that can be taken by the compatible
> string.
>
> The order of clock-names and reset-names doesn't change here.
>
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
> .../phy/socionext,uniphier-ahci-phy.yaml | 90 +++++++++++++-----
> .../phy/socionext,uniphier-pcie-phy.yaml | 47 ++++++---
> .../phy/socionext,uniphier-usb3hs-phy.yaml | 93 ++++++++++++++----
> .../phy/socionext,uniphier-usb3ss-phy.yaml | 95 +++++++++++++++----
> 4 files changed, 251 insertions(+), 74 deletions(-)
>
(...)
> diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
> index 1bbd164f2527..21e4414eea60 100644
> --- a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
> @@ -34,30 +34,12 @@ properties:
> minItems: 2
> maxItems: 3
>
> - clock-names:
> - oneOf:
> - - items: # for Pro5
> - - const: gio
> - - const: link
> - - items: # for PXs3 with phy-ext
> - - const: link
> - - const: phy
> - - const: phy-ext
> - - items: # for others
> - - const: link
> - - const: phy
> + clock-names: true
>
> resets:
> maxItems: 2
>
> - reset-names:
> - oneOf:
> - - items: # for Pro5
> - - const: gio
> - - const: link
> - - items: # for others
> - - const: link
> - - const: phy
> + reset-names: true
>
> vbus-supply:
> description: A phandle to the regulator for USB VBUS
> @@ -80,6 +62,77 @@ properties:
> required for each port, if any one is omitted, the trimming data
> of the port will not be set at all.
>
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: socionext,uniphier-pro5-usb3-hsphy
> + then:
> + properties:
> + clocks:
> + minItems: 2
> + maxItems: 2
> + clock-names:
> + items:
> + - const: gio
> + - const: link
> + resets:
> + minItems: 2
> + maxItems: 2
> + reset-names:
> + items:
> + - const: gio
> + - const: link
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - socionext,uniphier-pxs2-usb3-hsphy
> + - socionext,uniphier-ld20-usb3-hsphy
> + then:
> + properties:
> + clocks:
> + minItems: 2
> + maxItems: 2
> + clock-names:
> + items:
> + - const: link
> + - const: phy
> + resets:
> + minItems: 2
> + maxItems: 2
> + reset-names:
> + items:
> + - const: link
> + - const: phy
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - socionext,uniphier-pxs3-usb3-hsphy
> + - socionext,uniphier-nx1-usb3-hsphy
> + then:
> + properties:
> + clocks:
> + minItems: 2
Why minItems:2? Is the last phy-ext clock optional?
> + maxItems: 3
> + clock-names:
> + minItems: 2
> + items:
> + - const: link
> + - const: phy
> + - const: phy-ext
> + resets:
> + minItems: 2
> + maxItems: 2
> + reset-names:
> + items:
> + - const: link
> + - const: phy
> +
> required:
> - compatible
> - reg
> diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml
> index 06c957d52d23..4c26d2d2303d 100644
> --- a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml
> @@ -35,34 +35,89 @@ properties:
> minItems: 2
> maxItems: 3
>
> - clock-names:
> - oneOf:
> - - items: # for Pro4, Pro5
> - - const: gio
> - - const: link
> - - items: # for PXs3 with phy-ext
> - - const: link
> - - const: phy
> - - const: phy-ext
> - - items: # for others
> - - const: link
> - - const: phy
> + clock-names: true
>
> resets:
> maxItems: 2
>
> - reset-names:
> - oneOf:
> - - items: # for Pro4,Pro5
> - - const: gio
> - - const: link
> - - items: # for others
> - - const: link
> - - const: phy
> + reset-names: true
>
> vbus-supply:
> description: A phandle to the regulator for USB VBUS, only for USB host
>
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - socionext,uniphier-pro4-usb3-ssphy
> + - socionext,uniphier-pro5-usb3-ssphy
> + then:
> + properties:
> + clocks:
> + minItems: 2
> + maxItems: 2
> + clock-names:
> + items:
> + - const: gio
> + - const: link
> + resets:
> + minItems: 2
> + maxItems: 2
> + reset-names:
> + items:
> + - const: gio
> + - const: link
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - socionext,uniphier-pxs2-usb3-ssphy
> + - socionext,uniphier-ld20-usb3-ssphy
> + then:
> + properties:
> + clocks:
> + minItems: 2
> + maxItems: 2
> + clock-names:
> + items:
> + - const: link
> + - const: phy
> + resets:
> + minItems: 2
> + maxItems: 2
> + reset-names:
> + items:
> + - const: link
> + - const: phy
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - socionext,uniphier-pxs3-usb3-ssphy
> + - socionext,uniphier-nx1-usb3-ssphy
> + then:
> + properties:
> + clocks:
> + minItems: 2
Same question as above.
> + maxItems: 3
> + clock-names:
> + minItems: 2
> + items:
> + - const: link
> + - const: phy
> + - const: phy-ext
> + resets:
> + minItems: 2
> + maxItems: 2
> + reset-names:
> + items:
> + - const: link
> + - const: phy
> +
> required:
> - compatible
> - reg
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v3 5/5] dt-bindings: phy: uniphier: Clean up clocks, resets, and their names using compatible string
2022-03-30 17:40 ` Krzysztof Kozlowski
@ 2022-03-31 0:50 ` Kunihiko Hayashi
2022-03-31 5:53 ` Krzysztof Kozlowski
0 siblings, 1 reply; 10+ messages in thread
From: Kunihiko Hayashi @ 2022-03-31 0:50 UTC (permalink / raw)
To: Krzysztof Kozlowski, Vinod Koul, Kishon Vijay Abraham I,
Rob Herring, Krzysztof Kozlowski
Cc: Masami Hiramatsu, linux-phy, devicetree, linux-arm-kernel, linux-kernel
Hi Krzysztof,
On 2022/03/31 2:40, Krzysztof Kozlowski wrote:
> On 30/03/2022 12:55, Kunihiko Hayashi wrote:
>> Instead of "oneOf:" choices, use "allOf:" and "if:" to define clocks,
>> clock-names, resets, and reset-names that can be taken by the compatible
>> string.
>>
>> The order of clock-names and reset-names doesn't change here.
>>
>> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
>> ---
>> .../phy/socionext,uniphier-ahci-phy.yaml | 90 +++++++++++++-----
>> .../phy/socionext,uniphier-pcie-phy.yaml | 47 ++++++---
>> .../phy/socionext,uniphier-usb3hs-phy.yaml | 93 ++++++++++++++----
>> .../phy/socionext,uniphier-usb3ss-phy.yaml | 95 +++++++++++++++----
>> 4 files changed, 251 insertions(+), 74 deletions(-)
>>
>
> (...)
>
>> diff --git
>> a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
>> b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
>> index 1bbd164f2527..21e4414eea60 100644
>> ---
>> a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
>> +++
>> b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
>> @@ -34,30 +34,12 @@ properties:
>> minItems: 2
>> maxItems: 3
>>
>> - clock-names:
>> - oneOf:
>> - - items: # for Pro5
>> - - const: gio
>> - - const: link
>> - - items: # for PXs3 with phy-ext
>> - - const: link
>> - - const: phy
>> - - const: phy-ext
>> - - items: # for others
>> - - const: link
>> - - const: phy
>> + clock-names: true
>>
>> resets:
>> maxItems: 2
>>
>> - reset-names:
>> - oneOf:
>> - - items: # for Pro5
>> - - const: gio
>> - - const: link
>> - - items: # for others
>> - - const: link
>> - - const: phy
>> + reset-names: true
>>
>> vbus-supply:
>> description: A phandle to the regulator for USB VBUS
>> @@ -80,6 +62,77 @@ properties:
>> required for each port, if any one is omitted, the trimming data
>> of the port will not be set at all.
>>
>> +allOf:
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + const: socionext,uniphier-pro5-usb3-hsphy
>> + then:
>> + properties:
>> + clocks:
>> + minItems: 2
>> + maxItems: 2
>> + clock-names:
>> + items:
>> + - const: gio
>> + - const: link
>> + resets:
>> + minItems: 2
>> + maxItems: 2
>> + reset-names:
>> + items:
>> + - const: gio
>> + - const: link
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - socionext,uniphier-pxs2-usb3-hsphy
>> + - socionext,uniphier-ld20-usb3-hsphy
>> + then:
>> + properties:
>> + clocks:
>> + minItems: 2
>> + maxItems: 2
>> + clock-names:
>> + items:
>> + - const: link
>> + - const: phy
>> + resets:
>> + minItems: 2
>> + maxItems: 2
>> + reset-names:
>> + items:
>> + - const: link
>> + - const: phy
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - socionext,uniphier-pxs3-usb3-hsphy
>> + - socionext,uniphier-nx1-usb3-hsphy
>> + then:
>> + properties:
>> + clocks:
>> + minItems: 2
>
> Why minItems:2? Is the last phy-ext clock optional?
In an SoC with two controllers, there is a controller that requires extra
clock and a controller that does not. For example, PXs3 USB3 controller 1
needs "phy-ext" clock, but the controller 0 doesn't.
This difference is related to the phy configuration, where the controller 1
requires more clocks because it shares the phy with other subsystems.
So I think the last phy-ext clock should be optional.
>
>> + maxItems: 3
>> + clock-names:
>> + minItems: 2
>> + items:
>> + - const: link
>> + - const: phy
>> + - const: phy-ext
>> + resets:
>> + minItems: 2
>> + maxItems: 2
>> + reset-names:
>> + items:
>> + - const: link
>> + - const: phy
>> +
>> required:
>> - compatible
>> - reg
>> diff --git
>> a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml
>> b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml
>> index 06c957d52d23..4c26d2d2303d 100644
>> ---
>> a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml
>> +++
>> b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml
>> @@ -35,34 +35,89 @@ properties:
>> minItems: 2
>> maxItems: 3
>>
>> - clock-names:
>> - oneOf:
>> - - items: # for Pro4, Pro5
>> - - const: gio
>> - - const: link
>> - - items: # for PXs3 with phy-ext
>> - - const: link
>> - - const: phy
>> - - const: phy-ext
>> - - items: # for others
>> - - const: link
>> - - const: phy
>> + clock-names: true
>>
>> resets:
>> maxItems: 2
>>
>> - reset-names:
>> - oneOf:
>> - - items: # for Pro4,Pro5
>> - - const: gio
>> - - const: link
>> - - items: # for others
>> - - const: link
>> - - const: phy
>> + reset-names: true
>>
>> vbus-supply:
>> description: A phandle to the regulator for USB VBUS, only for USB
>> host
>>
>> +allOf:
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - socionext,uniphier-pro4-usb3-ssphy
>> + - socionext,uniphier-pro5-usb3-ssphy
>> + then:
>> + properties:
>> + clocks:
>> + minItems: 2
>> + maxItems: 2
>> + clock-names:
>> + items:
>> + - const: gio
>> + - const: link
>> + resets:
>> + minItems: 2
>> + maxItems: 2
>> + reset-names:
>> + items:
>> + - const: gio
>> + - const: link
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - socionext,uniphier-pxs2-usb3-ssphy
>> + - socionext,uniphier-ld20-usb3-ssphy
>> + then:
>> + properties:
>> + clocks:
>> + minItems: 2
>> + maxItems: 2
>> + clock-names:
>> + items:
>> + - const: link
>> + - const: phy
>> + resets:
>> + minItems: 2
>> + maxItems: 2
>> + reset-names:
>> + items:
>> + - const: link
>> + - const: phy
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - socionext,uniphier-pxs3-usb3-ssphy
>> + - socionext,uniphier-nx1-usb3-ssphy
>> + then:
>> + properties:
>> + clocks:
>> + minItems: 2
>
> Same question as above.
This is also the same reason.
Thank you,
---
Best Regards
Kunihiko Hayashi
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v3 5/5] dt-bindings: phy: uniphier: Clean up clocks, resets, and their names using compatible string
2022-03-31 0:50 ` Kunihiko Hayashi
@ 2022-03-31 5:53 ` Krzysztof Kozlowski
0 siblings, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-31 5:53 UTC (permalink / raw)
To: Kunihiko Hayashi, Vinod Koul, Kishon Vijay Abraham I,
Rob Herring, Krzysztof Kozlowski
Cc: Masami Hiramatsu, linux-phy, devicetree, linux-arm-kernel, linux-kernel
On 31/03/2022 02:50, Kunihiko Hayashi wrote:
> Hi Krzysztof,
>
> On 2022/03/31 2:40, Krzysztof Kozlowski wrote:
>> On 30/03/2022 12:55, Kunihiko Hayashi wrote:
>>> Instead of "oneOf:" choices, use "allOf:" and "if:" to define clocks,
>>> clock-names, resets, and reset-names that can be taken by the compatible
>>> string.
>>>
>>> The order of clock-names and reset-names doesn't change here.
>>>
>>> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
>>> ---
>>> .../phy/socionext,uniphier-ahci-phy.yaml | 90 +++++++++++++-----
>>> .../phy/socionext,uniphier-pcie-phy.yaml | 47 ++++++---
>>> .../phy/socionext,uniphier-usb3hs-phy.yaml | 93 ++++++++++++++----
>>> .../phy/socionext,uniphier-usb3ss-phy.yaml | 95 +++++++++++++++----
>>> 4 files changed, 251 insertions(+), 74 deletions(-)
>>>
>>
>> (...)
>>
>>> diff --git
>>> a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
>>> b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
>>> index 1bbd164f2527..21e4414eea60 100644
>>> ---
>>> a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
>>> +++
>>> b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
>>> @@ -34,30 +34,12 @@ properties:
>>> minItems: 2
>>> maxItems: 3
>>>
>>> - clock-names:
>>> - oneOf:
>>> - - items: # for Pro5
>>> - - const: gio
>>> - - const: link
>>> - - items: # for PXs3 with phy-ext
>>> - - const: link
>>> - - const: phy
>>> - - const: phy-ext
>>> - - items: # for others
>>> - - const: link
>>> - - const: phy
>>> + clock-names: true
>>>
>>> resets:
>>> maxItems: 2
>>>
>>> - reset-names:
>>> - oneOf:
>>> - - items: # for Pro5
>>> - - const: gio
>>> - - const: link
>>> - - items: # for others
>>> - - const: link
>>> - - const: phy
>>> + reset-names: true
>>>
>>> vbus-supply:
>>> description: A phandle to the regulator for USB VBUS
>>> @@ -80,6 +62,77 @@ properties:
>>> required for each port, if any one is omitted, the trimming data
>>> of the port will not be set at all.
>>>
>>> +allOf:
>>> + - if:
>>> + properties:
>>> + compatible:
>>> + contains:
>>> + const: socionext,uniphier-pro5-usb3-hsphy
>>> + then:
>>> + properties:
>>> + clocks:
>>> + minItems: 2
>>> + maxItems: 2
>>> + clock-names:
>>> + items:
>>> + - const: gio
>>> + - const: link
>>> + resets:
>>> + minItems: 2
>>> + maxItems: 2
>>> + reset-names:
>>> + items:
>>> + - const: gio
>>> + - const: link
>>> + - if:
>>> + properties:
>>> + compatible:
>>> + contains:
>>> + enum:
>>> + - socionext,uniphier-pxs2-usb3-hsphy
>>> + - socionext,uniphier-ld20-usb3-hsphy
>>> + then:
>>> + properties:
>>> + clocks:
>>> + minItems: 2
>>> + maxItems: 2
>>> + clock-names:
>>> + items:
>>> + - const: link
>>> + - const: phy
>>> + resets:
>>> + minItems: 2
>>> + maxItems: 2
>>> + reset-names:
>>> + items:
>>> + - const: link
>>> + - const: phy
>>> + - if:
>>> + properties:
>>> + compatible:
>>> + contains:
>>> + enum:
>>> + - socionext,uniphier-pxs3-usb3-hsphy
>>> + - socionext,uniphier-nx1-usb3-hsphy
>>> + then:
>>> + properties:
>>> + clocks:
>>> + minItems: 2
>>
>> Why minItems:2? Is the last phy-ext clock optional?
>
> In an SoC with two controllers, there is a controller that requires extra
> clock and a controller that does not. For example, PXs3 USB3 controller 1
> needs "phy-ext" clock, but the controller 0 doesn't.
>
> This difference is related to the phy configuration, where the controller 1
> requires more clocks because it shares the phy with other subsystems.
>
> So I think the last phy-ext clock should be optional.
>
OK, thanks for explanation. I assume we talk about the hardware, not
about Linux driver needs. :)
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v3 0/5] dt-bindings: phy: Fix uniphier descriptions
2022-03-30 10:55 [PATCH v3 0/5] dt-bindings: phy: Fix uniphier descriptions Kunihiko Hayashi
` (4 preceding siblings ...)
2022-03-30 10:55 ` [PATCH v3 5/5] dt-bindings: phy: uniphier: Clean up clocks, resets, and their names using compatible string Kunihiko Hayashi
@ 2022-04-13 6:42 ` Vinod Koul
5 siblings, 0 replies; 10+ messages in thread
From: Vinod Koul @ 2022-04-13 6:42 UTC (permalink / raw)
To: Kunihiko Hayashi
Cc: Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Masami Hiramatsu, linux-phy, devicetree, linux-arm-kernel,
linux-kernel
On 30-03-22, 19:55, Kunihiko Hayashi wrote:
> This series fixes dt-schema descriptions for all PHYs implemented in
> UniPhier SoCs.
Applied, thanks
--
~Vinod
^ permalink raw reply [flat|nested] 10+ messages in thread