[PATCH 0/2] Add software clock gating requirement check

[PATCH 0/2] Add software clock gating requirement check

[Srinivasa Rao Mandadapu]

This patch set is to add software clock gating requirement check

Srinivasa Rao Mandadapu (2):
  soundwire: qcom: Add flag for software clock gating check
  ASoC: qcom: soundwire: Add software clock gating requirement check

 drivers/soundwire/qcom.c | 28 +++++++++++++++++++++-------
 1 file changed, 21 insertions(+), 7 deletions(-)

-- 
2.7.4

[PATCH 1/2] soundwire: qcom: Add flag for software clock gating check

[Srinivasa Rao Mandadapu]

Add flag in qcom_swrm_data private data structure for validating
software colck gating control requirement.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
---
 drivers/soundwire/qcom.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c
index a3fccf0..38c3bf5 100644
--- a/drivers/soundwire/qcom.c
+++ b/drivers/soundwire/qcom.c
@@ -181,6 +181,7 @@ struct qcom_swrm_ctrl {
 struct qcom_swrm_data {
 	u32 default_cols;
 	u32 default_rows;
+	bool sw_clk_gate_required;
 };
 
 static const struct qcom_swrm_data swrm_v1_3_data = {
-- 
2.7.4

[PATCH 2/2] ASoC: qcom: soundwire: Add software clock gating requirement check

[Srinivasa Rao Mandadapu]

Validate software clock gating required or not and do software
clock gating on hclk if soundwire is operational and keep it
running by adding flag in private dat structure.
This is to avoid conflict between older architectures,
where software clock gating is not required and on latest
architectues, where software clock gating is mandatory.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
---
 drivers/soundwire/qcom.c | 27 ++++++++++++++++++++-------
 1 file changed, 20 insertions(+), 7 deletions(-)

diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c
index 38c3bf5..4896e92 100644
--- a/drivers/soundwire/qcom.c
+++ b/drivers/soundwire/qcom.c
@@ -194,6 +194,12 @@ static const struct qcom_swrm_data swrm_v1_5_data = {
 	.default_cols = 16,
 };
 
+static const struct qcom_swrm_data swrm_v1_6_data = {
+	.default_rows = 50,
+	.default_cols = 16,
+	.sw_clk_gate_required = 1,
+};
+
 #define to_qcom_sdw(b)	container_of(b, struct qcom_swrm_ctrl, bus)
 
 static int qcom_swrm_ahb_reg_read(struct qcom_swrm_ctrl *ctrl, int reg,
@@ -659,7 +665,8 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl)
 	val = FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK, ctrl->rows_index);
 	val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK, ctrl->cols_index);
 
-	reset_control_reset(ctrl->audio_cgcr);
+	if (data->sw_clk_gate_required)
+		reset_control_reset(ctrl->audio_cgcr);
 
 	ctrl->reg_write(ctrl, SWRM_MCP_FRAME_CTRL_BANK_ADDR(0), val);
 
@@ -1312,6 +1319,15 @@ static int qcom_swrm_probe(struct platform_device *pdev)
 			return PTR_ERR(ctrl->mmio);
 	}
 
+	if (data->sw_clk_gate_required) {
+		ctrl->audio_cgcr = devm_reset_control_get_exclusive(dev, "swr_audio_cgcr");
+		if (IS_ERR(ctrl->audio_cgcr)) {
+			dev_err(dev, "Failed to get cgcr reset ctrl required for SW gating\n");
+			ret = PTR_ERR(ctrl->audio_cgcr);
+			goto err_init;
+		}
+	}
+
 	ctrl->irq = of_irq_get(dev->of_node, 0);
 	if (ctrl->irq < 0) {
 		ret = ctrl->irq;
@@ -1337,10 +1353,6 @@ static int qcom_swrm_probe(struct platform_device *pdev)
 	ctrl->bus.compute_params = &qcom_swrm_compute_params;
 	ctrl->bus.clk_stop_timeout = 300;
 
-	ctrl->audio_cgcr = devm_reset_control_get_exclusive(dev, "swr_audio_cgcr");
-	if (IS_ERR(ctrl->audio_cgcr))
-		dev_err(dev, "Failed to get audio_cgcr reset required for soundwire-v1.6.0\n");
-
 	ret = qcom_swrm_get_port_config(ctrl);
 	if (ret)
 		goto err_clk;
@@ -1494,7 +1506,8 @@ static int __maybe_unused swrm_runtime_resume(struct device *dev)
 		qcom_swrm_get_device_status(ctrl);
 		sdw_handle_slave_status(&ctrl->bus, ctrl->status);
 	} else {
-		reset_control_reset(ctrl->audio_cgcr);
+		if (data->sw_clk_gate_required)
+			reset_control_reset(ctrl->audio_cgcr);
 
 		ctrl->reg_write(ctrl, SWRM_MCP_BUS_CTRL, SWRM_MCP_BUS_CLK_START);
 		ctrl->reg_write(ctrl, SWRM_INTERRUPT_CLEAR,
@@ -1559,7 +1572,7 @@ static const struct dev_pm_ops swrm_dev_pm_ops = {
 static const struct of_device_id qcom_swrm_of_match[] = {
 	{ .compatible = "qcom,soundwire-v1.3.0", .data = &swrm_v1_3_data },
 	{ .compatible = "qcom,soundwire-v1.5.1", .data = &swrm_v1_5_data },
-	{ .compatible = "qcom,soundwire-v1.6.0", .data = &swrm_v1_5_data },
+	{ .compatible = "qcom,soundwire-v1.6.0", .data = &swrm_v1_6_data },
 	{/* sentinel */},
 };
 
-- 
2.7.4

Re: [PATCH 2/2] ASoC: qcom: soundwire: Add software clock gating requirement check

[kernel test robot]

Hi Srinivasa,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on broonie-sound/for-next]
[cannot apply to linus/master v5.19-rc1 next-20220607]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/intel-lab-lkp/linux/commits/Srinivasa-Rao-Mandadapu/Add-software-clock-gating-requirement-check/20220607-203739
base:   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
config: i386-randconfig-a006 (https://download.01.org/0day-ci/archive/20220608/202206081054.vVkYPkJt-lkp@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project b92436efcb7813fc481b30f2593a4907568d917a)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/86aa15d36b06f7b73938f00f9ad99eff75a94a94
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Srinivasa-Rao-Mandadapu/Add-software-clock-gating-requirement-check/20220607-203739
        git checkout 86aa15d36b06f7b73938f00f9ad99eff75a94a94
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=i386 SHELL=/bin/bash drivers/soundwire/

If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> drivers/soundwire/qcom.c:668:6: error: use of undeclared identifier 'data'
           if (data->sw_clk_gate_required)
               ^
   drivers/soundwire/qcom.c:1509:7: error: use of undeclared identifier 'data'
                   if (data->sw_clk_gate_required)
                       ^
   2 errors generated.


vim +/data +668 drivers/soundwire/qcom.c

   659	
   660	static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl)
   661	{
   662		u32 val;
   663	
   664		/* Clear Rows and Cols */
   665		val = FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK, ctrl->rows_index);
   666		val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK, ctrl->cols_index);
   667	
 > 668		if (data->sw_clk_gate_required)
   669			reset_control_reset(ctrl->audio_cgcr);
   670	
   671		ctrl->reg_write(ctrl, SWRM_MCP_FRAME_CTRL_BANK_ADDR(0), val);
   672	
   673		/* Enable Auto enumeration */
   674		ctrl->reg_write(ctrl, SWRM_ENUMERATOR_CFG_ADDR, 1);
   675	
   676		ctrl->intr_mask = SWRM_INTERRUPT_STATUS_RMSK;
   677		/* Mask soundwire interrupts */
   678		ctrl->reg_write(ctrl, SWRM_INTERRUPT_MASK_ADDR,
   679				SWRM_INTERRUPT_STATUS_RMSK);
   680	
   681		/* Configure No pings */
   682		ctrl->reg_read(ctrl, SWRM_MCP_CFG_ADDR, &val);
   683		u32p_replace_bits(&val, SWRM_DEF_CMD_NO_PINGS, SWRM_MCP_CFG_MAX_NUM_OF_CMD_NO_PINGS_BMSK);
   684		ctrl->reg_write(ctrl, SWRM_MCP_CFG_ADDR, val);
   685	
   686		ctrl->reg_write(ctrl, SWRM_MCP_BUS_CTRL, SWRM_MCP_BUS_CLK_START);
   687		/* Configure number of retries of a read/write cmd */
   688		if (ctrl->version > 0x01050001) {
   689			/* Only for versions >= 1.5.1 */
   690			ctrl->reg_write(ctrl, SWRM_CMD_FIFO_CFG_ADDR,
   691					SWRM_RD_WR_CMD_RETRIES |
   692					SWRM_CONTINUE_EXEC_ON_CMD_IGNORE);
   693		} else {
   694			ctrl->reg_write(ctrl, SWRM_CMD_FIFO_CFG_ADDR,
   695					SWRM_RD_WR_CMD_RETRIES);
   696		}
   697	
   698		/* Set IRQ to PULSE */
   699		ctrl->reg_write(ctrl, SWRM_COMP_CFG_ADDR,
   700				SWRM_COMP_CFG_IRQ_LEVEL_OR_PULSE_MSK |
   701				SWRM_COMP_CFG_ENABLE_MSK);
   702	
   703		/* enable CPU IRQs */
   704		if (ctrl->mmio) {
   705			ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN,
   706					SWRM_INTERRUPT_STATUS_RMSK);
   707		}
   708		ctrl->slave_status = 0;
   709		ctrl->reg_read(ctrl, SWRM_COMP_PARAMS, &val);
   710		ctrl->rd_fifo_depth = FIELD_GET(SWRM_COMP_PARAMS_RD_FIFO_DEPTH, val);
   711		ctrl->wr_fifo_depth = FIELD_GET(SWRM_COMP_PARAMS_WR_FIFO_DEPTH, val);
   712	
   713		return 0;
   714	}
   715	

-- 
0-DAY CI Kernel Test Service
https://01.org/lkp