* [PATCH v4 0/2] drm/msm/adreno: GPU support on SC8280XP
@ 2023-06-14 14:22 Bjorn Andersson
2023-06-14 14:22 ` [PATCH v4 1/2] arm64: dts: qcom: sc8280xp: Add GPU related nodes Bjorn Andersson
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Bjorn Andersson @ 2023-06-14 14:22 UTC (permalink / raw)
Cc: Bjorn Andersson, Konrad Dybcio, Dmitry Baryshkov, Akhil P Oommen,
linux-arm-msm, devicetree, linux-kernel, dri-devel, freedreno,
johan, mani
With the A690 support merged in the drm/msm driver, this series adds the
DeviceTree pieces to make it go on sc8280xp.
Note that in order for the GPU driver to probe, the last change
requires (which is now in linux-next):
https://lore.kernel.org/linux-arm-msm/20230410185226.3240336-1-dmitry.baryshkov@linaro.org/
Changes since v3:
- Dropped DRM patch, as it has been merged
- Left status okay on gmu, gpucc and smmu nodes, disabled latter two in
sa8540p for now
- s/adreno_smmu/gpu_smmu/ to get the GPU nodes adjacent in sa8540p
Changes since v2:
- Added missing opp level (both gpu and gmu)
- Corrected opp-level for highest gpu opp
- Added dma-coherent to gpu smmu
Changes since v1:
- Dropped gmu_pdc_seq region from &gmu, as it shouldn't have been used.
- Added missing compatible to &adreno_smmu.
- Dropped aoss_qmp clock in &gmu and &adreno_smmu.
Bjorn Andersson (2):
arm64: dts: qcom: sc8280xp: Add GPU related nodes
arm64: dts: qcom: sc8280xp: Enable GPU related nodes
arch/arm64/boot/dts/qcom/sa8540p.dtsi | 8 +
arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 14 ++
.../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 14 ++
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 175 ++++++++++++++++++
4 files changed, 211 insertions(+)
--
2.25.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v4 1/2] arm64: dts: qcom: sc8280xp: Add GPU related nodes
2023-06-14 14:22 [PATCH v4 0/2] drm/msm/adreno: GPU support on SC8280XP Bjorn Andersson
@ 2023-06-14 14:22 ` Bjorn Andersson
2023-06-14 15:26 ` Konrad Dybcio
2023-06-14 14:22 ` [PATCH v4 2/2] arm64: dts: qcom: sc8280xp: Enable " Bjorn Andersson
2023-06-14 16:03 ` [PATCH v4 0/2] drm/msm/adreno: GPU support on SC8280XP Bjorn Andersson
2 siblings, 1 reply; 7+ messages in thread
From: Bjorn Andersson @ 2023-06-14 14:22 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio
Cc: Rob Clark, Dmitry Baryshkov, Akhil P Oommen, linux-arm-msm,
devicetree, linux-kernel, freedreno, johan, mani,
Steev Klimaszewski, Johan Hovold
From: Bjorn Andersson <bjorn.andersson@linaro.org>
Add Adreno SMMU, GPU clock controller, GMU and GPU nodes for the
SC8280XP.
Tested-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
---
arch/arm64/boot/dts/qcom/sa8540p.dtsi | 8 ++
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 175 +++++++++++++++++++++++++
2 files changed, 183 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8540p.dtsi b/arch/arm64/boot/dts/qcom/sa8540p.dtsi
index 4a990fda8fc3..bacbdec56281 100644
--- a/arch/arm64/boot/dts/qcom/sa8540p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8540p.dtsi
@@ -167,6 +167,14 @@ opp-2592000000 {
};
};
+&gpucc {
+ status = "disabled";
+};
+
+&gpu_smmu {
+ status = "disabled";
+};
+
&pcie2a {
compatible = "qcom,pcie-sa8540p";
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index 6b1bb203b1d1..ac0596dfdbc4 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -6,6 +6,7 @@
#include <dt-bindings/clock/qcom,dispcc-sc8280xp.h>
#include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
+#include <dt-bindings/clock/qcom,gpucc-sc8280xp.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
#include <dt-bindings/interconnect/qcom,osm-l3.h>
@@ -2341,6 +2342,180 @@ tcsr: syscon@1fc0000 {
reg = <0x0 0x01fc0000 0x0 0x30000>;
};
+ gpu: gpu@3d00000 {
+ compatible = "qcom,adreno-690.0", "qcom,adreno";
+
+ reg = <0 0x03d00000 0 0x40000>,
+ <0 0x03d9e000 0 0x1000>,
+ <0 0x03d61000 0 0x800>;
+ reg-names = "kgsl_3d0_reg_memory",
+ "cx_mem",
+ "cx_dbgc";
+ interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
+ iommus = <&gpu_smmu 0 0xc00>, <&gpu_smmu 1 0xc00>;
+ operating-points-v2 = <&gpu_opp_table>;
+
+ qcom,gmu = <&gmu>;
+ interconnects = <&gem_noc MASTER_GFX3D 0 &mc_virt SLAVE_EBI1 0>;
+ interconnect-names = "gfx-mem";
+ #cooling-cells = <2>;
+
+ status = "disabled";
+
+ gpu_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-270000000 {
+ opp-hz = /bits/ 64 <270000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
+ opp-peak-kBps = <451000>;
+ };
+
+ opp-410000000 {
+ opp-hz = /bits/ 64 <410000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
+ opp-peak-kBps = <1555000>;
+ };
+
+ opp-500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
+ opp-peak-kBps = <1555000>;
+ };
+
+ opp-547000000 {
+ opp-hz = /bits/ 64 <547000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
+ opp-peak-kBps = <1555000>;
+ };
+
+ opp-606000000 {
+ opp-hz = /bits/ 64 <606000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
+ opp-peak-kBps = <2736000>;
+ };
+
+ opp-640000000 {
+ opp-hz = /bits/ 64 <640000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
+ opp-peak-kBps = <2736000>;
+ };
+
+ opp-655000000 {
+ opp-hz = /bits/ 64 <655000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
+ opp-peak-kBps = <2736000>;
+ };
+
+ opp-690000000 {
+ opp-hz = /bits/ 64 <690000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
+ opp-peak-kBps = <2736000>;
+ };
+ };
+ };
+
+ gmu: gmu@3d6a000 {
+ compatible = "qcom,adreno-gmu-690.0", "qcom,adreno-gmu";
+ reg = <0 0x03d6a000 0 0x34000>,
+ <0 0x03de0000 0 0x10000>,
+ <0 0x0b290000 0 0x10000>;
+ reg-names = "gmu", "rscc", "gmu_pdc";
+ interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hfi", "gmu";
+ clocks = <&gpucc GPU_CC_CX_GMU_CLK>,
+ <&gpucc GPU_CC_CXO_CLK>,
+ <&gcc GCC_DDRSS_GPU_AXI_CLK>,
+ <&gcc GCC_GPU_MEMNOC_GFX_CLK>,
+ <&gpucc GPU_CC_AHB_CLK>,
+ <&gpucc GPU_CC_HUB_CX_INT_CLK>,
+ <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>;
+ clock-names = "gmu",
+ "cxo",
+ "axi",
+ "memnoc",
+ "ahb",
+ "hub",
+ "smmu_vote";
+ power-domains = <&gpucc GPU_CC_CX_GDSC>,
+ <&gpucc GPU_CC_GX_GDSC>;
+ power-domain-names = "cx",
+ "gx";
+ iommus = <&gpu_smmu 5 0xc00>;
+ operating-points-v2 = <&gmu_opp_table>;
+
+ gmu_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
+ };
+
+ opp-500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
+ };
+ };
+ };
+
+ gpucc: clock-controller@3d90000 {
+ compatible = "qcom,sc8280xp-gpucc";
+ reg = <0 0x03d90000 0 0x9000>;
+ clocks = <&rpmhcc RPMH_CXO_CLK>,
+ <&gcc GCC_GPU_GPLL0_CLK_SRC>,
+ <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
+ clock-names = "bi_tcxo",
+ "gcc_gpu_gpll0_clk_src",
+ "gcc_gpu_gpll0_div_clk_src";
+
+ power-domains = <&rpmhpd SC8280XP_GFX>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+
+ gpu_smmu: iommu@3da0000 {
+ compatible = "qcom,sc8280xp-smmu-500", "qcom,adreno-smmu",
+ "qcom,smmu-500", "arm,mmu-500";
+ reg = <0 0x03da0000 0 0x20000>;
+ #iommu-cells = <2>;
+ #global-interrupts = <2>;
+ interrupts = <GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 688 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 689 IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&gcc GCC_GPU_MEMNOC_GFX_CLK>,
+ <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>,
+ <&gpucc GPU_CC_AHB_CLK>,
+ <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>,
+ <&gpucc GPU_CC_CX_GMU_CLK>,
+ <&gpucc GPU_CC_HUB_CX_INT_CLK>,
+ <&gpucc GPU_CC_HUB_AON_CLK>;
+ clock-names = "gcc_gpu_memnoc_gfx_clk",
+ "gcc_gpu_snoc_dvm_gfx_clk",
+ "gpu_cc_ahb_clk",
+ "gpu_cc_hlos1_vote_gpu_smmu_clk",
+ "gpu_cc_cx_gmu_clk",
+ "gpu_cc_hub_cx_int_clk",
+ "gpu_cc_hub_aon_clk";
+
+ power-domains = <&gpucc GPU_CC_CX_GDSC>;
+ dma-coherent;
+ };
+
usb_0_hsphy: phy@88e5000 {
compatible = "qcom,sc8280xp-usb-hs-phy",
"qcom,usb-snps-hs-5nm-phy";
--
2.25.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v4 2/2] arm64: dts: qcom: sc8280xp: Enable GPU related nodes
2023-06-14 14:22 [PATCH v4 0/2] drm/msm/adreno: GPU support on SC8280XP Bjorn Andersson
2023-06-14 14:22 ` [PATCH v4 1/2] arm64: dts: qcom: sc8280xp: Add GPU related nodes Bjorn Andersson
@ 2023-06-14 14:22 ` Bjorn Andersson
2023-06-14 15:27 ` Konrad Dybcio
2023-06-14 16:03 ` [PATCH v4 0/2] drm/msm/adreno: GPU support on SC8280XP Bjorn Andersson
2 siblings, 1 reply; 7+ messages in thread
From: Bjorn Andersson @ 2023-06-14 14:22 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio
Cc: Rob Clark, Dmitry Baryshkov, Akhil P Oommen, linux-arm-msm,
devicetree, linux-kernel, freedreno, johan, mani,
Steev Klimaszewski, Johan Hovold
From: Bjorn Andersson <bjorn.andersson@linaro.org>
Add memory reservation for the zap-shader and enable the Adreno SMMU,
GPU clock controller, GMU and the GPU nodes for the SC8280XP CRD and the
Lenovo ThinkPad X13s.
Tested-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
---
arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 14 ++++++++++++++
.../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 14 ++++++++++++++
2 files changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
index cd7e0097d8bc..b566e403d1db 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
@@ -210,6 +210,11 @@ vreg_wwan: regulator-wwan {
};
reserved-memory {
+ gpu_mem: gpu-mem@8bf00000 {
+ reg = <0 0x8bf00000 0 0x2000>;
+ no-map;
+ };
+
linux,cma {
compatible = "shared-dma-pool";
size = <0x0 0x8000000>;
@@ -390,6 +395,15 @@ &dispcc0 {
status = "okay";
};
+&gpu {
+ status = "okay";
+
+ zap-shader {
+ memory-region = <&gpu_mem>;
+ firmware-name = "qcom/sc8280xp/qcdxkmsuc8280.mbn";
+ };
+};
+
&mdss0 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
index 5ae057ad6438..7cc3028440b6 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
@@ -264,6 +264,11 @@ vreg_wwan: regulator-wwan {
};
reserved-memory {
+ gpu_mem: gpu-mem@8bf00000 {
+ reg = <0 0x8bf00000 0 0x2000>;
+ no-map;
+ };
+
linux,cma {
compatible = "shared-dma-pool";
size = <0x0 0x8000000>;
@@ -518,6 +523,15 @@ &dispcc0 {
status = "okay";
};
+&gpu {
+ status = "okay";
+
+ zap-shader {
+ memory-region = <&gpu_mem>;
+ firmware-name = "qcom/sc8280xp/LENOVO/21BX/qcdxkmsuc8280.mbn";
+ };
+};
+
&mdss0 {
status = "okay";
};
--
2.25.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v4 1/2] arm64: dts: qcom: sc8280xp: Add GPU related nodes
2023-06-14 14:22 ` [PATCH v4 1/2] arm64: dts: qcom: sc8280xp: Add GPU related nodes Bjorn Andersson
@ 2023-06-14 15:26 ` Konrad Dybcio
0 siblings, 0 replies; 7+ messages in thread
From: Konrad Dybcio @ 2023-06-14 15:26 UTC (permalink / raw)
To: Bjorn Andersson, Bjorn Andersson
Cc: Rob Clark, Dmitry Baryshkov, Akhil P Oommen, linux-arm-msm,
devicetree, linux-kernel, freedreno, johan, mani,
Steev Klimaszewski, Johan Hovold
On 14.06.2023 16:22, Bjorn Andersson wrote:
> From: Bjorn Andersson <bjorn.andersson@linaro.org>
>
> Add Adreno SMMU, GPU clock controller, GMU and GPU nodes for the
> SC8280XP.
>
> Tested-by: Steev Klimaszewski <steev@kali.org>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> Tested-by: Johan Hovold <johan+linaro@kernel.org>
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
> arch/arm64/boot/dts/qcom/sa8540p.dtsi | 8 ++
> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 175 +++++++++++++++++++++++++
> 2 files changed, 183 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8540p.dtsi b/arch/arm64/boot/dts/qcom/sa8540p.dtsi
> index 4a990fda8fc3..bacbdec56281 100644
> --- a/arch/arm64/boot/dts/qcom/sa8540p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8540p.dtsi
> @@ -167,6 +167,14 @@ opp-2592000000 {
> };
> };
>
> +&gpucc {
> + status = "disabled";
> +};
> +
> +&gpu_smmu {
> + status = "disabled";
> +};
> +
> &pcie2a {
> compatible = "qcom,pcie-sa8540p";
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index 6b1bb203b1d1..ac0596dfdbc4 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -6,6 +6,7 @@
>
> #include <dt-bindings/clock/qcom,dispcc-sc8280xp.h>
> #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
> +#include <dt-bindings/clock/qcom,gpucc-sc8280xp.h>
> #include <dt-bindings/clock/qcom,rpmh.h>
> #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
> #include <dt-bindings/interconnect/qcom,osm-l3.h>
> @@ -2341,6 +2342,180 @@ tcsr: syscon@1fc0000 {
> reg = <0x0 0x01fc0000 0x0 0x30000>;
> };
>
> + gpu: gpu@3d00000 {
> + compatible = "qcom,adreno-690.0", "qcom,adreno";
> +
> + reg = <0 0x03d00000 0 0x40000>,
> + <0 0x03d9e000 0 0x1000>,
> + <0 0x03d61000 0 0x800>;
> + reg-names = "kgsl_3d0_reg_memory",
> + "cx_mem",
> + "cx_dbgc";
> + interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
> + iommus = <&gpu_smmu 0 0xc00>, <&gpu_smmu 1 0xc00>;
> + operating-points-v2 = <&gpu_opp_table>;
> +
> + qcom,gmu = <&gmu>;
> + interconnects = <&gem_noc MASTER_GFX3D 0 &mc_virt SLAVE_EBI1 0>;
> + interconnect-names = "gfx-mem";
> + #cooling-cells = <2>;
> +
> + status = "disabled";
> +
> + gpu_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-270000000 {
> + opp-hz = /bits/ 64 <270000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
> + opp-peak-kBps = <451000>;
> + };
> +
> + opp-410000000 {
> + opp-hz = /bits/ 64 <410000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
> + opp-peak-kBps = <1555000>;
> + };
> +
> + opp-500000000 {
> + opp-hz = /bits/ 64 <500000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
> + opp-peak-kBps = <1555000>;
> + };
> +
> + opp-547000000 {
> + opp-hz = /bits/ 64 <547000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
> + opp-peak-kBps = <1555000>;
> + };
> +
> + opp-606000000 {
> + opp-hz = /bits/ 64 <606000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
> + opp-peak-kBps = <2736000>;
> + };
> +
> + opp-640000000 {
> + opp-hz = /bits/ 64 <640000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
> + opp-peak-kBps = <2736000>;
> + };
> +
> + opp-655000000 {
> + opp-hz = /bits/ 64 <655000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
> + opp-peak-kBps = <2736000>;
> + };
> +
> + opp-690000000 {
> + opp-hz = /bits/ 64 <690000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
> + opp-peak-kBps = <2736000>;
> + };
> + };
> + };
> +
> + gmu: gmu@3d6a000 {
> + compatible = "qcom,adreno-gmu-690.0", "qcom,adreno-gmu";
> + reg = <0 0x03d6a000 0 0x34000>,
> + <0 0x03de0000 0 0x10000>,
> + <0 0x0b290000 0 0x10000>;
> + reg-names = "gmu", "rscc", "gmu_pdc";
> + interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hfi", "gmu";
> + clocks = <&gpucc GPU_CC_CX_GMU_CLK>,
> + <&gpucc GPU_CC_CXO_CLK>,
> + <&gcc GCC_DDRSS_GPU_AXI_CLK>,
> + <&gcc GCC_GPU_MEMNOC_GFX_CLK>,
> + <&gpucc GPU_CC_AHB_CLK>,
> + <&gpucc GPU_CC_HUB_CX_INT_CLK>,
> + <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>;
> + clock-names = "gmu",
> + "cxo",
> + "axi",
> + "memnoc",
> + "ahb",
> + "hub",
> + "smmu_vote";
> + power-domains = <&gpucc GPU_CC_CX_GDSC>,
> + <&gpucc GPU_CC_GX_GDSC>;
> + power-domain-names = "cx",
> + "gx";
> + iommus = <&gpu_smmu 5 0xc00>;
> + operating-points-v2 = <&gmu_opp_table>;
> +
> + gmu_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-200000000 {
> + opp-hz = /bits/ 64 <200000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
> + };
> +
> + opp-500000000 {
> + opp-hz = /bits/ 64 <500000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
> + };
> + };
> + };
> +
> + gpucc: clock-controller@3d90000 {
> + compatible = "qcom,sc8280xp-gpucc";
> + reg = <0 0x03d90000 0 0x9000>;
> + clocks = <&rpmhcc RPMH_CXO_CLK>,
> + <&gcc GCC_GPU_GPLL0_CLK_SRC>,
> + <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
> + clock-names = "bi_tcxo",
> + "gcc_gpu_gpll0_clk_src",
> + "gcc_gpu_gpll0_div_clk_src";
> +
> + power-domains = <&rpmhpd SC8280XP_GFX>;
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + #power-domain-cells = <1>;
> + };
> +
> + gpu_smmu: iommu@3da0000 {
> + compatible = "qcom,sc8280xp-smmu-500", "qcom,adreno-smmu",
> + "qcom,smmu-500", "arm,mmu-500";
> + reg = <0 0x03da0000 0 0x20000>;
> + #iommu-cells = <2>;
> + #global-interrupts = <2>;
> + interrupts = <GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 688 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 689 IRQ_TYPE_LEVEL_HIGH>;
> +
> + clocks = <&gcc GCC_GPU_MEMNOC_GFX_CLK>,
> + <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>,
> + <&gpucc GPU_CC_AHB_CLK>,
> + <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>,
> + <&gpucc GPU_CC_CX_GMU_CLK>,
> + <&gpucc GPU_CC_HUB_CX_INT_CLK>,
> + <&gpucc GPU_CC_HUB_AON_CLK>;
> + clock-names = "gcc_gpu_memnoc_gfx_clk",
> + "gcc_gpu_snoc_dvm_gfx_clk",
> + "gpu_cc_ahb_clk",
> + "gpu_cc_hlos1_vote_gpu_smmu_clk",
> + "gpu_cc_cx_gmu_clk",
> + "gpu_cc_hub_cx_int_clk",
> + "gpu_cc_hub_aon_clk";
> +
> + power-domains = <&gpucc GPU_CC_CX_GDSC>;
> + dma-coherent;
> + };
> +
> usb_0_hsphy: phy@88e5000 {
> compatible = "qcom,sc8280xp-usb-hs-phy",
> "qcom,usb-snps-hs-5nm-phy";
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v4 2/2] arm64: dts: qcom: sc8280xp: Enable GPU related nodes
2023-06-14 14:22 ` [PATCH v4 2/2] arm64: dts: qcom: sc8280xp: Enable " Bjorn Andersson
@ 2023-06-14 15:27 ` Konrad Dybcio
2023-06-14 15:58 ` Bjorn Andersson
0 siblings, 1 reply; 7+ messages in thread
From: Konrad Dybcio @ 2023-06-14 15:27 UTC (permalink / raw)
To: Bjorn Andersson, Bjorn Andersson
Cc: Rob Clark, Dmitry Baryshkov, Akhil P Oommen, linux-arm-msm,
devicetree, linux-kernel, freedreno, johan, mani,
Steev Klimaszewski, Johan Hovold
On 14.06.2023 16:22, Bjorn Andersson wrote:
> From: Bjorn Andersson <bjorn.andersson@linaro.org>
>
> Add memory reservation for the zap-shader and enable the Adreno SMMU,
> GPU clock controller, GMU and the GPU nodes for the SC8280XP CRD and the
> Lenovo ThinkPad X13s.
>
> Tested-by: Steev Klimaszewski <steev@kali.org>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> Tested-by: Johan Hovold <johan+linaro@kernel.org>
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
one question below
> arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 14 ++++++++++++++
> .../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 14 ++++++++++++++
> 2 files changed, 28 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> index cd7e0097d8bc..b566e403d1db 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> @@ -210,6 +210,11 @@ vreg_wwan: regulator-wwan {
> };
>
> reserved-memory {
> + gpu_mem: gpu-mem@8bf00000 {
Is it ever going to differ on other platforms, including the automotive ones?
Konrad
> + reg = <0 0x8bf00000 0 0x2000>;
> + no-map;
> + };
> +
> linux,cma {
> compatible = "shared-dma-pool";
> size = <0x0 0x8000000>;
> @@ -390,6 +395,15 @@ &dispcc0 {
> status = "okay";
> };
>
> +&gpu {
> + status = "okay";
> +
> + zap-shader {
> + memory-region = <&gpu_mem>;
> + firmware-name = "qcom/sc8280xp/qcdxkmsuc8280.mbn";
> + };
> +};
> +
> &mdss0 {
> status = "okay";
> };
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> index 5ae057ad6438..7cc3028440b6 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> @@ -264,6 +264,11 @@ vreg_wwan: regulator-wwan {
> };
>
> reserved-memory {
> + gpu_mem: gpu-mem@8bf00000 {
> + reg = <0 0x8bf00000 0 0x2000>;
> + no-map;
> + };
> +
> linux,cma {
> compatible = "shared-dma-pool";
> size = <0x0 0x8000000>;
> @@ -518,6 +523,15 @@ &dispcc0 {
> status = "okay";
> };
>
> +&gpu {
> + status = "okay";
> +
> + zap-shader {
> + memory-region = <&gpu_mem>;
> + firmware-name = "qcom/sc8280xp/LENOVO/21BX/qcdxkmsuc8280.mbn";
> + };
> +};
> +
> &mdss0 {
> status = "okay";
> };
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v4 2/2] arm64: dts: qcom: sc8280xp: Enable GPU related nodes
2023-06-14 15:27 ` Konrad Dybcio
@ 2023-06-14 15:58 ` Bjorn Andersson
0 siblings, 0 replies; 7+ messages in thread
From: Bjorn Andersson @ 2023-06-14 15:58 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Bjorn Andersson, Rob Clark, Dmitry Baryshkov, Akhil P Oommen,
linux-arm-msm, devicetree, linux-kernel, freedreno, johan, mani,
Steev Klimaszewski, Johan Hovold
On Wed, Jun 14, 2023 at 05:27:24PM +0200, Konrad Dybcio wrote:
> On 14.06.2023 16:22, Bjorn Andersson wrote:
> > From: Bjorn Andersson <bjorn.andersson@linaro.org>
> >
> > Add memory reservation for the zap-shader and enable the Adreno SMMU,
> > GPU clock controller, GMU and the GPU nodes for the SC8280XP CRD and the
> > Lenovo ThinkPad X13s.
> >
> > Tested-by: Steev Klimaszewski <steev@kali.org>
> > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Tested-by: Johan Hovold <johan+linaro@kernel.org>
> > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> > ---
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>
Thanks.
> one question below
> > arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 14 ++++++++++++++
> > .../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 14 ++++++++++++++
> > 2 files changed, 28 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> > index cd7e0097d8bc..b566e403d1db 100644
> > --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> > +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> > @@ -210,6 +210,11 @@ vreg_wwan: regulator-wwan {
> > };
> >
> > reserved-memory {
> > + gpu_mem: gpu-mem@8bf00000 {
> Is it ever going to differ on other platforms, including the automotive ones?
>
The memory maps for the two live different lives.
Regards,
Bjorn
> Konrad
> > + reg = <0 0x8bf00000 0 0x2000>;
> > + no-map;
> > + };
> > +
> > linux,cma {
> > compatible = "shared-dma-pool";
> > size = <0x0 0x8000000>;
> > @@ -390,6 +395,15 @@ &dispcc0 {
> > status = "okay";
> > };
> >
> > +&gpu {
> > + status = "okay";
> > +
> > + zap-shader {
> > + memory-region = <&gpu_mem>;
> > + firmware-name = "qcom/sc8280xp/qcdxkmsuc8280.mbn";
> > + };
> > +};
> > +
> > &mdss0 {
> > status = "okay";
> > };
> > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> > index 5ae057ad6438..7cc3028440b6 100644
> > --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> > +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> > @@ -264,6 +264,11 @@ vreg_wwan: regulator-wwan {
> > };
> >
> > reserved-memory {
> > + gpu_mem: gpu-mem@8bf00000 {
> > + reg = <0 0x8bf00000 0 0x2000>;
> > + no-map;
> > + };
> > +
> > linux,cma {
> > compatible = "shared-dma-pool";
> > size = <0x0 0x8000000>;
> > @@ -518,6 +523,15 @@ &dispcc0 {
> > status = "okay";
> > };
> >
> > +&gpu {
> > + status = "okay";
> > +
> > + zap-shader {
> > + memory-region = <&gpu_mem>;
> > + firmware-name = "qcom/sc8280xp/LENOVO/21BX/qcdxkmsuc8280.mbn";
> > + };
> > +};
> > +
> > &mdss0 {
> > status = "okay";
> > };
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v4 0/2] drm/msm/adreno: GPU support on SC8280XP
2023-06-14 14:22 [PATCH v4 0/2] drm/msm/adreno: GPU support on SC8280XP Bjorn Andersson
2023-06-14 14:22 ` [PATCH v4 1/2] arm64: dts: qcom: sc8280xp: Add GPU related nodes Bjorn Andersson
2023-06-14 14:22 ` [PATCH v4 2/2] arm64: dts: qcom: sc8280xp: Enable " Bjorn Andersson
@ 2023-06-14 16:03 ` Bjorn Andersson
2 siblings, 0 replies; 7+ messages in thread
From: Bjorn Andersson @ 2023-06-14 16:03 UTC (permalink / raw)
To: Bjorn Andersson
Cc: freedreno, johan, Akhil P Oommen, devicetree, Konrad Dybcio,
linux-kernel, Dmitry Baryshkov, mani, dri-devel, linux-arm-msm
On Wed, 14 Jun 2023 07:22:02 -0700, Bjorn Andersson wrote:
> With the A690 support merged in the drm/msm driver, this series adds the
> DeviceTree pieces to make it go on sc8280xp.
>
> Note that in order for the GPU driver to probe, the last change
> requires (which is now in linux-next):
> https://lore.kernel.org/linux-arm-msm/20230410185226.3240336-1-dmitry.baryshkov@linaro.org/
>
> [...]
Applied, thanks!
[1/2] arm64: dts: qcom: sc8280xp: Add GPU related nodes
commit: eec51ab2fd6f447a993c502364704d0cb5bc8cae
[2/2] arm64: dts: qcom: sc8280xp: Enable GPU related nodes
commit: 598a06afca5a2ab4850ce9ff8146ec728cca570c
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2023-06-14 16:00 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-06-14 14:22 [PATCH v4 0/2] drm/msm/adreno: GPU support on SC8280XP Bjorn Andersson
2023-06-14 14:22 ` [PATCH v4 1/2] arm64: dts: qcom: sc8280xp: Add GPU related nodes Bjorn Andersson
2023-06-14 15:26 ` Konrad Dybcio
2023-06-14 14:22 ` [PATCH v4 2/2] arm64: dts: qcom: sc8280xp: Enable " Bjorn Andersson
2023-06-14 15:27 ` Konrad Dybcio
2023-06-14 15:58 ` Bjorn Andersson
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