[PATCH v2 0/3] MSM8996 Pro CBF scaling support

[PATCH v2 0/3] MSM8996 Pro CBF scaling support

[Yassine Oudjana]

From: Yassine Oudjana <y.oudjana@protonmail.com>

MSM8996 Pro has a /4 post divisor on its CBF PLL instead of /2, allowing
it to reach 192000000Hz on the lowest CPU OPPs (compared to 307200000Hz
on MSM8996). Add a compatible string to differentiate between the two and
handle the different divisor in the driver. Finally, add peak bandwidths
to CPU OPPs in msm8996pro.dtsi.

This series depends on the following patch series:
  clk: qcom: msm8996: add support for the CBF clock
  https://lore.kernel.org/linux-arm-msm/20230410200014.432418-1-dmitry.baryshkov@linaro.org/

Changes since v1:
  - Patch structs during probe instead of defining new ones.

Yassine Oudjana (3):
  dt-bindings: clock: qcom,msm8996-cbf: Add compatible for MSM8996 Pro
  arm64: dts: qcom: msm8996pro: Add CBF scaling support
  clk: qcom: cbf-msm8996: Add support for MSM8996 Pro

 .../bindings/clock/qcom,msm8996-cbf.yaml      |  4 +-
 arch/arm64/boot/dts/qcom/msm8996pro.dtsi      | 51 +++++++++++++++++++
 drivers/clk/qcom/clk-cbf-8996.c               | 10 +++-
 3 files changed, 62 insertions(+), 3 deletions(-)

-- 
2.40.1

[PATCH v2 1/3] dt-bindings: clock: qcom,msm8996-cbf: Add compatible for MSM8996 Pro

[Yassine Oudjana]

From: Yassine Oudjana <y.oudjana@protonmail.com>

The CBF clock on MSM8996 Pro has a different divisor compared to MSM8996
and is therefore not fully compatible with it. Add a new compatible string
to differentiate between them.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 Documentation/devicetree/bindings/clock/qcom,msm8996-cbf.yaml | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/clock/qcom,msm8996-cbf.yaml b/Documentation/devicetree/bindings/clock/qcom,msm8996-cbf.yaml
index 3ffe69d8cdd5..0dfbd8c4d465 100644
--- a/Documentation/devicetree/bindings/clock/qcom,msm8996-cbf.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,msm8996-cbf.yaml
@@ -15,7 +15,9 @@ description: >
 
 properties:
   compatible:
-    const: qcom,msm8996-cbf
+    enum:
+      - qcom,msm8996-cbf
+      - qcom,msm8996pro-cbf
 
   reg:
     maxItems: 1
-- 
2.40.1

[PATCH v2 2/3] arm64: dts: qcom: msm8996pro: Add CBF scaling support

[Yassine Oudjana]

From: Yassine Oudjana <y.oudjana@protonmail.com>

Add opp-peak-kBps to CPU OPPs to allow for CBF scaling, and change the
CBF compatible to reflect the difference between it and the one on
MSM8996.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/boot/dts/qcom/msm8996pro.dtsi | 51 ++++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8996pro.dtsi b/arch/arm64/boot/dts/qcom/msm8996pro.dtsi
index a679a9c0cf99..b74cff06f300 100644
--- a/arch/arm64/boot/dts/qcom/msm8996pro.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996pro.dtsi
@@ -24,101 +24,121 @@ opp-307200000 {
 			opp-hz = /bits/ 64 <307200000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <192000>;
 		};
 		opp-384000000 {
 			opp-hz = /bits/ 64 <384000000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <192000>;
 		};
 		opp-460800000 {
 			opp-hz = /bits/ 64 <460800000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <192000>;
 		};
 		opp-537600000 {
 			opp-hz = /bits/ 64 <537600000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <192000>;
 		};
 		opp-614400000 {
 			opp-hz = /bits/ 64 <614400000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <192000>;
 		};
 		opp-691200000 {
 			opp-hz = /bits/ 64 <691200000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <307200>;
 		};
 		opp-768000000 {
 			opp-hz = /bits/ 64 <768000000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <307200>;
 		};
 		opp-844800000 {
 			opp-hz = /bits/ 64 <844800000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <384000>;
 		};
 		opp-902400000 {
 			opp-hz = /bits/ 64 <902400000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <441600>;
 		};
 		opp-979200000 {
 			opp-hz = /bits/ 64 <979200000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <537600>;
 		};
 		opp-1056000000 {
 			opp-hz = /bits/ 64 <1056000000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <614400>;
 		};
 		opp-1132800000 {
 			opp-hz = /bits/ 64 <1132800000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <691200>;
 		};
 		opp-1209600000 {
 			opp-hz = /bits/ 64 <1209600000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <768000>;
 		};
 		opp-1286400000 {
 			opp-hz = /bits/ 64 <1286400000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <844800>;
 		};
 		opp-1363200000 {
 			opp-hz = /bits/ 64 <1363200000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <902400>;
 		};
 		opp-1440000000 {
 			opp-hz = /bits/ 64 <1440000000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <979200>;
 		};
 		opp-1516800000 {
 			opp-hz = /bits/ 64 <1516800000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <1132800>;
 		};
 		opp-1593600000 {
 			opp-hz = /bits/ 64 <1593600000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <1190400>;
 		};
 		opp-1996800000 {
 			opp-hz = /bits/ 64 <1996800000>;
 			opp-supported-hw = <0x20>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <1516800>;
 		};
 		opp-2188800000 {
 			opp-hz = /bits/ 64 <2188800000>;
 			opp-supported-hw = <0x10>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <1593600>;
 		};
 	};
 
@@ -131,136 +151,163 @@ opp-307200000 {
 			opp-hz = /bits/ 64 <307200000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <192000>;
 		};
 		opp-384000000 {
 			opp-hz = /bits/ 64 <384000000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <192000>;
 		};
 		opp-460800000 {
 			opp-hz = /bits/ 64 <460800000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <192000>;
 		};
 		opp-537600000 {
 			opp-hz = /bits/ 64 <537600000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <192000>;
 		};
 		opp-614400000 {
 			opp-hz = /bits/ 64 <614400000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <192000>;
 		};
 		opp-691200000 {
 			opp-hz = /bits/ 64 <691200000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <307200>;
 		};
 		opp-748800000 {
 			opp-hz = /bits/ 64 <748800000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <307200>;
 		};
 		opp-825600000 {
 			opp-hz = /bits/ 64 <825600000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <384000>;
 		};
 		opp-902400000 {
 			opp-hz = /bits/ 64 <902400000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <441600>;
 		};
 		opp-979200000 {
 			opp-hz = /bits/ 64 <979200000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <441600>;
 		};
 		opp-1056000000 {
 			opp-hz = /bits/ 64 <1056000000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <537600>;
 		};
 		opp-1132800000 {
 			opp-hz = /bits/ 64 <1132800000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <614400>;
 		};
 		opp-1209600000 {
 			opp-hz = /bits/ 64 <1209600000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <691200>;
 		};
 		opp-1286400000 {
 			opp-hz = /bits/ 64 <1286400000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <768000>;
 		};
 		opp-1363200000 {
 			opp-hz = /bits/ 64 <1363200000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <844800>;
 		};
 		opp-1440000000 {
 			opp-hz = /bits/ 64 <1440000000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <902400>;
 		};
 		opp-1516800000 {
 			opp-hz = /bits/ 64 <1516800000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <979200>;
 		};
 		opp-1593600000 {
 			opp-hz = /bits/ 64 <1593600000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <1056000>;
 		};
 		opp-1670400000 {
 			opp-hz = /bits/ 64 <1670400000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <1132800>;
 		};
 		opp-1747200000 {
 			opp-hz = /bits/ 64 <1747200000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <1190400>;
 		};
 		opp-1824000000 {
 			opp-hz = /bits/ 64 <1824000000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <1286400>;
 		};
 		opp-1900800000 {
 			opp-hz = /bits/ 64 <1900800000>;
 			opp-supported-hw = <0x70>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <1363200>;
 		};
 		opp-1977600000 {
 			opp-hz = /bits/ 64 <1977600000>;
 			opp-supported-hw = <0x30>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <1440000>;
 		};
 		opp-2054400000 {
 			opp-hz = /bits/ 64 <2054400000>;
 			opp-supported-hw = <0x30>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <1516800>;
 		};
 		opp-2150400000 {
 			opp-hz = /bits/ 64 <2150400000>;
 			opp-supported-hw = <0x30>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <1593600>;
 		};
 		opp-2246400000 {
 			opp-hz = /bits/ 64 <2246400000>;
 			opp-supported-hw = <0x10>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <1593600>;
 		};
 		opp-2342400000 {
 			opp-hz = /bits/ 64 <2342400000>;
 			opp-supported-hw = <0x10>;
 			clock-latency-ns = <200000>;
+			opp-peak-kBps = <1593600>;
 		};
 	};
 };
@@ -289,3 +336,7 @@ opp-560000000 {
 	};
 	/* The rest is inherited from msm8996 */
 };
+
+&cbf {
+	compatible = "qcom,msm8996pro-cbf";
+};
-- 
2.40.1

[PATCH v2 3/3] clk: qcom: cbf-msm8996: Add support for MSM8996 Pro

[Yassine Oudjana]

From: Yassine Oudjana <y.oudjana@protonmail.com>

The CBF PLL on MSM8996 Pro has a /4 post divisor instead of /2. Handle the
difference accordingly.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
---
 drivers/clk/qcom/clk-cbf-8996.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/qcom/clk-cbf-8996.c b/drivers/clk/qcom/clk-cbf-8996.c
index cfd567636f4e..ab988e6f1976 100644
--- a/drivers/clk/qcom/clk-cbf-8996.c
+++ b/drivers/clk/qcom/clk-cbf-8996.c
@@ -48,7 +48,7 @@ static const u8 cbf_pll_regs[PLL_OFF_MAX_REGS] = {
 	[PLL_OFF_STATUS] = 0x28,
 };
 
-static const struct alpha_pll_config cbfpll_config = {
+static struct alpha_pll_config cbfpll_config = {
 	.l = 72,
 	.config_ctl_val = 0x200d4828,
 	.config_ctl_hi_val = 0x006,
@@ -137,7 +137,7 @@ static int clk_cbf_8996_mux_determine_rate(struct clk_hw *hw,
 {
 	struct clk_hw *parent;
 
-	if (req->rate < (DIV_THRESHOLD / 2))
+	if (req->rate < (DIV_THRESHOLD / cbf_pll_postdiv.div))
 		return -EINVAL;
 
 	if (req->rate < DIV_THRESHOLD)
@@ -265,6 +265,11 @@ static int qcom_msm8996_cbf_probe(struct platform_device *pdev)
 	/* Switch CBF to use the primary PLL */
 	regmap_update_bits(regmap, CBF_MUX_OFFSET, CBF_MUX_PARENT_MASK, 0x1);
 
+	if (of_device_is_compatible(dev->of_node, "qcom,msm8996pro-cbf")) {
+		cbfpll_config.post_div_val = 0x3 << 8;
+		cbf_pll_postdiv.div = 4;
+	}
+
 	for (i = 0; i < ARRAY_SIZE(cbf_msm8996_hw_clks); i++) {
 		ret = devm_clk_hw_register(dev, cbf_msm8996_hw_clks[i]);
 		if (ret)
@@ -286,6 +291,7 @@ static int qcom_msm8996_cbf_probe(struct platform_device *pdev)
 
 static const struct of_device_id qcom_msm8996_cbf_match_table[] = {
 	{ .compatible = "qcom,msm8996-cbf" },
+	{ .compatible = "qcom,msm8996pro-cbf" },
 	{ /* sentinel */ },
 };
 MODULE_DEVICE_TABLE(of, qcom_msm8996_cbf_match_table);
-- 
2.40.1

Re: [PATCH v2 2/3] arm64: dts: qcom: msm8996pro: Add CBF scaling support

[Konrad Dybcio]

On 27.05.2023 11:39, Yassine Oudjana wrote:
> From: Yassine Oudjana <y.oudjana@protonmail.com>
> 
> Add opp-peak-kBps to CPU OPPs to allow for CBF scaling, and change the
> CBF compatible to reflect the difference between it and the one on
> MSM8996.
> 
> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Now let's sprinkle some BWMON, CPR and GPMU and 8996 will be
fairly complete as far as the core hw goes.. At last!

Konrad
>  arch/arm64/boot/dts/qcom/msm8996pro.dtsi | 51 ++++++++++++++++++++++++
>  1 file changed, 51 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/msm8996pro.dtsi b/arch/arm64/boot/dts/qcom/msm8996pro.dtsi
> index a679a9c0cf99..b74cff06f300 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996pro.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996pro.dtsi
> @@ -24,101 +24,121 @@ opp-307200000 {
>  			opp-hz = /bits/ 64 <307200000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <192000>;
>  		};
>  		opp-384000000 {
>  			opp-hz = /bits/ 64 <384000000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <192000>;
>  		};
>  		opp-460800000 {
>  			opp-hz = /bits/ 64 <460800000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <192000>;
>  		};
>  		opp-537600000 {
>  			opp-hz = /bits/ 64 <537600000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <192000>;
>  		};
>  		opp-614400000 {
>  			opp-hz = /bits/ 64 <614400000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <192000>;
>  		};
>  		opp-691200000 {
>  			opp-hz = /bits/ 64 <691200000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <307200>;
>  		};
>  		opp-768000000 {
>  			opp-hz = /bits/ 64 <768000000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <307200>;
>  		};
>  		opp-844800000 {
>  			opp-hz = /bits/ 64 <844800000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <384000>;
>  		};
>  		opp-902400000 {
>  			opp-hz = /bits/ 64 <902400000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <441600>;
>  		};
>  		opp-979200000 {
>  			opp-hz = /bits/ 64 <979200000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <537600>;
>  		};
>  		opp-1056000000 {
>  			opp-hz = /bits/ 64 <1056000000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <614400>;
>  		};
>  		opp-1132800000 {
>  			opp-hz = /bits/ 64 <1132800000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <691200>;
>  		};
>  		opp-1209600000 {
>  			opp-hz = /bits/ 64 <1209600000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <768000>;
>  		};
>  		opp-1286400000 {
>  			opp-hz = /bits/ 64 <1286400000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <844800>;
>  		};
>  		opp-1363200000 {
>  			opp-hz = /bits/ 64 <1363200000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <902400>;
>  		};
>  		opp-1440000000 {
>  			opp-hz = /bits/ 64 <1440000000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <979200>;
>  		};
>  		opp-1516800000 {
>  			opp-hz = /bits/ 64 <1516800000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <1132800>;
>  		};
>  		opp-1593600000 {
>  			opp-hz = /bits/ 64 <1593600000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <1190400>;
>  		};
>  		opp-1996800000 {
>  			opp-hz = /bits/ 64 <1996800000>;
>  			opp-supported-hw = <0x20>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <1516800>;
>  		};
>  		opp-2188800000 {
>  			opp-hz = /bits/ 64 <2188800000>;
>  			opp-supported-hw = <0x10>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <1593600>;
>  		};
>  	};
>  
> @@ -131,136 +151,163 @@ opp-307200000 {
>  			opp-hz = /bits/ 64 <307200000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <192000>;
>  		};
>  		opp-384000000 {
>  			opp-hz = /bits/ 64 <384000000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <192000>;
>  		};
>  		opp-460800000 {
>  			opp-hz = /bits/ 64 <460800000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <192000>;
>  		};
>  		opp-537600000 {
>  			opp-hz = /bits/ 64 <537600000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <192000>;
>  		};
>  		opp-614400000 {
>  			opp-hz = /bits/ 64 <614400000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <192000>;
>  		};
>  		opp-691200000 {
>  			opp-hz = /bits/ 64 <691200000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <307200>;
>  		};
>  		opp-748800000 {
>  			opp-hz = /bits/ 64 <748800000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <307200>;
>  		};
>  		opp-825600000 {
>  			opp-hz = /bits/ 64 <825600000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <384000>;
>  		};
>  		opp-902400000 {
>  			opp-hz = /bits/ 64 <902400000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <441600>;
>  		};
>  		opp-979200000 {
>  			opp-hz = /bits/ 64 <979200000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <441600>;
>  		};
>  		opp-1056000000 {
>  			opp-hz = /bits/ 64 <1056000000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <537600>;
>  		};
>  		opp-1132800000 {
>  			opp-hz = /bits/ 64 <1132800000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <614400>;
>  		};
>  		opp-1209600000 {
>  			opp-hz = /bits/ 64 <1209600000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <691200>;
>  		};
>  		opp-1286400000 {
>  			opp-hz = /bits/ 64 <1286400000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <768000>;
>  		};
>  		opp-1363200000 {
>  			opp-hz = /bits/ 64 <1363200000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <844800>;
>  		};
>  		opp-1440000000 {
>  			opp-hz = /bits/ 64 <1440000000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <902400>;
>  		};
>  		opp-1516800000 {
>  			opp-hz = /bits/ 64 <1516800000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <979200>;
>  		};
>  		opp-1593600000 {
>  			opp-hz = /bits/ 64 <1593600000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <1056000>;
>  		};
>  		opp-1670400000 {
>  			opp-hz = /bits/ 64 <1670400000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <1132800>;
>  		};
>  		opp-1747200000 {
>  			opp-hz = /bits/ 64 <1747200000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <1190400>;
>  		};
>  		opp-1824000000 {
>  			opp-hz = /bits/ 64 <1824000000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <1286400>;
>  		};
>  		opp-1900800000 {
>  			opp-hz = /bits/ 64 <1900800000>;
>  			opp-supported-hw = <0x70>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <1363200>;
>  		};
>  		opp-1977600000 {
>  			opp-hz = /bits/ 64 <1977600000>;
>  			opp-supported-hw = <0x30>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <1440000>;
>  		};
>  		opp-2054400000 {
>  			opp-hz = /bits/ 64 <2054400000>;
>  			opp-supported-hw = <0x30>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <1516800>;
>  		};
>  		opp-2150400000 {
>  			opp-hz = /bits/ 64 <2150400000>;
>  			opp-supported-hw = <0x30>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <1593600>;
>  		};
>  		opp-2246400000 {
>  			opp-hz = /bits/ 64 <2246400000>;
>  			opp-supported-hw = <0x10>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <1593600>;
>  		};
>  		opp-2342400000 {
>  			opp-hz = /bits/ 64 <2342400000>;
>  			opp-supported-hw = <0x10>;
>  			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <1593600>;
>  		};
>  	};
>  };
> @@ -289,3 +336,7 @@ opp-560000000 {
>  	};
>  	/* The rest is inherited from msm8996 */
>  };
> +
> +&cbf {
> +	compatible = "qcom,msm8996pro-cbf";
> +};

Re: [PATCH v2 3/3] clk: qcom: cbf-msm8996: Add support for MSM8996 Pro

[Konrad Dybcio]

On 27.05.2023 11:39, Yassine Oudjana wrote:
> From: Yassine Oudjana <y.oudjana@protonmail.com>
> 
> The CBF PLL on MSM8996 Pro has a /4 post divisor instead of /2. Handle the
> difference accordingly.
> 
> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
> ---
>  drivers/clk/qcom/clk-cbf-8996.c | 10 ++++++++--
>  1 file changed, 8 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clk-cbf-8996.c b/drivers/clk/qcom/clk-cbf-8996.c
> index cfd567636f4e..ab988e6f1976 100644
> --- a/drivers/clk/qcom/clk-cbf-8996.c
> +++ b/drivers/clk/qcom/clk-cbf-8996.c
> @@ -48,7 +48,7 @@ static const u8 cbf_pll_regs[PLL_OFF_MAX_REGS] = {
>  	[PLL_OFF_STATUS] = 0x28,
>  };
>  
> -static const struct alpha_pll_config cbfpll_config = {
> +static struct alpha_pll_config cbfpll_config = {
>  	.l = 72,
>  	.config_ctl_val = 0x200d4828,
>  	.config_ctl_hi_val = 0x006,
> @@ -137,7 +137,7 @@ static int clk_cbf_8996_mux_determine_rate(struct clk_hw *hw,
>  {
>  	struct clk_hw *parent;
>  
> -	if (req->rate < (DIV_THRESHOLD / 2))
> +	if (req->rate < (DIV_THRESHOLD / cbf_pll_postdiv.div))
>  		return -EINVAL;
>  
>  	if (req->rate < DIV_THRESHOLD)
> @@ -265,6 +265,11 @@ static int qcom_msm8996_cbf_probe(struct platform_device *pdev)
>  	/* Switch CBF to use the primary PLL */
>  	regmap_update_bits(regmap, CBF_MUX_OFFSET, CBF_MUX_PARENT_MASK, 0x1);
>  
> +	if (of_device_is_compatible(dev->of_node, "qcom,msm8996pro-cbf")) {
If this was a driver for more than 1.5 SoCs, I'd propose using a
different mechanism here (match data flags or something), but since
there aren't (and hopefully won't ever be) more 8996s (automotive etc.
inherit one of these configurations so that doesn't count), I'm willing
to say

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
> +		cbfpll_config.post_div_val = 0x3 << 8;
> +		cbf_pll_postdiv.div = 4;
> +	}
> +
>  	for (i = 0; i < ARRAY_SIZE(cbf_msm8996_hw_clks); i++) {
>  		ret = devm_clk_hw_register(dev, cbf_msm8996_hw_clks[i]);
>  		if (ret)
> @@ -286,6 +291,7 @@ static int qcom_msm8996_cbf_probe(struct platform_device *pdev)
>  
>  static const struct of_device_id qcom_msm8996_cbf_match_table[] = {
>  	{ .compatible = "qcom,msm8996-cbf" },
> +	{ .compatible = "qcom,msm8996pro-cbf" },
>  	{ /* sentinel */ },
>  };
>  MODULE_DEVICE_TABLE(of, qcom_msm8996_cbf_match_table);

Re: [PATCH v2 3/3] clk: qcom: cbf-msm8996: Add support for MSM8996 Pro

[Dmitry Baryshkov]

On 29/05/2023 11:18, Konrad Dybcio wrote:
> 
> 
> On 27.05.2023 11:39, Yassine Oudjana wrote:
>> From: Yassine Oudjana <y.oudjana@protonmail.com>
>>
>> The CBF PLL on MSM8996 Pro has a /4 post divisor instead of /2. Handle the
>> difference accordingly.
>>
>> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
>> ---
>>   drivers/clk/qcom/clk-cbf-8996.c | 10 ++++++++--
>>   1 file changed, 8 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/clk/qcom/clk-cbf-8996.c b/drivers/clk/qcom/clk-cbf-8996.c
>> index cfd567636f4e..ab988e6f1976 100644
>> --- a/drivers/clk/qcom/clk-cbf-8996.c
>> +++ b/drivers/clk/qcom/clk-cbf-8996.c
>> @@ -48,7 +48,7 @@ static const u8 cbf_pll_regs[PLL_OFF_MAX_REGS] = {
>>   	[PLL_OFF_STATUS] = 0x28,
>>   };
>>   
>> -static const struct alpha_pll_config cbfpll_config = {
>> +static struct alpha_pll_config cbfpll_config = {
>>   	.l = 72,
>>   	.config_ctl_val = 0x200d4828,
>>   	.config_ctl_hi_val = 0x006,
>> @@ -137,7 +137,7 @@ static int clk_cbf_8996_mux_determine_rate(struct clk_hw *hw,
>>   {
>>   	struct clk_hw *parent;
>>   
>> -	if (req->rate < (DIV_THRESHOLD / 2))
>> +	if (req->rate < (DIV_THRESHOLD / cbf_pll_postdiv.div))
>>   		return -EINVAL;
>>   
>>   	if (req->rate < DIV_THRESHOLD)
>> @@ -265,6 +265,11 @@ static int qcom_msm8996_cbf_probe(struct platform_device *pdev)
>>   	/* Switch CBF to use the primary PLL */
>>   	regmap_update_bits(regmap, CBF_MUX_OFFSET, CBF_MUX_PARENT_MASK, 0x1);
>>   
>> +	if (of_device_is_compatible(dev->of_node, "qcom,msm8996pro-cbf")) {
> If this was a driver for more than 1.5 SoCs, I'd propose using a
> different mechanism here (match data flags or something), but since
> there aren't (and hopefully won't ever be) more 8996s (automotive etc.
> inherit one of these configurations so that doesn't count), I'm willing
> to say

Fingers crossed for no additional 8996 variants.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>



-- 
With best wishes
Dmitry

Re: [PATCH v2 1/3] dt-bindings: clock: qcom,msm8996-cbf: Add compatible for MSM8996 Pro

[Krzysztof Kozlowski]

On Sat, 27 May 2023 12:39:32 +0300, Yassine Oudjana wrote:
> From: Yassine Oudjana <y.oudjana@protonmail.com>
> 
> The CBF clock on MSM8996 Pro has a different divisor compared to MSM8996
> and is therefore not fully compatible with it. Add a new compatible string
> to differentiate between them.
> 
> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
>  Documentation/devicetree/bindings/clock/qcom,msm8996-cbf.yaml | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 

Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.

Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.

Full log is available here: https://patchwork.ozlabs.org/patch/1786737


clock-controller@9a11000: '#interconnect-cells' is a required property
	arch/arm64/boot/dts/qcom/apq8096-db820c.dtb
	arch/arm64/boot/dts/qcom/apq8096-ifc6640.dtb
	arch/arm64/boot/dts/qcom/msm8996-mtp.dtb
	arch/arm64/boot/dts/qcom/msm8996-oneplus3.dtb
	arch/arm64/boot/dts/qcom/msm8996-oneplus3t.dtb
	arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-natrium.dtb
	arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-scorpio.dtb
	arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dtb
	arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-kagura.dtb
	arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-keyaki.dtb
	arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dtb

Re: (subset) [PATCH v2 0/3] MSM8996 Pro CBF scaling support

[Bjorn Andersson]

On Sat, 27 May 2023 12:39:31 +0300, Yassine Oudjana wrote:
> From: Yassine Oudjana <y.oudjana@protonmail.com>
> 
> MSM8996 Pro has a /4 post divisor on its CBF PLL instead of /2, allowing
> it to reach 192000000Hz on the lowest CPU OPPs (compared to 307200000Hz
> on MSM8996). Add a compatible string to differentiate between the two and
> handle the different divisor in the driver. Finally, add peak bandwidths
> to CPU OPPs in msm8996pro.dtsi.
> 
> [...]

Applied, thanks!

[2/3] arm64: dts: qcom: msm8996pro: Add CBF scaling support
      commit: 34354cc946abe6b6e4b71883dddfdd368e856d65

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>

Re: (subset) [PATCH v2 0/3] MSM8996 Pro CBF scaling support

[Bjorn Andersson]

On Sat, 27 May 2023 12:39:31 +0300, Yassine Oudjana wrote:
> From: Yassine Oudjana <y.oudjana@protonmail.com>
> 
> MSM8996 Pro has a /4 post divisor on its CBF PLL instead of /2, allowing
> it to reach 192000000Hz on the lowest CPU OPPs (compared to 307200000Hz
> on MSM8996). Add a compatible string to differentiate between the two and
> handle the different divisor in the driver. Finally, add peak bandwidths
> to CPU OPPs in msm8996pro.dtsi.
> 
> [...]

Applied, thanks!

[1/3] dt-bindings: clock: qcom,msm8996-cbf: Add compatible for MSM8996 Pro
      commit: 434cb57732cd6b39c41a218f2e1dfddd5373fe1b
[3/3] clk: qcom: cbf-msm8996: Add support for MSM8996 Pro
      commit: bc48641a68dcf9998c78248ce7e79d1a492463c1

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>