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From: Arnd Bergmann <arnd@arndb.de>
To: "zhichang.yuan" <zhichang.yuan02@gmail.com>
Cc: Gabriele Paoloni <gabriele.paoloni@huawei.com>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
	"minyard@acm.org" <minyard@acm.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
	John Garry <john.garry@huawei.com>,
	"will.deacon@arm.com" <will.deacon@arm.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Yuanzhichang <yuanzhichang@hisilicon.com>,
	Linuxarm <linuxarm@huawei.com>,
	"xuwei (O)" <xuwei5@hisilicon.com>,
	"linux-serial@vger.kernel.org" <linux-serial@vger.kernel.org>,
	"benh@kernel.crashing.org" <benh@kernel.crashing.org>,
	"zourongrong@gmail.com" <zourongrong@gmail.com>,
	"liviu.dudau@arm.com" <liviu.dudau@arm.com>,
	"kantyzc@163.com" <kantyzc@163.com>
Subject: Re: [PATCH V3 2/4] ARM64 LPC: LPC driver implementation on Hip06
Date: Fri, 23 Sep 2016 11:51:49 +0200	[thread overview]
Message-ID: <1760643.vMTR5o5E9g@wuerfel> (raw)
In-Reply-To: <57E40665.8080005@gmail.com>

On Friday, September 23, 2016 12:27:17 AM CEST zhichang.yuan wrote:
> For this patch sketch, I have a question.
> Do we call pci_address_to_pio in arch_of_address_to_pio to get the 
> corresponding logical IO port
> for LPC??


No, of course not, that would be silly:

The argument to pci_address_to_pio() is a phys_addr_t, and we we don't
have one because there is no address associated with your PIO, that
is the entire point of your driver!

Also, we already know the mapping because this is what the inb/outb
workaround is looking at, so there is absolutely no reason to call it
either.

> If we don't, it seems the LPC specific IO address will conflict with PCI 
> host bridges' logical IO.
>
> Supposed our LPC populated the IO range from 0x100 to 0x3FF( this is 
> normal for ISA similar
> devices), after arch_of_address_to_pio(), the r->start will be set as 
> 0x100, r->end will be set as
> 0x3FF.  And if there is one PCI host bridge who request a IO window size 
> over 0x400 at the same
> time, the  corresponding r->start and r->end will be set as 0x0, 0x3FF 
> after of_address_to_resource
> for this host bridge.  Then the IO conflict happens.

You would still need to reserve some space in the io_range_list
to avoid possible conflicts, which is a bit ugly with the current
definition of pci_register_io_range, but I'm sure can be done.

One way I can think of would be to change pci_register_io_range()
to just return the logical port number directly (it already
knows it!), and pass an invalid physical address (e.g. 
#define ISA_WORKAROUND_IO_PORT_WINDOW -0x10000) into it for
invalid translations.

Another alternative that just occurred to me would be to move
the pci_address_to_pio() call from __of_address_to_resource()
into of_bus_pci_translate() and then do the special handling
for the ISA/LPC bus in of_bus_isa_translate().

	Arnd

  reply	other threads:[~2016-09-23  9:52 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-14 12:15 [PATCH V3 0/4] ARM64 LPC: legacy ISA I/O support Zhichang Yuan
2016-09-14 12:15 ` [PATCH V3 1/4] ARM64 LPC: Indirect ISA port IO introduced Zhichang Yuan
2016-09-14 12:24   ` Arnd Bergmann
2016-09-14 14:16     ` zhichang.yuan
2016-09-14 14:23       ` Arnd Bergmann
2016-09-18  3:38         ` zhichang
2016-09-21  9:26         ` zhichang
2016-09-14 12:15 ` [PATCH V3 2/4] ARM64 LPC: LPC driver implementation on Hip06 Zhichang Yuan
2016-09-14 12:33   ` Arnd Bergmann
2016-09-14 14:50     ` zhichang.yuan
2016-09-14 21:32       ` Arnd Bergmann
2016-09-15  8:02         ` Gabriele Paoloni
2016-09-15  8:22           ` Arnd Bergmann
2016-09-15 12:05             ` Gabriele Paoloni
2016-09-15 12:24               ` Arnd Bergmann
2016-09-15 14:28                 ` Gabriele Paoloni
2016-09-21 10:09                 ` zhichang
2016-09-21 16:20                   ` Gabriele Paoloni
2016-09-21 20:18                     ` Arnd Bergmann
2016-09-22 11:55                       ` Gabriele Paoloni
2016-09-22 12:14                         ` Arnd Bergmann
2016-09-22 14:47                           ` Gabriele Paoloni
2016-09-22 14:59                             ` Arnd Bergmann
2016-09-22 15:20                               ` Gabriele Paoloni
2016-09-22 15:46                                 ` zhichang.yuan
2016-09-22 16:27                           ` zhichang.yuan
2016-09-23  9:51                             ` Arnd Bergmann [this message]
2016-09-23 10:23                               ` Gabriele Paoloni
2016-09-23 13:42                                 ` Arnd Bergmann
2016-09-23 14:59                                   ` Gabriele Paoloni
2016-09-23 15:55                                     ` Arnd Bergmann
2016-09-24  8:14                                       ` zhichang
2016-09-24 21:00                                         ` Arnd Bergmann
2016-09-26 13:21                                   ` Gabriele Paoloni
2016-09-24  8:00                               ` zhichang
2016-10-02 22:03         ` Jon Masters
2016-10-04 12:02           ` John Garry
2016-10-06  0:18             ` Benjamin Herrenschmidt
2016-10-06 13:31               ` John Garry
2016-09-14 14:09   ` kbuild test robot
2016-09-14 12:15 ` [PATCH V3 3/4] ARM64 LPC: support serial based on low-pin-count Zhichang Yuan
2016-09-14 12:25   ` Arnd Bergmann
2016-09-14 15:04     ` zhichang.yuan
2016-09-14 21:33       ` Arnd Bergmann
     [not found]         ` <815bebc1-96c9-2131-930d-bccdd4bf1c55@gmail.com>
2016-09-21 19:29           ` Arnd Bergmann
2016-09-14 12:15 ` [PATCH V3 4/4] ARM64 LPC: support earlycon for UART connected to LPC Zhichang Yuan

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