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From: Arnd Bergmann <arnd@arndb.de>
To: Gabriele Paoloni <gabriele.paoloni@huawei.com>
Cc: "linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	Yuanzhichang <yuanzhichang@hisilicon.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
	"minyard@acm.org" <minyard@acm.org>,
	"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
	"benh@kernel.crashing.org" <benh@kernel.crashing.org>,
	John Garry <john.garry@huawei.com>,
	"will.deacon@arm.com" <will.deacon@arm.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"xuwei (O)" <xuwei5@hisilicon.com>,
	Linuxarm <linuxarm@huawei.com>,
	"linux-serial@vger.kernel.org" <linux-serial@vger.kernel.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"zourongrong@gmail.com" <zourongrong@gmail.com>,
	"liviu.dudau@arm.com" <liviu.dudau@arm.com>,
	"kantyzc@163.com" <kantyzc@163.com>,
	"zhichang.yuan02@gmail.com" <zhichang.yuan02@gmail.com>
Subject: Re: [PATCH V3 2/4] ARM64 LPC: LPC driver implementation on Hip06
Date: Thu, 15 Sep 2016 10:22:23 +0200	[thread overview]
Message-ID: <8360154.kzsE8V8pTW@wuerfel> (raw)
In-Reply-To: <EE11001F9E5DDD47B7634E2F8A612F2E1F871B01@lhreml507-mbx>

On Thursday, September 15, 2016 8:02:27 AM CEST Gabriele Paoloni wrote:
> 
> From <<3.1.1. Open Firmware Properties for Bus Nodes>> in 
> http://www.firmware.org/1275/bindings/isa/isa0_4d.ps
> 
> I quote:
> "There shall be an entry in the "ranges" property for each
> of the Memory and/or I/O spaces if that address space is
> mapped through the bridge."
> 
> It seems to me that it is ok to have 1:1 address mapping and that
> therefore of_translate_address() should fail if "ranges" is not
> present.

The key here is the definition of "mapped through the bridge".
I can only understand this as "directly mapped", i.e. an I/O
port of the child bus corresponds directly to a memory address
on the parent bus, but this is not the case here.

The problem with adding the mapping here is that it looks
like it should be valid to create a page table entry for
the address returned from the translation and access it through
a pointer dereference, but that is clearly not possible.

> This is also explained quite well in
> http://lxr.free-electrons.com/source/drivers/of/address.c#L490
> 
> what do you think?

This is a separate issue, and only relevant for Apple Macintosh
machines as well as the PA-Semi sdc.

	Arnd

  reply	other threads:[~2016-09-15  8:24 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-14 12:15 [PATCH V3 0/4] ARM64 LPC: legacy ISA I/O support Zhichang Yuan
2016-09-14 12:15 ` [PATCH V3 1/4] ARM64 LPC: Indirect ISA port IO introduced Zhichang Yuan
2016-09-14 12:24   ` Arnd Bergmann
2016-09-14 14:16     ` zhichang.yuan
2016-09-14 14:23       ` Arnd Bergmann
2016-09-18  3:38         ` zhichang
2016-09-21  9:26         ` zhichang
2016-09-14 12:15 ` [PATCH V3 2/4] ARM64 LPC: LPC driver implementation on Hip06 Zhichang Yuan
2016-09-14 12:33   ` Arnd Bergmann
2016-09-14 14:50     ` zhichang.yuan
2016-09-14 21:32       ` Arnd Bergmann
2016-09-15  8:02         ` Gabriele Paoloni
2016-09-15  8:22           ` Arnd Bergmann [this message]
2016-09-15 12:05             ` Gabriele Paoloni
2016-09-15 12:24               ` Arnd Bergmann
2016-09-15 14:28                 ` Gabriele Paoloni
2016-09-21 10:09                 ` zhichang
2016-09-21 16:20                   ` Gabriele Paoloni
2016-09-21 20:18                     ` Arnd Bergmann
2016-09-22 11:55                       ` Gabriele Paoloni
2016-09-22 12:14                         ` Arnd Bergmann
2016-09-22 14:47                           ` Gabriele Paoloni
2016-09-22 14:59                             ` Arnd Bergmann
2016-09-22 15:20                               ` Gabriele Paoloni
2016-09-22 15:46                                 ` zhichang.yuan
2016-09-22 16:27                           ` zhichang.yuan
2016-09-23  9:51                             ` Arnd Bergmann
2016-09-23 10:23                               ` Gabriele Paoloni
2016-09-23 13:42                                 ` Arnd Bergmann
2016-09-23 14:59                                   ` Gabriele Paoloni
2016-09-23 15:55                                     ` Arnd Bergmann
2016-09-24  8:14                                       ` zhichang
2016-09-24 21:00                                         ` Arnd Bergmann
2016-09-26 13:21                                   ` Gabriele Paoloni
2016-09-24  8:00                               ` zhichang
2016-10-02 22:03         ` Jon Masters
2016-10-04 12:02           ` John Garry
2016-10-06  0:18             ` Benjamin Herrenschmidt
2016-10-06 13:31               ` John Garry
2016-09-14 14:09   ` kbuild test robot
2016-09-14 12:15 ` [PATCH V3 3/4] ARM64 LPC: support serial based on low-pin-count Zhichang Yuan
2016-09-14 12:25   ` Arnd Bergmann
2016-09-14 15:04     ` zhichang.yuan
2016-09-14 21:33       ` Arnd Bergmann
     [not found]         ` <815bebc1-96c9-2131-930d-bccdd4bf1c55@gmail.com>
2016-09-21 19:29           ` Arnd Bergmann
2016-09-14 12:15 ` [PATCH V3 4/4] ARM64 LPC: support earlycon for UART connected to LPC Zhichang Yuan

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