* [PATCH 1/2] net: davinci_mdio: add GPIO reset logic
2017-03-13 13:42 [PATCH 0/2] ARM: am335x-icev2: Add ethernet support Roger Quadros
@ 2017-03-13 13:42 ` Roger Quadros
2017-03-13 13:42 ` [PATCH 2/2] ARM: dts: am335x-icev2: Add CPSW ethernet0 and ethernet1 Roger Quadros
` (2 subsequent siblings)
3 siblings, 0 replies; 11+ messages in thread
From: Roger Quadros @ 2017-03-13 13:42 UTC (permalink / raw)
To: davem, tony
Cc: grygorii.strashko, nsekhar, jsarha, linux-omap, netdev,
linux-kernel, Roger Quadros
Some boards [1] leave the PHYs at an invalid state
during system power-up or reset thus causing unreliability
issues with the PHY like not being detected by the mdio bus
or link not functional. To work around these boards have
a GPIO connected to the PHY's reset pin.
Implement GPIO reset handling for such cases.
[1] - am572x-idk, am571x-idk, a437x-idk.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
.../devicetree/bindings/net/davinci-mdio.txt | 2 +
drivers/net/ethernet/ti/davinci_mdio.c | 68 +++++++++++++++++++---
2 files changed, 62 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/davinci-mdio.txt b/Documentation/devicetree/bindings/net/davinci-mdio.txt
index 621156c..fd6ebe7 100644
--- a/Documentation/devicetree/bindings/net/davinci-mdio.txt
+++ b/Documentation/devicetree/bindings/net/davinci-mdio.txt
@@ -12,6 +12,8 @@ Required properties:
Optional properties:
- ti,hwmods : Must be "davinci_mdio"
+- reset-gpios : array of GPIO specifier for PHY hardware reset control
+- reset-delay-us : reset assertion time [in microseconds]
Note: "ti,hwmods" field is used to fetch the base address and irq
resources from TI, omap hwmod data base during device registration.
diff --git a/drivers/net/ethernet/ti/davinci_mdio.c b/drivers/net/ethernet/ti/davinci_mdio.c
index 33df340..c6f9e55 100644
--- a/drivers/net/ethernet/ti/davinci_mdio.c
+++ b/drivers/net/ethernet/ti/davinci_mdio.c
@@ -40,6 +40,9 @@
#include <linux/of_device.h>
#include <linux/of_mdio.h>
#include <linux/pinctrl/consumer.h>
+#include <linux/gpio.h>
+#include <linux/gpio/consumer.h>
+#include <linux/of_gpio.h>
/*
* This timeout definition is a worst-case ultra defensive measure against
@@ -53,6 +56,8 @@
#define DEF_OUT_FREQ 2200000 /* 2.2 MHz */
+#define DEFAULT_GPIO_RESET_DELAY 10 /* in microseconds */
+
struct davinci_mdio_of_param {
int autosuspend_delay_ms;
};
@@ -104,6 +109,9 @@ struct davinci_mdio_data {
*/
bool skip_scan;
u32 clk_div;
+ struct gpio_desc **gpio_reset;
+ int num_gpios;
+ int reset_delay_us;
};
static void davinci_mdio_init_clk(struct davinci_mdio_data *data)
@@ -142,6 +150,20 @@ static void davinci_mdio_enable(struct davinci_mdio_data *data)
__raw_writel(data->clk_div | CONTROL_ENABLE, &data->regs->control);
}
+static void __davinci_gpio_reset(struct davinci_mdio_data *data)
+{
+ int i;
+
+ for (i = 0; i < data->num_gpios; i++) {
+ if (!data->gpio_reset[i])
+ continue;
+
+ gpiod_set_value_cansleep(data->gpio_reset[i], 1);
+ udelay(data->reset_delay_us);
+ gpiod_set_value_cansleep(data->gpio_reset[i], 0);
+ }
+}
+
static int davinci_mdio_reset(struct mii_bus *bus)
{
struct davinci_mdio_data *data = bus->priv;
@@ -317,20 +339,50 @@ static int davinci_mdio_write(struct mii_bus *bus, int phy_id,
}
#if IS_ENABLED(CONFIG_OF)
-static int davinci_mdio_probe_dt(struct mdio_platform_data *data,
- struct platform_device *pdev)
+static int davinci_mdio_probe_dt(struct davinci_mdio_data *data,
+ struct platform_device *pdev)
{
struct device_node *node = pdev->dev.of_node;
u32 prop;
-
- if (!node)
- return -EINVAL;
+ int error;
+ int i;
+ struct gpio_desc *gpiod;
if (of_property_read_u32(node, "bus_freq", &prop)) {
dev_err(&pdev->dev, "Missing bus_freq property in the DT.\n");
- return -EINVAL;
+ data->pdata = default_pdata;
+ } else {
+ data->pdata.bus_freq = prop;
+ }
+
+ i = of_gpio_named_count(node, "reset-gpios");
+ if (i > 0) {
+ data->num_gpios = i;
+ data->gpio_reset = devm_kcalloc(&pdev->dev, i,
+ sizeof(struct gpio_desc *),
+ GFP_KERNEL);
+ if (!data->gpio_reset)
+ return -ENOMEM;
+
+ for (i = 0; i < data->num_gpios; i++) {
+ gpiod = devm_gpiod_get_index(&pdev->dev, "reset", i,
+ GPIOD_OUT_LOW);
+ if (IS_ERR(gpiod)) {
+ error = PTR_ERR(gpiod);
+ if (error == -ENOENT)
+ continue;
+ else
+ return error;
+ }
+ data->gpio_reset[i] = gpiod;
+ }
+
+ if (of_property_read_u32(node, "reset-delay-us",
+ &data->reset_delay_us))
+ data->reset_delay_us = DEFAULT_GPIO_RESET_DELAY;
+
+ __davinci_gpio_reset(data);
}
- data->bus_freq = prop;
return 0;
}
@@ -372,7 +424,7 @@ static int davinci_mdio_probe(struct platform_device *pdev)
if (dev->of_node) {
const struct of_device_id *of_id;
- ret = davinci_mdio_probe_dt(&data->pdata, pdev);
+ ret = davinci_mdio_probe_dt(data, pdev);
if (ret)
return ret;
snprintf(data->bus->id, MII_BUS_ID_SIZE, "%s", pdev->name);
--
2.7.4
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 2/2] ARM: dts: am335x-icev2: Add CPSW ethernet0 and ethernet1
2017-03-13 13:42 [PATCH 0/2] ARM: am335x-icev2: Add ethernet support Roger Quadros
2017-03-13 13:42 ` [PATCH 1/2] net: davinci_mdio: add GPIO reset logic Roger Quadros
@ 2017-03-13 13:42 ` Roger Quadros
2017-03-13 19:24 ` Grygorii Strashko
2017-03-14 12:50 ` [PATCH v2 " Roger Quadros
2017-03-14 12:51 ` [PATCH 3/3] ARM: omap2plus_defconfig: Enable TI Ethernet PHY Roger Quadros
2017-03-30 12:35 ` [PATCH 0/2] ARM: am335x-icev2: Add ethernet support Roger Quadros
3 siblings, 2 replies; 11+ messages in thread
From: Roger Quadros @ 2017-03-13 13:42 UTC (permalink / raw)
To: davem, tony
Cc: grygorii.strashko, nsekhar, jsarha, linux-omap, netdev,
linux-kernel, Roger Quadros
Enable the 2 ethernet ports as CPSW ports in dual-mac mode
Signed-off-by: Roger Quadros <rogerq@ti.com>
[nsekhar@ti.com: use AM33XX_IOPAD()]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
arch/arm/boot/dts/am335x-icev2.dts | 113 +++++++++++++++++++++++++++++++++++++
1 file changed, 113 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-icev2.dts b/arch/arm/boot/dts/am335x-icev2.dts
index a2ad076..cc343b0 100644
--- a/arch/arm/boot/dts/am335x-icev2.dts
+++ b/arch/arm/boot/dts/am335x-icev2.dts
@@ -201,6 +201,69 @@
AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLUP | MUX_MODE1) /* (L16) gmii1_rxd2.uart3_txd */
>;
};
+
+ cpsw_default: cpsw_default {
+ pinctrl-single,pins = <
+ /* Slave 1, RMII mode */
+ AM33XX_IOPAD(0x90c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_crs.rmii1_crs_dv */
+ AM33XX_IOPAD(0x944, (PIN_INPUT_PULLUP | MUX_MODE0)) /* rmii1_refclk.rmii1_refclk */
+ AM33XX_IOPAD(0x940, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_rxd0.rmii1_rxd0 */
+ AM33XX_IOPAD(0x93c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_rxd1.rmii1_rxd1 */
+ AM33XX_IOPAD(0x910, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_rxerr.rmii1_rxerr */
+ AM33XX_IOPAD(0x928, (PIN_OUTPUT_PULLDOWN | MUX_MODE1)) /* mii1_txd0.rmii1_txd0 */
+ AM33XX_IOPAD(0x924, (PIN_OUTPUT_PULLDOWN | MUX_MODE1)) /* mii1_txd1.rmii1_txd1 */
+ AM33XX_IOPAD(0x914, (PIN_OUTPUT_PULLDOWN | MUX_MODE1)) /* mii1_txen.rmii1_txen */
+ /* Slave 2, RMII mode */
+ AM33XX_IOPAD(0x870, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_wait0.rmii2_crs_dv */
+ AM33XX_IOPAD(0x908, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_col.rmii2_refclk */
+ AM33XX_IOPAD(0x86c, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_a11.rmii2_rxd0 */
+ AM33XX_IOPAD(0x868, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_a10.rmii2_rxd1 */
+ AM33XX_IOPAD(0x874, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_wpn.rmii2_rxerr */
+ AM33XX_IOPAD(0x854, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* gpmc_a5.rmii2_txd0 */
+ AM33XX_IOPAD(0x850, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* gpmc_a4.rmii2_txd1 */
+ AM33XX_IOPAD(0x840, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* gpmc_a0.rmii2_txen */
+ >;
+ };
+
+ cpsw_sleep: cpsw_sleep {
+ pinctrl-single,pins = <
+ /* Slave 1 reset value */
+ AM33XX_IOPAD(0x90c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x944, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x940, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x93c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x910, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x928, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x924, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x914, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+
+ /* Slave 2 reset value */
+ AM33XX_IOPAD(0x870, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x908, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x86c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x868, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x874, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x854, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x850, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x840, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ >;
+ };
+
+ davinci_mdio_default: davinci_mdio_default {
+ pinctrl-single,pins = <
+ /* MDIO */
+ AM33XX_IOPAD(0x948, (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)) /* mdio_data.mdio_data */
+ AM33XX_IOPAD(0x94c, (PIN_OUTPUT_PULLUP | MUX_MODE0)) /* mdio_clk.mdio_clk */
+ >;
+ };
+
+ davinci_mdio_sleep: davinci_mdio_sleep {
+ pinctrl-single,pins = <
+ /* MDIO reset value */
+ AM33XX_IOPAD(0x948, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x94c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ >;
+ };
};
&i2c0 {
@@ -350,3 +413,53 @@
pinctrl-0 = <&uart3_pins_default>;
status = "okay";
};
+
+&gpio3 {
+ p4 {
+ gpio-hog;
+ gpios = <4 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "PR1_MII_CTRL";
+ };
+
+ p10 {
+ gpio-hog;
+ gpios = <10 GPIO_ACTIVE_HIGH>;
+ /* ETH1 mux: Low for MII-PRU, high for RMII-CPSW */
+ output-high;
+ line-name = "MUX_MII_CTL1";
+ };
+};
+
+&cpsw_emac0 {
+ phy_id = <&davinci_mdio>, <1>;
+ phy-mode = "rmii";
+ dual_emac_res_vlan = <1>;
+};
+
+&cpsw_emac1 {
+ phy_id = <&davinci_mdio>, <3>;
+ phy-mode = "rmii";
+ dual_emac_res_vlan = <2>;
+};
+
+&mac {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&cpsw_default>;
+ pinctrl-1 = <&cpsw_sleep>;
+ status = "okay";
+ dual_emac;
+};
+
+&phy_sel {
+ rmii-clock-ext;
+};
+
+&davinci_mdio {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&davinci_mdio_default>;
+ pinctrl-1 = <&davinci_mdio_sleep>;
+ status = "okay";
+ reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
+ reset-delay-us = <2>; /* PHY datasheet states 1uS min */
+};
--
2.7.4
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 2/2] ARM: dts: am335x-icev2: Add CPSW ethernet0 and ethernet1
2017-03-13 13:42 ` [PATCH 2/2] ARM: dts: am335x-icev2: Add CPSW ethernet0 and ethernet1 Roger Quadros
@ 2017-03-13 19:24 ` Grygorii Strashko
2017-03-14 6:07 ` Sekhar Nori
2017-03-14 12:50 ` [PATCH v2 " Roger Quadros
1 sibling, 1 reply; 11+ messages in thread
From: Grygorii Strashko @ 2017-03-13 19:24 UTC (permalink / raw)
To: Roger Quadros, davem, tony
Cc: nsekhar, jsarha, linux-omap, netdev, linux-kernel
On 03/13/2017 08:42 AM, Roger Quadros wrote:
> Enable the 2 ethernet ports as CPSW ports in dual-mac mode
>
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> [nsekhar@ti.com: use AM33XX_IOPAD()]
> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
> ---
> arch/arm/boot/dts/am335x-icev2.dts | 113 +++++++++++++++++++++++++++++++++++++
> 1 file changed, 113 insertions(+)
>
> diff --git a/arch/arm/boot/dts/am335x-icev2.dts b/arch/arm/boot/dts/am335x-icev2.dts
> index a2ad076..cc343b0 100644
> --- a/arch/arm/boot/dts/am335x-icev2.dts
> +++ b/arch/arm/boot/dts/am335x-icev2.dts
> @@ -201,6 +201,69 @@
> AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLUP | MUX_MODE1) /* (L16) gmii1_rxd2.uart3_txd */
> >;
> };
> +
>
> &i2c0 {
> @@ -350,3 +413,53 @@
> pinctrl-0 = <&uart3_pins_default>;
> status = "okay";
> };
> +
> +&gpio3 {
> + p4 {
> + gpio-hog;
> + gpios = <4 GPIO_ACTIVE_HIGH>;
> + output-high;
> + line-name = "PR1_MII_CTRL";
> + };
> +
> + p10 {
> + gpio-hog;
> + gpios = <10 GPIO_ACTIVE_HIGH>;
> + /* ETH1 mux: Low for MII-PRU, high for RMII-CPSW */
> + output-high;
> + line-name = "MUX_MII_CTL1";
> + };
> +};
> +
> +&cpsw_emac0 {
> + phy_id = <&davinci_mdio>, <1>;
this is deprecated definition.
pls, use phy-handle.
> + phy-mode = "rmii";
> + dual_emac_res_vlan = <1>;
> +};
> +
> +&cpsw_emac1 {
> + phy_id = <&davinci_mdio>, <3>;
same
> + phy-mode = "rmii";
> + dual_emac_res_vlan = <2>;
> +};
> +
> +&mac {
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&cpsw_default>;
> + pinctrl-1 = <&cpsw_sleep>;
> + status = "okay";
> + dual_emac;
> +};
> +
> +&phy_sel {
> + rmii-clock-ext;
> +};
> +
> +&davinci_mdio {
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&davinci_mdio_default>;
> + pinctrl-1 = <&davinci_mdio_sleep>;
> + status = "okay";
> + reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
> + reset-delay-us = <2>; /* PHY datasheet states 1uS min */
> +};
>
--
regards,
-grygorii
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH 2/2] ARM: dts: am335x-icev2: Add CPSW ethernet0 and ethernet1
2017-03-13 19:24 ` Grygorii Strashko
@ 2017-03-14 6:07 ` Sekhar Nori
0 siblings, 0 replies; 11+ messages in thread
From: Sekhar Nori @ 2017-03-14 6:07 UTC (permalink / raw)
To: Grygorii Strashko, Roger Quadros, davem, tony
Cc: jsarha, linux-omap, netdev, linux-kernel
On Tuesday 14 March 2017 12:54 AM, Grygorii Strashko wrote:
>
>
> On 03/13/2017 08:42 AM, Roger Quadros wrote:
>> Enable the 2 ethernet ports as CPSW ports in dual-mac mode
>>
>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>> [nsekhar@ti.com: use AM33XX_IOPAD()]
>> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
>> ---
>> arch/arm/boot/dts/am335x-icev2.dts | 113
>> +++++++++++++++++++++++++++++++++++++
>> 1 file changed, 113 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/am335x-icev2.dts
>> b/arch/arm/boot/dts/am335x-icev2.dts
>> index a2ad076..cc343b0 100644
>> --- a/arch/arm/boot/dts/am335x-icev2.dts
>> +++ b/arch/arm/boot/dts/am335x-icev2.dts
>> @@ -201,6 +201,69 @@
>> AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLUP | MUX_MODE1) /*
>> (L16) gmii1_rxd2.uart3_txd */
>> >;
>> };
>> +
>
>>
>> &i2c0 {
>> @@ -350,3 +413,53 @@
>> pinctrl-0 = <&uart3_pins_default>;
>> status = "okay";
>> };
>> +
>> +&gpio3 {
>> + p4 {
>> + gpio-hog;
>> + gpios = <4 GPIO_ACTIVE_HIGH>;
>> + output-high;
>> + line-name = "PR1_MII_CTRL";
>> + };
>> +
>> + p10 {
>> + gpio-hog;
>> + gpios = <10 GPIO_ACTIVE_HIGH>;
>> + /* ETH1 mux: Low for MII-PRU, high for RMII-CPSW */
>> + output-high;
>> + line-name = "MUX_MII_CTL1";
>> + };
>> +};
>> +
>> +&cpsw_emac0 {
>> + phy_id = <&davinci_mdio>, <1>;
>
> this is deprecated definition.
> pls, use phy-handle.
Perhaps cpsw driver should warn about using deprecated DT properties.
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v2 2/2] ARM: dts: am335x-icev2: Add CPSW ethernet0 and ethernet1
2017-03-13 13:42 ` [PATCH 2/2] ARM: dts: am335x-icev2: Add CPSW ethernet0 and ethernet1 Roger Quadros
2017-03-13 19:24 ` Grygorii Strashko
@ 2017-03-14 12:50 ` Roger Quadros
1 sibling, 0 replies; 11+ messages in thread
From: Roger Quadros @ 2017-03-14 12:50 UTC (permalink / raw)
To: davem, tony
Cc: grygorii.strashko, nsekhar, jsarha, linux-omap, netdev,
linux-kernel, rogerq
Enable the 2 ethernet ports as CPSW ports in dual-mac mode
Signed-off-by: Roger Quadros <rogerq@ti.com>
[nsekhar@ti.com: use AM33XX_IOPAD()]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
v2:
- use phy-handle instead of phy_id
arch/arm/boot/dts/am335x-icev2.dts | 121 +++++++++++++++++++++++++++++++++++++
1 file changed, 121 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-icev2.dts b/arch/arm/boot/dts/am335x-icev2.dts
index a2ad076..415cd46 100644
--- a/arch/arm/boot/dts/am335x-icev2.dts
+++ b/arch/arm/boot/dts/am335x-icev2.dts
@@ -201,6 +201,69 @@
AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLUP | MUX_MODE1) /* (L16) gmii1_rxd2.uart3_txd */
>;
};
+
+ cpsw_default: cpsw_default {
+ pinctrl-single,pins = <
+ /* Slave 1, RMII mode */
+ AM33XX_IOPAD(0x90c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_crs.rmii1_crs_dv */
+ AM33XX_IOPAD(0x944, (PIN_INPUT_PULLUP | MUX_MODE0)) /* rmii1_refclk.rmii1_refclk */
+ AM33XX_IOPAD(0x940, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_rxd0.rmii1_rxd0 */
+ AM33XX_IOPAD(0x93c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_rxd1.rmii1_rxd1 */
+ AM33XX_IOPAD(0x910, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_rxerr.rmii1_rxerr */
+ AM33XX_IOPAD(0x928, (PIN_OUTPUT_PULLDOWN | MUX_MODE1)) /* mii1_txd0.rmii1_txd0 */
+ AM33XX_IOPAD(0x924, (PIN_OUTPUT_PULLDOWN | MUX_MODE1)) /* mii1_txd1.rmii1_txd1 */
+ AM33XX_IOPAD(0x914, (PIN_OUTPUT_PULLDOWN | MUX_MODE1)) /* mii1_txen.rmii1_txen */
+ /* Slave 2, RMII mode */
+ AM33XX_IOPAD(0x870, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_wait0.rmii2_crs_dv */
+ AM33XX_IOPAD(0x908, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_col.rmii2_refclk */
+ AM33XX_IOPAD(0x86c, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_a11.rmii2_rxd0 */
+ AM33XX_IOPAD(0x868, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_a10.rmii2_rxd1 */
+ AM33XX_IOPAD(0x874, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_wpn.rmii2_rxerr */
+ AM33XX_IOPAD(0x854, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* gpmc_a5.rmii2_txd0 */
+ AM33XX_IOPAD(0x850, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* gpmc_a4.rmii2_txd1 */
+ AM33XX_IOPAD(0x840, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* gpmc_a0.rmii2_txen */
+ >;
+ };
+
+ cpsw_sleep: cpsw_sleep {
+ pinctrl-single,pins = <
+ /* Slave 1 reset value */
+ AM33XX_IOPAD(0x90c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x944, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x940, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x93c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x910, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x928, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x924, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x914, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+
+ /* Slave 2 reset value */
+ AM33XX_IOPAD(0x870, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x908, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x86c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x868, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x874, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x854, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x850, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x840, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ >;
+ };
+
+ davinci_mdio_default: davinci_mdio_default {
+ pinctrl-single,pins = <
+ /* MDIO */
+ AM33XX_IOPAD(0x948, (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)) /* mdio_data.mdio_data */
+ AM33XX_IOPAD(0x94c, (PIN_OUTPUT_PULLUP | MUX_MODE0)) /* mdio_clk.mdio_clk */
+ >;
+ };
+
+ davinci_mdio_sleep: davinci_mdio_sleep {
+ pinctrl-single,pins = <
+ /* MDIO reset value */
+ AM33XX_IOPAD(0x948, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ AM33XX_IOPAD(0x94c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+ >;
+ };
};
&i2c0 {
@@ -350,3 +413,61 @@
pinctrl-0 = <&uart3_pins_default>;
status = "okay";
};
+
+&gpio3 {
+ p4 {
+ gpio-hog;
+ gpios = <4 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "PR1_MII_CTRL";
+ };
+
+ p10 {
+ gpio-hog;
+ gpios = <10 GPIO_ACTIVE_HIGH>;
+ /* ETH1 mux: Low for MII-PRU, high for RMII-CPSW */
+ output-high;
+ line-name = "MUX_MII_CTL1";
+ };
+};
+
+&cpsw_emac0 {
+ phy-handle = <ðphy0>;
+ phy-mode = "rmii";
+ dual_emac_res_vlan = <1>;
+};
+
+&cpsw_emac1 {
+ phy-handle = <ðphy1>;
+ phy-mode = "rmii";
+ dual_emac_res_vlan = <2>;
+};
+
+&mac {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&cpsw_default>;
+ pinctrl-1 = <&cpsw_sleep>;
+ status = "okay";
+ dual_emac;
+};
+
+&phy_sel {
+ rmii-clock-ext;
+};
+
+&davinci_mdio {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&davinci_mdio_default>;
+ pinctrl-1 = <&davinci_mdio_sleep>;
+ status = "okay";
+ reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
+ reset-delay-us = <2>; /* PHY datasheet states 1uS min */
+
+ ethphy0: ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ ethphy1: ethernet-phy@3 {
+ reg = <3>;
+ };
+};
--
2.7.4
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 3/3] ARM: omap2plus_defconfig: Enable TI Ethernet PHY
2017-03-13 13:42 [PATCH 0/2] ARM: am335x-icev2: Add ethernet support Roger Quadros
2017-03-13 13:42 ` [PATCH 1/2] net: davinci_mdio: add GPIO reset logic Roger Quadros
2017-03-13 13:42 ` [PATCH 2/2] ARM: dts: am335x-icev2: Add CPSW ethernet0 and ethernet1 Roger Quadros
@ 2017-03-14 12:51 ` Roger Quadros
2017-03-30 12:35 ` [PATCH 0/2] ARM: am335x-icev2: Add ethernet support Roger Quadros
3 siblings, 0 replies; 11+ messages in thread
From: Roger Quadros @ 2017-03-14 12:51 UTC (permalink / raw)
To: tony
Cc: davem, grygorii.strashko, nsekhar, jsarha, linux-omap, netdev,
linux-kernel
DP83848_PHY i.e. [TI TLK10X 10/100 Mbps PHY] is used on the
am335x-icev2 board. Enable the PHY driver for it.
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/configs/omap2plus_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index f2462a6..cfa5bac 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -167,6 +167,7 @@ CONFIG_TI_CPTS=y
# CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_AT803X_PHY=y
+CONFIG_DP83848_PHY=y
CONFIG_MICREL_PHY=y
CONFIG_SMSC_PHY=y
CONFIG_USB_USBNET=m
--
2.7.4
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 0/2] ARM: am335x-icev2: Add ethernet support
2017-03-13 13:42 [PATCH 0/2] ARM: am335x-icev2: Add ethernet support Roger Quadros
` (2 preceding siblings ...)
2017-03-14 12:51 ` [PATCH 3/3] ARM: omap2plus_defconfig: Enable TI Ethernet PHY Roger Quadros
@ 2017-03-30 12:35 ` Roger Quadros
2017-04-04 16:01 ` Tony Lindgren
3 siblings, 1 reply; 11+ messages in thread
From: Roger Quadros @ 2017-03-30 12:35 UTC (permalink / raw)
To: davem, tony
Cc: grygorii.strashko, nsekhar, jsarha, linux-omap, netdev, linux-kernel
Hi Tony & Dave,
On 13/03/17 15:42, Roger Quadros wrote:
> Hi,
>
> This series adds ethernet support to am335x-icev2 board.
>
> The ethernet PHYs on the board need an explicit GPIO reset pulse
> to ensure they bootstrap to the correct mode. Without the
> GPIO reset they just don't work.
>
> cheers,
> -roger
Any comments on this series. Patch 1 is at version 2.
>
> Roger Quadros (2):
> net: davinci_mdio: add GPIO reset logic
> ARM: dts: am335x-icev2: Add CPSW ethernet0 and ethernet1
>
> .../devicetree/bindings/net/davinci-mdio.txt | 2 +
> arch/arm/boot/dts/am335x-icev2.dts | 113 +++++++++++++++++++++
> drivers/net/ethernet/ti/davinci_mdio.c | 68 +++++++++++--
> 3 files changed, 175 insertions(+), 8 deletions(-)
>
cheers,
-roger
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH 0/2] ARM: am335x-icev2: Add ethernet support
2017-03-30 12:35 ` [PATCH 0/2] ARM: am335x-icev2: Add ethernet support Roger Quadros
@ 2017-04-04 16:01 ` Tony Lindgren
2017-04-04 17:35 ` David Miller
2017-04-05 8:35 ` Roger Quadros
0 siblings, 2 replies; 11+ messages in thread
From: Tony Lindgren @ 2017-04-04 16:01 UTC (permalink / raw)
To: Roger Quadros
Cc: davem, grygorii.strashko, nsekhar, jsarha, linux-omap, netdev,
linux-kernel
* Roger Quadros <rogerq@ti.com> [170330 05:37]:
> Hi Tony & Dave,
>
> On 13/03/17 15:42, Roger Quadros wrote:
> > Hi,
> >
> > This series adds ethernet support to am335x-icev2 board.
> >
> > The ethernet PHYs on the board need an explicit GPIO reset pulse
> > to ensure they bootstrap to the correct mode. Without the
> > GPIO reset they just don't work.
> >
> > cheers,
> > -roger
>
> Any comments on this series. Patch 1 is at version 2.
I think you meant patch 2/3 is at version2. I've picked
patches 2 and 3 for v4.12 into dt and defconfig branches.
You may need to resend the davinci_mdio.c patch alone
for Dave as he usually won't pick individual patches I
think.
Regards,
Tony
> > Roger Quadros (2):
> > net: davinci_mdio: add GPIO reset logic
> > ARM: dts: am335x-icev2: Add CPSW ethernet0 and ethernet1
> >
> > .../devicetree/bindings/net/davinci-mdio.txt | 2 +
> > arch/arm/boot/dts/am335x-icev2.dts | 113 +++++++++++++++++++++
> > drivers/net/ethernet/ti/davinci_mdio.c | 68 +++++++++++--
> > 3 files changed, 175 insertions(+), 8 deletions(-)
> >
>
> cheers,
> -roger
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 0/2] ARM: am335x-icev2: Add ethernet support
2017-04-04 16:01 ` Tony Lindgren
@ 2017-04-04 17:35 ` David Miller
2017-04-05 8:35 ` Roger Quadros
1 sibling, 0 replies; 11+ messages in thread
From: David Miller @ 2017-04-04 17:35 UTC (permalink / raw)
To: tony
Cc: rogerq, grygorii.strashko, nsekhar, jsarha, linux-omap, netdev,
linux-kernel
From: Tony Lindgren <tony@atomide.com>
Date: Tue, 4 Apr 2017 09:01:06 -0700
> You may need to resend the davinci_mdio.c patch alone
> for Dave as he usually won't pick individual patches I
> think.
Correct.
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 0/2] ARM: am335x-icev2: Add ethernet support
2017-04-04 16:01 ` Tony Lindgren
2017-04-04 17:35 ` David Miller
@ 2017-04-05 8:35 ` Roger Quadros
1 sibling, 0 replies; 11+ messages in thread
From: Roger Quadros @ 2017-04-05 8:35 UTC (permalink / raw)
To: Tony Lindgren
Cc: davem, grygorii.strashko, nsekhar, jsarha, linux-omap, netdev,
linux-kernel
On 04/04/17 19:01, Tony Lindgren wrote:
> * Roger Quadros <rogerq@ti.com> [170330 05:37]:
>> Hi Tony & Dave,
>>
>> On 13/03/17 15:42, Roger Quadros wrote:
>>> Hi,
>>>
>>> This series adds ethernet support to am335x-icev2 board.
>>>
>>> The ethernet PHYs on the board need an explicit GPIO reset pulse
>>> to ensure they bootstrap to the correct mode. Without the
>>> GPIO reset they just don't work.
>>>
>>> cheers,
>>> -roger
>>
>> Any comments on this series. Patch 1 is at version 2.
>
> I think you meant patch 2/3 is at version2. I've picked
> patches 2 and 3 for v4.12 into dt and defconfig branches.
Thanks Tony.
>
> You may need to resend the davinci_mdio.c patch alone
> for Dave as he usually won't pick individual patches I
> think.
OK, I'll send that one separately.
cheers,
-roger
>
> Regards,
>
> Tony
>
>>> Roger Quadros (2):
>>> net: davinci_mdio: add GPIO reset logic
>>> ARM: dts: am335x-icev2: Add CPSW ethernet0 and ethernet1
>>>
>>> .../devicetree/bindings/net/davinci-mdio.txt | 2 +
>>> arch/arm/boot/dts/am335x-icev2.dts | 113 +++++++++++++++++++++
>>> drivers/net/ethernet/ti/davinci_mdio.c | 68 +++++++++++--
>>> 3 files changed, 175 insertions(+), 8 deletions(-)
>>>
>>
^ permalink raw reply [flat|nested] 11+ messages in thread