Re: [PATCH v4 2/7] MIPS: Loongson64: Distinguish firmware dependencies DTB/LEFI

From: Oleksij Rempel <linux@rempel-privat.de>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>,
	Qing Zhang <zhangqing@loongson.cn>,
	Huacai Chen <chenhuacai@kernel.org>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>
Cc: "linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	Ming Wang <wangming01@loongson.cn>
Subject: Re: [PATCH v4 2/7] MIPS: Loongson64: Distinguish firmware dependencies DTB/LEFI
Date: Wed, 10 Mar 2021 17:03:03 +0100	[thread overview]
Message-ID: <1a9486a4-b35b-f8b1-9f70-2247dbcdebcc@rempel-privat.de> (raw)
In-Reply-To: <a2b1ad18-8f4b-8e43-e175-c372580a7168@flygoat.com>

Am 10.03.21 um 16:58 schrieb Jiaxun Yang:
>
>
> 在 2021/3/10 21:26, Oleksij Rempel 写道:
> [...]
>> I would like to understand, why it is impossible. Do fw_arg0 provide memory address or some kind of
>> count/size? Can it be negative?
>>
>> We already had same situation with ARM and it was fixed. Why this can't be done for MIPS or LS?
>
> Well we can fix it for future MIPS systems but not present Loongson.
>
> Actually I've talked to several Chinese MIPS chip vendors and they
> all agreed to unify the booting protcol.
>
> I raised the same question to Loongson ~3 years ago but got
> negative response.
> The idea got reject in a recent private discussions with Loongson
> about 2K1000 upstream stuff.
>
> Also I realized Loongson's chip comes with too many ISA level
> custom designs which makes it impossible to use MIPS generic
> kernel.
>  
>
>>>> This protocol is described here on page 15, "3. Boot protocols"
>>>> https://docplayer.net/62444141-Unified-hosting-interface-md01069-reference-manual.html
>>>>
>>>> According to this protocol, you should have:
>>>> fw_arg0 = -2
>>>> fw_arg1 = Virtual (kseg0) address of Device Tree Blob
>>>>
>>>> This would made LS a first grade resident for many boot loaders and
>>>> save a lot of needles headaches.
>>>>
>>> Loongson is stepping away from MIPS and it seems like they're going to use EDK-II for their Loongarch.
>>>
>> It seems to be UEFI related, it seems to be not related to the CPU arch, or do i'm missing something?
> I meant they won't invest much to MIPS based chips :-(
>> In any case, if this is true, then it means, that Loongsoon is about to drop support for old boot
>> loaders (PMON?) and do new thing (one more boot protocol?). So argumentation, we upstream old own
>> protocol, but will drop it to make some thing new is not really good example :)
> Yes, actually many new Loongson desktop machines (3A3000/3A4000) are shipped
> with UEFI and relies on second stage bootloader to convert to old boot
> protocol.
>
> I'm againt to upstraming the "new" protocol as it's non-standard UEFI
> with many
> nonsense design.
>
>
>>> TBH I've checked Loongson's PMON code and realized it can't be ported to other projects easily.
>>> Tons of unregonized assembly code.
>>>
>> No need to port it. Here is example of working clean code:
>> https://git.pengutronix.de/cgit/barebox/tree/arch/mips/boards/loongson-ls1b/lowlevel.S
> I've ported U-Boot to LS1C as well. But LS1B/LS1C is Loongson32.
> Loongson64 based systems like LS2K is much more complex than it.
> The bootloader is fullfilled with assembly and mostly undocumented.
> LS2K's PMON contains ~50k lines of assembly.

OK, i hope i'll never have customers using this chips. Are there any
reason why do we wont to keep it alive? :D

--
Regards,
Oleksij