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* [PATCH v2] arm64: dts: mt8192: Follow binding order for SCP registers
@ 2022-05-04 21:45 Nícolas F. R. A. Prado
  2022-05-05  2:50 ` Chen-Yu Tsai
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Nícolas F. R. A. Prado @ 2022-05-04 21:45 UTC (permalink / raw)
  To: Matthias Brugger
  Cc: AngeloGioacchino Del Regno, kernel, Nícolas F. R. A. Prado,
	Allen-KH Cheng, Krzysztof Kozlowski, Rob Herring, devicetree,
	linux-arm-kernel, linux-kernel, linux-mediatek

The dt-binding for SCP documents the reg-names order as sram, cfg,
l1tcm. Update the SCP node on the mt8192 devicetree to follow that
order, which gets rid of a dtbs_check warning. This doesn't change any
behavior since the SCP driver accesses the memory regions through the
names anyway.

Fixes: c63556ec6bfe ("arm64: dts: mt8192: Add SCP node")
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>

---

Changes in v2:
- Added missing Fixes tag

 arch/arm64/boot/dts/mediatek/mt8192.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 26dbe9ecc528..733aec2e7f77 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -699,9 +699,9 @@ spi7: spi@1101e000 {
 		scp: scp@10500000 {
 			compatible = "mediatek,mt8192-scp";
 			reg = <0 0x10500000 0 0x100000>,
-			      <0 0x10700000 0 0x8000>,
-			      <0 0x10720000 0 0xe0000>;
-			reg-names = "sram", "l1tcm", "cfg";
+			      <0 0x10720000 0 0xe0000>,
+			      <0 0x10700000 0 0x8000>;
+			reg-names = "sram", "cfg", "l1tcm";
 			interrupts = <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH 0>;
 			clocks = <&infracfg CLK_INFRA_SCPSYS>;
 			clock-names = "main";
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH v2] arm64: dts: mt8192: Follow binding order for SCP registers
  2022-05-04 21:45 [PATCH v2] arm64: dts: mt8192: Follow binding order for SCP registers Nícolas F. R. A. Prado
@ 2022-05-05  2:50 ` Chen-Yu Tsai
  2022-05-05  8:16 ` AngeloGioacchino Del Regno
  2022-05-05 13:40 ` Matthias Brugger
  2 siblings, 0 replies; 4+ messages in thread
From: Chen-Yu Tsai @ 2022-05-05  2:50 UTC (permalink / raw)
  To: Nícolas F. R. A. Prado
  Cc: Matthias Brugger, AngeloGioacchino Del Regno, kernel,
	Allen-KH Cheng, Krzysztof Kozlowski, Rob Herring, devicetree,
	linux-arm-kernel, linux-kernel, linux-mediatek

On Thu, May 5, 2022 at 5:50 AM Nícolas F. R. A. Prado
<nfraprado@collabora.com> wrote:
>
> The dt-binding for SCP documents the reg-names order as sram, cfg,
> l1tcm. Update the SCP node on the mt8192 devicetree to follow that
> order, which gets rid of a dtbs_check warning. This doesn't change any
> behavior since the SCP driver accesses the memory regions through the
> names anyway.
>
> Fixes: c63556ec6bfe ("arm64: dts: mt8192: Add SCP node")
> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>

Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH v2] arm64: dts: mt8192: Follow binding order for SCP registers
  2022-05-04 21:45 [PATCH v2] arm64: dts: mt8192: Follow binding order for SCP registers Nícolas F. R. A. Prado
  2022-05-05  2:50 ` Chen-Yu Tsai
@ 2022-05-05  8:16 ` AngeloGioacchino Del Regno
  2022-05-05 13:40 ` Matthias Brugger
  2 siblings, 0 replies; 4+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-05-05  8:16 UTC (permalink / raw)
  To: Nícolas F. R. A. Prado, Matthias Brugger
  Cc: kernel, Allen-KH Cheng, Krzysztof Kozlowski, Rob Herring,
	devicetree, linux-arm-kernel, linux-kernel, linux-mediatek

Il 04/05/22 23:45, Nícolas F. R. A. Prado ha scritto:
> The dt-binding for SCP documents the reg-names order as sram, cfg,
> l1tcm. Update the SCP node on the mt8192 devicetree to follow that
> order, which gets rid of a dtbs_check warning. This doesn't change any
> behavior since the SCP driver accesses the memory regions through the
> names anyway.
> 
> Fixes: c63556ec6bfe ("arm64: dts: mt8192: Add SCP node")
> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>

Now, that's perfect! Thanks!

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH v2] arm64: dts: mt8192: Follow binding order for SCP registers
  2022-05-04 21:45 [PATCH v2] arm64: dts: mt8192: Follow binding order for SCP registers Nícolas F. R. A. Prado
  2022-05-05  2:50 ` Chen-Yu Tsai
  2022-05-05  8:16 ` AngeloGioacchino Del Regno
@ 2022-05-05 13:40 ` Matthias Brugger
  2 siblings, 0 replies; 4+ messages in thread
From: Matthias Brugger @ 2022-05-05 13:40 UTC (permalink / raw)
  To: Nícolas F. R. A. Prado
  Cc: AngeloGioacchino Del Regno, kernel, Allen-KH Cheng,
	Krzysztof Kozlowski, Rob Herring, devicetree, linux-arm-kernel,
	linux-kernel, linux-mediatek



On 04/05/2022 23:45, Nícolas F. R. A. Prado wrote:
> The dt-binding for SCP documents the reg-names order as sram, cfg,
> l1tcm. Update the SCP node on the mt8192 devicetree to follow that
> order, which gets rid of a dtbs_check warning. This doesn't change any
> behavior since the SCP driver accesses the memory regions through the
> names anyway.
> 
> Fixes: c63556ec6bfe ("arm64: dts: mt8192: Add SCP node")
> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
> 

Applied thanks!

> ---
> 
> Changes in v2:
> - Added missing Fixes tag
> 
>   arch/arm64/boot/dts/mediatek/mt8192.dtsi | 6 +++---
>   1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index 26dbe9ecc528..733aec2e7f77 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -699,9 +699,9 @@ spi7: spi@1101e000 {
>   		scp: scp@10500000 {
>   			compatible = "mediatek,mt8192-scp";
>   			reg = <0 0x10500000 0 0x100000>,
> -			      <0 0x10700000 0 0x8000>,
> -			      <0 0x10720000 0 0xe0000>;
> -			reg-names = "sram", "l1tcm", "cfg";
> +			      <0 0x10720000 0 0xe0000>,
> +			      <0 0x10700000 0 0x8000>;
> +			reg-names = "sram", "cfg", "l1tcm";
>   			interrupts = <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH 0>;
>   			clocks = <&infracfg CLK_INFRA_SCPSYS>;
>   			clock-names = "main";

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2022-05-05 13:40 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2022-05-04 21:45 [PATCH v2] arm64: dts: mt8192: Follow binding order for SCP registers Nícolas F. R. A. Prado
2022-05-05  2:50 ` Chen-Yu Tsai
2022-05-05  8:16 ` AngeloGioacchino Del Regno
2022-05-05 13:40 ` Matthias Brugger

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