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From: Akira Tsukamoto <akira.tsukamoto@gmail.com>
To: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: [PATCH 1/5] riscv: __asm_to/copy_from_user: delete existing code
Date: Sat, 19 Jun 2021 20:34:43 +0900	[thread overview]
Message-ID: <1b454390-cee5-a414-509b-3adb25ec0330@gmail.com> (raw)
In-Reply-To: <5a5c07ac-8c11-79d3-46a3-a255d4148f76@gmail.com>


This is to make the diff easier to read, since the diff on
assembler is horrible to read.

Signed-off-by: Akira Tsukamoto <akira.tsukamoto@gmail.com>
---
 arch/riscv/lib/uaccess.S | 40 ----------------------------------------
 1 file changed, 40 deletions(-)

diff --git a/arch/riscv/lib/uaccess.S b/arch/riscv/lib/uaccess.S
index fceaeb18cc64..da9536e1e9cb 100644
--- a/arch/riscv/lib/uaccess.S
+++ b/arch/riscv/lib/uaccess.S
@@ -19,50 +19,10 @@ ENTRY(__asm_copy_from_user)
 	li t6, SR_SUM
 	csrs CSR_STATUS, t6
 
-	add a3, a1, a2
-	/* Use word-oriented copy only if low-order bits match */
-	andi t0, a0, SZREG-1
-	andi t1, a1, SZREG-1
-	bne t0, t1, 2f
-
-	addi t0, a1, SZREG-1
-	andi t1, a3, ~(SZREG-1)
-	andi t0, t0, ~(SZREG-1)
-	/*
-	 * a3: terminal address of source region
-	 * t0: lowest XLEN-aligned address in source
-	 * t1: highest XLEN-aligned address in source
-	 */
-	bgeu t0, t1, 2f
-	bltu a1, t0, 4f
-1:
-	fixup REG_L, t2, (a1), 10f
-	fixup REG_S, t2, (a0), 10f
-	addi a1, a1, SZREG
-	addi a0, a0, SZREG
-	bltu a1, t1, 1b
-2:
-	bltu a1, a3, 5f
-
-3:
 	/* Disable access to user memory */
 	csrc CSR_STATUS, t6
 	li a0, 0
 	ret
-4: /* Edge case: unalignment */
-	fixup lbu, t2, (a1), 10f
-	fixup sb, t2, (a0), 10f
-	addi a1, a1, 1
-	addi a0, a0, 1
-	bltu a1, t0, 4b
-	j 1b
-5: /* Edge case: remainder */
-	fixup lbu, t2, (a1), 10f
-	fixup sb, t2, (a0), 10f
-	addi a1, a1, 1
-	addi a0, a0, 1
-	bltu a1, a3, 5b
-	j 3b
 ENDPROC(__asm_copy_to_user)
 ENDPROC(__asm_copy_from_user)
 EXPORT_SYMBOL(__asm_copy_to_user)
-- 
2.17.1



  reply	other threads:[~2021-06-19 11:34 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-19 11:21 [PATCH v2 0/5] riscv: improving uaccess with logs from network bench Akira Tsukamoto
2021-06-19 11:34 ` Akira Tsukamoto [this message]
2021-06-21 11:45   ` [PATCH 1/5] riscv: __asm_to/copy_from_user: delete existing code David Laight
2021-06-21 13:55     ` Akira Tsukamoto
2021-06-19 11:35 ` [PATCH 2/5] riscv: __asm_to/copy_from_user: Adding byte copy first Akira Tsukamoto
2021-06-19 11:36 ` [PATCH 3/5] riscv: __asm_to/copy_from_user: Copy until dst is aligned Akira Tsukamoto
2021-06-19 11:37 ` [PATCH 4/5] riscv: __asm_to/copy_from_user: Bulk copy while shifting Akira Tsukamoto
2021-06-19 11:43 ` [PATCH 5/5] riscv: __asm_to/copy_from_user: Bulk copy when both src, dst are aligned Akira Tsukamoto
2021-06-21 11:55   ` David Laight
2021-06-21 14:13     ` Akira Tsukamoto
2021-06-20 10:02 ` [PATCH v2 0/5] riscv: improving uaccess with logs from network bench Ben Dooks
2021-06-20 16:36   ` Akira Tsukamoto
2021-06-22  8:30 ` Ben Dooks
2021-06-22 12:05   ` Akira Tsukamoto
2021-06-22 17:45     ` Ben Dooks
2021-07-12 21:24 ` Ben Dooks

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