* [PATCH][v850] Add __KERNEL__ guard to nb85e_cache.h on v850
@ 2003-05-27 9:21 Miles Bader
0 siblings, 0 replies; 2+ messages in thread
From: Miles Bader @ 2003-05-27 9:21 UTC (permalink / raw)
To: Linus Torvalds; +Cc: linux-kernel
This header ends up getting included by uClibc (though nothing in it is
used), so this protection is necessary to avoid problems with kernel-only
typedefs.
diff -ruN -X../cludes linux-2.5.70/include/asm-v850/nb85e_cache.h linux-2.5.70-v850-20030527/include/asm-v850/nb85e_cache.h
--- linux-2.5.70/include/asm-v850/nb85e_cache.h 2003-04-21 10:53:17.000000000 +0900
+++ linux-2.5.70-v850-20030527/include/asm-v850/nb85e_cache.h 2003-05-27 16:09:43.000000000 +0900
@@ -35,7 +35,7 @@
#define L1_CACHE_BYTES NB85E_CACHE_LINE_SIZE
-#ifndef __ASSEMBLY__
+#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
/* Set caching params via the BHC and DCC registers. */
void nb85e_cache_enable (u16 bhc, u16 dcc);
@@ -73,6 +74,6 @@
#define flush_icache_user_range nb85e_cache_flush_icache_user_range
#define flush_cache_sigtramp nb85e_cache_flush_sigtramp
-#endif /* !__ASSEMBLY__ */
+#endif /* __KERNEL__ && !__ASSEMBLY__ */
#endif /* __V850_NB85E_CACHE_H__ */
^ permalink raw reply [flat|nested] 2+ messages in thread
* [PATCH][v850] Add __KERNEL__ guard to nb85e_cache.h on v850
@ 2003-05-06 3:09 Miles Bader
0 siblings, 0 replies; 2+ messages in thread
From: Miles Bader @ 2003-05-06 3:09 UTC (permalink / raw)
To: Linus Torvalds; +Cc: linux-kernel
This header ends up getting included by uClibc (though nothing in it is
used), so this protection is necessary to avoid problems with kernel-only
typedefs.
diff -ruN -X../cludes linux-2.5.69-uc0/include/asm-v850/nb85e_cache.h linux-2.5.69-uc0-v850-20030506/include/asm-v850/nb85e_cache.h
--- linux-2.5.69-uc0/include/asm-v850/nb85e_cache.h 2003-04-21 10:53:17.000000000 +0900
+++ linux-2.5.69-uc0-v850-20030506/include/asm-v850/nb85e_cache.h 2003-05-06 10:40:26.000000000 +0900
@@ -35,7 +35,7 @@
#define L1_CACHE_BYTES NB85E_CACHE_LINE_SIZE
-#ifndef __ASSEMBLY__
+#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
/* Set caching params via the BHC and DCC registers. */
void nb85e_cache_enable (u16 bhc, u16 dcc);
@@ -73,6 +74,6 @@
#define flush_icache_user_range nb85e_cache_flush_icache_user_range
#define flush_cache_sigtramp nb85e_cache_flush_sigtramp
-#endif /* !__ASSEMBLY__ */
+#endif /* __KERNEL__ && !__ASSEMBLY__ */
#endif /* __V850_NB85E_CACHE_H__ */
^ permalink raw reply [flat|nested] 2+ messages in thread
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