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* Double Interrupt with HT
@ 2003-12-15 14:58 Miroslaw KLABA
  2003-12-15 17:16 ` Herbert Poetzl
  2003-12-16 19:31 ` john stultz
  0 siblings, 2 replies; 16+ messages in thread
From: Miroslaw KLABA @ 2003-12-15 14:58 UTC (permalink / raw)
  To: linux-kernel

Hello,

I've got a problem while using Hyper-Threading on a motherboard with Via P4M266A
chipset with 2.4.23 kernel.
Without SMP enabled, I've got no problem with this chip, but when I enable SMP, the
clock runs twice the speed, and interrupts are handled by both virtual CPUs, instead of
the first one, like on other servers I run.
I haven't got this problem with other chips but with this Via chip. There is no special thing
in dmesg.
Have you an idea from what the problem comes? I haven't found any patch for this type
of problem.

Thanks
Miro


# cat /proc/interrupts 
           CPU0       CPU1       
  0:     675819     675759    IO-APIC-edge  timer
  1:         60         60    IO-APIC-edge  keyboard
  2:          0          0          XT-PIC  cascade
  4:         16         16    IO-APIC-edge  serial
  8:          1          1    IO-APIC-edge  rtc
 14:       5859       5859    IO-APIC-edge  ide0
 23:     248484     134979   IO-APIC-level  eth0
NMI:          0          0 
LOC:     675742     675741 
ERR:          0
MIS:          0

#dmesg
Linux version 2.4.23 (root@xxx) (gcc version 2.96 20000731 (Red Hat Linux 7.1 2.96-98)) #1 SMP lun déc 1 21:52:33 CET 2003
BIOS-provided physical RAM map:
 BIOS-e820: 0000000000000000 - 00000000000a0000 (usable)
 BIOS-e820: 00000000000f0000 - 0000000000100000 (reserved)
 BIOS-e820: 0000000000100000 - 000000001dff0000 (usable)
 BIOS-e820: 000000001dff0000 - 000000001dff3000 (ACPI NVS)
 BIOS-e820: 000000001dff3000 - 000000001e000000 (ACPI data)
 BIOS-e820: 00000000fec00000 - 0000000100000000 (reserved)
0MB HIGHMEM available.
479MB LOWMEM available.
found SMP MP-table at 000f5410
hm, page 000f5000 reserved twice.
hm, page 000f6000 reserved twice.
hm, page 000f0000 reserved twice.
hm, page 000f1000 reserved twice.
On node 0 totalpages: 122864
zone(0): 4096 pages.
zone(1): 118768 pages.
zone(2): 0 pages.
ACPI: RSDP (v000 VIAP4X                                    ) @ 0x000f6dc0
ACPI: RSDT (v001 VIAP4X AWRDACPI 0x42302e31 AWRD 0x00000000) @ 0x1dff3000
ACPI: FADT (v001 VIAP4X AWRDACPI 0x42302e31 AWRD 0x00000000) @ 0x1dff3040
ACPI: MADT (v001 VIAP4X AWRDACPI 0x42302e31 AWRD 0x00000000) @ 0x1dff6d80
ACPI: DSDT (v001 VIAP4X AWRDACPI 0x00001000 MSFT 0x0100000d) @ 0x00000000
ACPI: Local APIC address 0xfee00000
ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled)
Processor #0 Pentium 4(tm) XEON(tm) APIC version 20
ACPI: LAPIC (acpi_id[0x01] lapic_id[0x01] enabled)
Processor #1 Pentium 4(tm) XEON(tm) APIC version 20
Using ACPI for processor (LAPIC) configuration information
Intel MultiProcessor Specification v1.4
    Virtual Wire compatibility mode.
OEM ID: OEM00000 Product ID: PROD00000000 APIC at: 0xFEE00000
I/O APIC #2 Version 17 at 0xFEC00000.
Enabling APIC mode: Flat.       Using 1 I/O APICs
Processors: 2
Kernel command line: auto BOOT_IMAGE=linux-bi ro root=301 BOOT_FILE=/boot/bzImage-2.4.23-bipiv nousb
Initializing CPU#0
Detected 3064.187 MHz processor.
Console: colour VGA+ 80x25
Calibrating delay loop... 6107.95 BogoMIPS
Memory: 482512k/491456k available (1536k kernel code, 8560k reserved, 386k data, 304k init, 0k highmem)
Dentry cache hash table entries: 65536 (order: 7, 524288 bytes)
Inode cache hash table entries: 32768 (order: 6, 262144 bytes)
Mount cache hash table entries: 512 (order: 0, 4096 bytes)
Buffer cache hash table entries: 32768 (order: 5, 131072 bytes)
Page-cache hash table entries: 131072 (order: 7, 524288 bytes)
CPU: Trace cache: 12K uops, L1 D cache: 8K
CPU: L2 cache: 512K
CPU: Physical Processor ID: 0
Intel machine check architecture supported.
Intel machine check reporting enabled on CPU#0.
CPU:     After generic, caps: bfebfbff 00000000 00000000 00000000
CPU:             Common caps: bfebfbff 00000000 00000000 00000000
Enabling fast FPU save and restore... done.
Enabling unmasked SIMD FPU exception support... done.
Checking 'hlt' instruction... OK.
POSIX conformance testing by UNIFIX
CPU: Trace cache: 12K uops, L1 D cache: 8K
CPU: L2 cache: 512K
CPU: Physical Processor ID: 0
Intel machine check reporting enabled on CPU#0.
CPU:     After generic, caps: bfebfbff 00000000 00000000 00000000
CPU:             Common caps: bfebfbff 00000000 00000000 00000000
CPU0: Intel(R) Pentium(R) 4 CPU 3.06GHz stepping 07
per-CPU timeslice cutoff: 1462.76 usecs.
enabled ExtINT on CPU#0
ESR value before enabling vector: 00000000
ESR value after enabling vector: 00000000
Booting processor 1/1 eip 2000
Initializing CPU#1
masked ExtINT on CPU#1
ESR value before enabling vector: 00000000
ESR value after enabling vector: 00000000
Calibrating delay loop... 6121.06 BogoMIPS
CPU: Trace cache: 12K uops, L1 D cache: 8K
CPU: L2 cache: 512K
CPU: Physical Processor ID: 0
Intel machine check reporting enabled on CPU#1.
CPU:     After generic, caps: bfebfbff 00000000 00000000 00000000
CPU:             Common caps: bfebfbff 00000000 00000000 00000000
CPU1: Intel(R) Pentium(R) 4 CPU 3.06GHz stepping 07
Total of 2 processors activated (12229.01 BogoMIPS).
cpu_sibling_map[0] = 1
cpu_sibling_map[1] = 0
ENABLING IO-APIC IRQs
Setting 2 in the phys_id_present_map
...changing IO-APIC physical APIC ID to 2 ... ok.
init IO_APIC IRQs
 IO-APIC (apicid-pin) 2-0, 2-5, 2-7, 2-12, 2-17, 2-18, 2-20 not connected.
..TIMER: vector=0x31 pin1=2 pin2=0
number of MP IRQ sources: 21.
number of IO-APIC #2 registers: 24.
testing the IO APIC.......................

IO APIC #2......
.... register #00: 02000000
.......    : physical APIC id: 02
.......    : Delivery Type: 0
.......    : LTS          : 0
.... register #01: 00178003
.......     : max redirection entries: 0017
.......     : PRQ implemented: 1
.......     : IO APIC version: 0003
.... IRQ redirection table:
 NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect:   
 00 000 00  1    0    0   0   0    0    0    00
 01 003 03  0    0    0   0   0    1    1    39
 02 003 03  0    0    0   0   0    1    1    31
 03 003 03  0    0    0   0   0    1    1    41
 04 003 03  0    0    0   0   0    1    1    49
 05 000 00  1    0    0   0   0    0    0    00
 06 003 03  0    0    0   0   0    1    1    51
 07 000 00  1    0    0   0   0    0    0    00
 08 003 03  0    0    0   0   0    1    1    59
 09 003 03  0    0    0   0   0    1    1    61
 0a 003 03  0    0    0   0   0    1    1    69
 0b 003 03  1    1    0   1   0    1    1    71
 0c 000 00  1    0    0   0   0    0    0    00
 0d 003 03  0    0    0   0   0    1    1    79
 0e 003 03  0    0    0   0   0    1    1    81
 0f 003 03  0    0    0   0   0    1    1    89
 10 003 03  1    1    0   1   0    1    1    91
 11 000 00  1    0    0   0   0    0    0    00
 12 000 00  1    0    0   0   0    0    0    00
 13 003 03  1    1    0   1   0    1    1    99
 14 000 00  1    0    0   0   0    0    0    00
 15 003 03  1    1    0   1   0    1    1    A1
 16 003 03  1    1    0   1   0    1    1    A9
 17 003 03  1    1    0   1   0    1    1    B1
IRQ to pin mappings:
IRQ0 -> 0:2
IRQ1 -> 0:1
IRQ3 -> 0:3
IRQ4 -> 0:4
IRQ6 -> 0:6
IRQ8 -> 0:8
IRQ9 -> 0:9
IRQ10 -> 0:10
IRQ11 -> 0:11
IRQ13 -> 0:13
IRQ14 -> 0:14
IRQ15 -> 0:15
IRQ16 -> 0:16
IRQ19 -> 0:19
IRQ21 -> 0:21
IRQ22 -> 0:22
IRQ23 -> 0:23
.................................... done.
Using local APIC timer interrupts.
calibrating APIC timer ...
..... CPU clock speed is 3064.1412 MHz.
..... host bus clock speed is 133.2235 MHz.
cpu: 0, clocks: 1332235, slice: 444078
CPU0<T0:1332224,T1:888144,D:2,S:444078,C:1332235>
cpu: 1, clocks: 1332235, slice: 444078
CPU1<T0:1332224,T1:444064,D:4,S:444078,C:1332235>
checking TSC synchronization across CPUs: passed.
Waiting on wait_init_idle (map = 0x2)
All processors have done init_idle
PCI: PCI BIOS revision 2.10 entry at 0xfb510, last bus=1
PCI: Using configuration type 1
PCI: Probing PCI hardware
PCI: Probing PCI hardware (bus 00)
PCI: Using IRQ router VIA [1106/3177] at 00:11.0
PCI->APIC IRQ transform: (B0,I16,P0) -> 21
PCI->APIC IRQ transform: (B0,I16,P1) -> 21
PCI->APIC IRQ transform: (B0,I16,P2) -> 21
PCI->APIC IRQ transform: (B0,I16,P3) -> 19
PCI->APIC IRQ transform: (B0,I17,P0) -> 11
PCI->APIC IRQ transform: (B0,I17,P2) -> 22
PCI->APIC IRQ transform: (B0,I18,P0) -> 23
PCI->APIC IRQ transform: (B1,I0,P0) -> 16
PCI: Via IRQ fixup for 00:10.0, from 11 to 5
PCI: Via IRQ fixup for 00:10.1, from 7 to 5
PCI: Via IRQ fixup for 00:10.2, from 12 to 5
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Initializing RT netlink socket
Starting kswapd
VFS: Disk quotas vdquot_6.5.1
Journalled Block Device driver loaded
pty: 256 Unix98 ptys configured
Serial driver version 5.05c (2001-07-08) with MANY_PORTS SHARE_IRQ SERIAL_PCI enabled
ttyS00 at 0x03f8 (irq = 4) is a 16550A
Real Time Clock Driver v1.10e
Software Watchdog Timer: 0.05, timer margin: 60 sec
Floppy drive(s): fd0 is 1.44M
reset set in interrupt, calling c01a4bf0
floppy0: no floppy controllers found
loop: loaded (max 8 devices)
Intel(R) PRO/1000 Network Driver - version 5.2.20-k1
Copyright (c) 1999-2003 Intel Corporation.
via-rhine.c:v1.10-LK1.1.19  July-12-2003  Written by Donald Becker
  http://www.scyld.com/network/via-rhine.html
eth0: VIA VT6102 Rhine-II at 0xe800, 00:0d:87:5e:d3:b9, IRQ 23.
eth0: MII PHY found at address 1, status 0x786d advertising 05e1 Link 40a1.
Uniform Multi-Platform E-IDE driver Revision: 7.00beta4-2.4
ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
VP_IDE: IDE controller at PCI slot 00:11.1
VP_IDE: chipset revision 6
VP_IDE: not 100% native mode: will probe irqs later
ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
VP_IDE: VIA vt8235 (rev 00) IDE UDMA133 controller on pci00:11.1
    ide0: BM-DMA at 0xdc00-0xdc07, BIOS settings: hda:DMA, hdb:pio
    ide1: BM-DMA at 0xdc08-0xdc0f, BIOS settings: hdc:pio, hdd:pio
hda: IC35L060AVV207-0, ATA DISK drive
blk: queue c038af60, I/O limit 4095Mb (mask 0xffffffff)
ide0 at 0x1f0-0x1f7,0x3f6 on irq 14
hda: attached ide-disk driver.
hda: host protected area => 1
hda: 80418240 sectors (41174 MB) w/1821KiB Cache, CHS=5005/255/63, UDMA(100)
Partition check:
 hda: hda1 hda2 hda3
SCSI subsystem driver Revision: 1.00
md: linear personality registered as nr 1
md: raid0 personality registered as nr 2
md: raid1 personality registered as nr 3
md: raid5 personality registered as nr 4
raid5: measuring checksumming speed
   8regs     :  3566.400 MB/sec
   32regs    :  2193.200 MB/sec
   pIII_sse  :  3942.400 MB/sec
   pII_mmx   :  3625.600 MB/sec
   p5_mmx    :  3546.000 MB/sec
raid5: using function: pIII_sse (3942.400 MB/sec)
md: md driver 0.90.0 MAX_MD_DEVS=256, MD_SB_DISKS=27
md: Autodetecting RAID arrays.
md: autorun ...
md: ... autorun DONE.
Initializing Cryptographic API
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: ICMP, UDP, TCP, IGMP
IP: routing cache hash table of 4096 buckets, 32Kbytes
TCP: Hash tables configured (established 32768 bind 32768)
IPv4 over IPv4 tunneling driver
ip_conntrack version 2.1 (3839 buckets, 30712 max) - 292 bytes per conntrack
ip_tables: (C) 2000-2002 Netfilter core team
NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
kjournald starting.  Commit interval 5 seconds
EXT3-fs: mounted filesystem with ordered data mode.
VFS: Mounted root (ext3 filesystem) readonly.
Freeing unused kernel memory: 304k freed
Adding Swap: 522104k swap-space (priority -1)
EXT3 FS 2.4-0.9.19, 19 August 2002 on ide0(3,1), internal journal
kjournald starting.  Commit interval 5 seconds
EXT3 FS 2.4-0.9.19, 19 August 2002 on ide0(3,2), internal journal
EXT3-fs: mounted filesystem with ordered data mode.





^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: Double Interrupt with HT
  2003-12-15 14:58 Double Interrupt with HT Miroslaw KLABA
@ 2003-12-15 17:16 ` Herbert Poetzl
  2003-12-15 17:31   ` Miroslaw KLABA
  2003-12-16 19:31 ` john stultz
  1 sibling, 1 reply; 16+ messages in thread
From: Herbert Poetzl @ 2003-12-15 17:16 UTC (permalink / raw)
  To: Miroslaw KLABA; +Cc: linux-kernel

On Mon, Dec 15, 2003 at 03:58:43PM +0100, Miroslaw KLABA wrote:
> Hello,
> 
> I've got a problem while using Hyper-Threading on a motherboard with Via P4M266A
> chipset with 2.4.23 kernel.
> Without SMP enabled, I've got no problem with this chip, but when I enable SMP, the
> clock runs twice the speed, and interrupts are handled by both virtual CPUs, instead of
> the first one, like on other servers I run.
> I haven't got this problem with other chips but with this Via chip. There is no special thing
> in dmesg.
> Have you an idea from what the problem comes? I haven't found any patch for this type
> of problem.

hmm, you could try 

 # echo "1" >/proc/irq/0/smp_affinity

which should stop the second 'cpu' from
handling the timer interrupts ...

but this doesn't explain the 2x clock,
which probably is some bug ...

HTH,
Herbert

> Thanks
> Miro
> 
> 
> # cat /proc/interrupts 
>            CPU0       CPU1       
>   0:     675819     675759    IO-APIC-edge  timer
>   1:         60         60    IO-APIC-edge  keyboard
>   2:          0          0          XT-PIC  cascade
>   4:         16         16    IO-APIC-edge  serial
>   8:          1          1    IO-APIC-edge  rtc
>  14:       5859       5859    IO-APIC-edge  ide0
>  23:     248484     134979   IO-APIC-level  eth0
> NMI:          0          0 
> LOC:     675742     675741 
> ERR:          0
> MIS:          0
> 
> #dmesg
> Linux version 2.4.23 (root@xxx) (gcc version 2.96 20000731 (Red Hat Linux 7.1 2.96-98)) #1 SMP lun déc 1 21:52:33 CET 2003
> BIOS-provided physical RAM map:
>  BIOS-e820: 0000000000000000 - 00000000000a0000 (usable)
>  BIOS-e820: 00000000000f0000 - 0000000000100000 (reserved)
>  BIOS-e820: 0000000000100000 - 000000001dff0000 (usable)
>  BIOS-e820: 000000001dff0000 - 000000001dff3000 (ACPI NVS)
>  BIOS-e820: 000000001dff3000 - 000000001e000000 (ACPI data)
>  BIOS-e820: 00000000fec00000 - 0000000100000000 (reserved)
> 0MB HIGHMEM available.
> 479MB LOWMEM available.
> found SMP MP-table at 000f5410
> hm, page 000f5000 reserved twice.
> hm, page 000f6000 reserved twice.
> hm, page 000f0000 reserved twice.
> hm, page 000f1000 reserved twice.
> On node 0 totalpages: 122864
> zone(0): 4096 pages.
> zone(1): 118768 pages.
> zone(2): 0 pages.
> ACPI: RSDP (v000 VIAP4X                                    ) @ 0x000f6dc0
> ACPI: RSDT (v001 VIAP4X AWRDACPI 0x42302e31 AWRD 0x00000000) @ 0x1dff3000
> ACPI: FADT (v001 VIAP4X AWRDACPI 0x42302e31 AWRD 0x00000000) @ 0x1dff3040
> ACPI: MADT (v001 VIAP4X AWRDACPI 0x42302e31 AWRD 0x00000000) @ 0x1dff6d80
> ACPI: DSDT (v001 VIAP4X AWRDACPI 0x00001000 MSFT 0x0100000d) @ 0x00000000
> ACPI: Local APIC address 0xfee00000
> ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled)
> Processor #0 Pentium 4(tm) XEON(tm) APIC version 20
> ACPI: LAPIC (acpi_id[0x01] lapic_id[0x01] enabled)
> Processor #1 Pentium 4(tm) XEON(tm) APIC version 20
> Using ACPI for processor (LAPIC) configuration information
> Intel MultiProcessor Specification v1.4
>     Virtual Wire compatibility mode.
> OEM ID: OEM00000 Product ID: PROD00000000 APIC at: 0xFEE00000
> I/O APIC #2 Version 17 at 0xFEC00000.
> Enabling APIC mode: Flat.       Using 1 I/O APICs
> Processors: 2
> Kernel command line: auto BOOT_IMAGE=linux-bi ro root=301 BOOT_FILE=/boot/bzImage-2.4.23-bipiv nousb
> Initializing CPU#0
> Detected 3064.187 MHz processor.
> Console: colour VGA+ 80x25
> Calibrating delay loop... 6107.95 BogoMIPS
> Memory: 482512k/491456k available (1536k kernel code, 8560k reserved, 386k data, 304k init, 0k highmem)
> Dentry cache hash table entries: 65536 (order: 7, 524288 bytes)
> Inode cache hash table entries: 32768 (order: 6, 262144 bytes)
> Mount cache hash table entries: 512 (order: 0, 4096 bytes)
> Buffer cache hash table entries: 32768 (order: 5, 131072 bytes)
> Page-cache hash table entries: 131072 (order: 7, 524288 bytes)
> CPU: Trace cache: 12K uops, L1 D cache: 8K
> CPU: L2 cache: 512K
> CPU: Physical Processor ID: 0
> Intel machine check architecture supported.
> Intel machine check reporting enabled on CPU#0.
> CPU:     After generic, caps: bfebfbff 00000000 00000000 00000000
> CPU:             Common caps: bfebfbff 00000000 00000000 00000000
> Enabling fast FPU save and restore... done.
> Enabling unmasked SIMD FPU exception support... done.
> Checking 'hlt' instruction... OK.
> POSIX conformance testing by UNIFIX
> CPU: Trace cache: 12K uops, L1 D cache: 8K
> CPU: L2 cache: 512K
> CPU: Physical Processor ID: 0
> Intel machine check reporting enabled on CPU#0.
> CPU:     After generic, caps: bfebfbff 00000000 00000000 00000000
> CPU:             Common caps: bfebfbff 00000000 00000000 00000000
> CPU0: Intel(R) Pentium(R) 4 CPU 3.06GHz stepping 07
> per-CPU timeslice cutoff: 1462.76 usecs.
> enabled ExtINT on CPU#0
> ESR value before enabling vector: 00000000
> ESR value after enabling vector: 00000000
> Booting processor 1/1 eip 2000
> Initializing CPU#1
> masked ExtINT on CPU#1
> ESR value before enabling vector: 00000000
> ESR value after enabling vector: 00000000
> Calibrating delay loop... 6121.06 BogoMIPS
> CPU: Trace cache: 12K uops, L1 D cache: 8K
> CPU: L2 cache: 512K
> CPU: Physical Processor ID: 0
> Intel machine check reporting enabled on CPU#1.
> CPU:     After generic, caps: bfebfbff 00000000 00000000 00000000
> CPU:             Common caps: bfebfbff 00000000 00000000 00000000
> CPU1: Intel(R) Pentium(R) 4 CPU 3.06GHz stepping 07
> Total of 2 processors activated (12229.01 BogoMIPS).
> cpu_sibling_map[0] = 1
> cpu_sibling_map[1] = 0
> ENABLING IO-APIC IRQs
> Setting 2 in the phys_id_present_map
> ...changing IO-APIC physical APIC ID to 2 ... ok.
> init IO_APIC IRQs
>  IO-APIC (apicid-pin) 2-0, 2-5, 2-7, 2-12, 2-17, 2-18, 2-20 not connected.
> ..TIMER: vector=0x31 pin1=2 pin2=0
> number of MP IRQ sources: 21.
> number of IO-APIC #2 registers: 24.
> testing the IO APIC.......................
> 
> IO APIC #2......
> .... register #00: 02000000
> .......    : physical APIC id: 02
> .......    : Delivery Type: 0
> .......    : LTS          : 0
> .... register #01: 00178003
> .......     : max redirection entries: 0017
> .......     : PRQ implemented: 1
> .......     : IO APIC version: 0003
> .... IRQ redirection table:
>  NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect:   
>  00 000 00  1    0    0   0   0    0    0    00
>  01 003 03  0    0    0   0   0    1    1    39
>  02 003 03  0    0    0   0   0    1    1    31
>  03 003 03  0    0    0   0   0    1    1    41
>  04 003 03  0    0    0   0   0    1    1    49
>  05 000 00  1    0    0   0   0    0    0    00
>  06 003 03  0    0    0   0   0    1    1    51
>  07 000 00  1    0    0   0   0    0    0    00
>  08 003 03  0    0    0   0   0    1    1    59
>  09 003 03  0    0    0   0   0    1    1    61
>  0a 003 03  0    0    0   0   0    1    1    69
>  0b 003 03  1    1    0   1   0    1    1    71
>  0c 000 00  1    0    0   0   0    0    0    00
>  0d 003 03  0    0    0   0   0    1    1    79
>  0e 003 03  0    0    0   0   0    1    1    81
>  0f 003 03  0    0    0   0   0    1    1    89
>  10 003 03  1    1    0   1   0    1    1    91
>  11 000 00  1    0    0   0   0    0    0    00
>  12 000 00  1    0    0   0   0    0    0    00
>  13 003 03  1    1    0   1   0    1    1    99
>  14 000 00  1    0    0   0   0    0    0    00
>  15 003 03  1    1    0   1   0    1    1    A1
>  16 003 03  1    1    0   1   0    1    1    A9
>  17 003 03  1    1    0   1   0    1    1    B1
> IRQ to pin mappings:
> IRQ0 -> 0:2
> IRQ1 -> 0:1
> IRQ3 -> 0:3
> IRQ4 -> 0:4
> IRQ6 -> 0:6
> IRQ8 -> 0:8
> IRQ9 -> 0:9
> IRQ10 -> 0:10
> IRQ11 -> 0:11
> IRQ13 -> 0:13
> IRQ14 -> 0:14
> IRQ15 -> 0:15
> IRQ16 -> 0:16
> IRQ19 -> 0:19
> IRQ21 -> 0:21
> IRQ22 -> 0:22
> IRQ23 -> 0:23
> .................................... done.
> Using local APIC timer interrupts.
> calibrating APIC timer ...
> ..... CPU clock speed is 3064.1412 MHz.
> ..... host bus clock speed is 133.2235 MHz.
> cpu: 0, clocks: 1332235, slice: 444078
> CPU0<T0:1332224,T1:888144,D:2,S:444078,C:1332235>
> cpu: 1, clocks: 1332235, slice: 444078
> CPU1<T0:1332224,T1:444064,D:4,S:444078,C:1332235>
> checking TSC synchronization across CPUs: passed.
> Waiting on wait_init_idle (map = 0x2)
> All processors have done init_idle
> PCI: PCI BIOS revision 2.10 entry at 0xfb510, last bus=1
> PCI: Using configuration type 1
> PCI: Probing PCI hardware
> PCI: Probing PCI hardware (bus 00)
> PCI: Using IRQ router VIA [1106/3177] at 00:11.0
> PCI->APIC IRQ transform: (B0,I16,P0) -> 21
> PCI->APIC IRQ transform: (B0,I16,P1) -> 21
> PCI->APIC IRQ transform: (B0,I16,P2) -> 21
> PCI->APIC IRQ transform: (B0,I16,P3) -> 19
> PCI->APIC IRQ transform: (B0,I17,P0) -> 11
> PCI->APIC IRQ transform: (B0,I17,P2) -> 22
> PCI->APIC IRQ transform: (B0,I18,P0) -> 23
> PCI->APIC IRQ transform: (B1,I0,P0) -> 16
> PCI: Via IRQ fixup for 00:10.0, from 11 to 5
> PCI: Via IRQ fixup for 00:10.1, from 7 to 5
> PCI: Via IRQ fixup for 00:10.2, from 12 to 5
> Linux NET4.0 for Linux 2.4
> Based upon Swansea University Computer Society NET3.039
> Initializing RT netlink socket
> Starting kswapd
> VFS: Disk quotas vdquot_6.5.1
> Journalled Block Device driver loaded
> pty: 256 Unix98 ptys configured
> Serial driver version 5.05c (2001-07-08) with MANY_PORTS SHARE_IRQ SERIAL_PCI enabled
> ttyS00 at 0x03f8 (irq = 4) is a 16550A
> Real Time Clock Driver v1.10e
> Software Watchdog Timer: 0.05, timer margin: 60 sec
> Floppy drive(s): fd0 is 1.44M
> reset set in interrupt, calling c01a4bf0
> floppy0: no floppy controllers found
> loop: loaded (max 8 devices)
> Intel(R) PRO/1000 Network Driver - version 5.2.20-k1
> Copyright (c) 1999-2003 Intel Corporation.
> via-rhine.c:v1.10-LK1.1.19  July-12-2003  Written by Donald Becker
>   http://www.scyld.com/network/via-rhine.html
> eth0: VIA VT6102 Rhine-II at 0xe800, 00:0d:87:5e:d3:b9, IRQ 23.
> eth0: MII PHY found at address 1, status 0x786d advertising 05e1 Link 40a1.
> Uniform Multi-Platform E-IDE driver Revision: 7.00beta4-2.4
> ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
> VP_IDE: IDE controller at PCI slot 00:11.1
> VP_IDE: chipset revision 6
> VP_IDE: not 100% native mode: will probe irqs later
> ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
> VP_IDE: VIA vt8235 (rev 00) IDE UDMA133 controller on pci00:11.1
>     ide0: BM-DMA at 0xdc00-0xdc07, BIOS settings: hda:DMA, hdb:pio
>     ide1: BM-DMA at 0xdc08-0xdc0f, BIOS settings: hdc:pio, hdd:pio
> hda: IC35L060AVV207-0, ATA DISK drive
> blk: queue c038af60, I/O limit 4095Mb (mask 0xffffffff)
> ide0 at 0x1f0-0x1f7,0x3f6 on irq 14
> hda: attached ide-disk driver.
> hda: host protected area => 1
> hda: 80418240 sectors (41174 MB) w/1821KiB Cache, CHS=5005/255/63, UDMA(100)
> Partition check:
>  hda: hda1 hda2 hda3
> SCSI subsystem driver Revision: 1.00
> md: linear personality registered as nr 1
> md: raid0 personality registered as nr 2
> md: raid1 personality registered as nr 3
> md: raid5 personality registered as nr 4
> raid5: measuring checksumming speed
>    8regs     :  3566.400 MB/sec
>    32regs    :  2193.200 MB/sec
>    pIII_sse  :  3942.400 MB/sec
>    pII_mmx   :  3625.600 MB/sec
>    p5_mmx    :  3546.000 MB/sec
> raid5: using function: pIII_sse (3942.400 MB/sec)
> md: md driver 0.90.0 MAX_MD_DEVS=256, MD_SB_DISKS=27
> md: Autodetecting RAID arrays.
> md: autorun ...
> md: ... autorun DONE.
> Initializing Cryptographic API
> NET4: Linux TCP/IP 1.0 for NET4.0
> IP Protocols: ICMP, UDP, TCP, IGMP
> IP: routing cache hash table of 4096 buckets, 32Kbytes
> TCP: Hash tables configured (established 32768 bind 32768)
> IPv4 over IPv4 tunneling driver
> ip_conntrack version 2.1 (3839 buckets, 30712 max) - 292 bytes per conntrack
> ip_tables: (C) 2000-2002 Netfilter core team
> NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
> kjournald starting.  Commit interval 5 seconds
> EXT3-fs: mounted filesystem with ordered data mode.
> VFS: Mounted root (ext3 filesystem) readonly.
> Freeing unused kernel memory: 304k freed
> Adding Swap: 522104k swap-space (priority -1)
> EXT3 FS 2.4-0.9.19, 19 August 2002 on ide0(3,1), internal journal
> kjournald starting.  Commit interval 5 seconds
> EXT3 FS 2.4-0.9.19, 19 August 2002 on ide0(3,2), internal journal
> EXT3-fs: mounted filesystem with ordered data mode.
> 
> 
> 
> 
> -
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at  http://www.tux.org/lkml/

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: Double Interrupt with HT
  2003-12-15 17:16 ` Herbert Poetzl
@ 2003-12-15 17:31   ` Miroslaw KLABA
  0 siblings, 0 replies; 16+ messages in thread
From: Miroslaw KLABA @ 2003-12-15 17:31 UTC (permalink / raw)
  To: Herbert Poetzl; +Cc: linux-kernel

>  # echo "1" >/proc/irq/0/smp_affinity
> 
> which should stop the second 'cpu' from
> handling the timer interrupts ...
> 
> but this doesn't explain the 2x clock,
> which probably is some bug ...
> 
> HTH,
> Herbert
Thanks but already done. It must be a bug in 2.4.23, because with 2.6.0-test11,
I don't have any problem...

How may one find this bug?

Thanks.
Miro

# lspci -v
00:00.0 Host bridge: VIA Technologies, Inc. P4M266 Host Bridge
        Subsystem: VIA Technologies, Inc. P4M266 Host Bridge
        Flags: bus master, 66Mhz, medium devsel, latency 8
        Memory at e8000000 (32-bit, prefetchable) [size=64M]
        Capabilities: [a0] AGP version 2.0
        Capabilities: [c0] Power Management version 2

00:01.0 PCI bridge: VIA Technologies, Inc. VT8633 [Apollo Pro266 AGP] (prog-if 00 [Normal decode])
        Flags: bus master, 66Mhz, medium devsel, latency 0
        Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
        Memory behind bridge: ec000000-edffffff
        Prefetchable memory behind bridge: e0000000-e7ffffff
        Capabilities: [80] Power Management version 2

00:10.0 USB Controller: VIA Technologies, Inc. USB (rev 80) (prog-if 00 [UHCI])
        Subsystem: VIA Technologies, Inc. USB
        Flags: bus master, medium devsel, latency 32, IRQ 21
        I/O ports at d000 [size=32]
        Capabilities: [80] Power Management version 2

00:10.1 USB Controller: VIA Technologies, Inc. USB (rev 80) (prog-if 00 [UHCI])
        Subsystem: VIA Technologies, Inc. USB
        Flags: bus master, medium devsel, latency 32, IRQ 21
        I/O ports at d400 [size=32]
        Capabilities: [80] Power Management version 2

00:10.2 USB Controller: VIA Technologies, Inc. USB (rev 80) (prog-if 00 [UHCI])
        Subsystem: VIA Technologies, Inc. USB
        Flags: bus master, medium devsel, latency 32, IRQ 21
        I/O ports at d800 [size=32]
        Capabilities: [80] Power Management version 2

00:10.3 USB Controller: VIA Technologies, Inc. USB 2.0 (rev 82) (prog-if 20 [EHCI])
        Subsystem: VIA Technologies, Inc. USB 2.0
        Flags: bus master, medium devsel, latency 32, IRQ 19
        Memory at ee000000 (32-bit, non-prefetchable) [size=256]
        Capabilities: [80] Power Management version 2

00:11.0 ISA bridge: VIA Technologies, Inc. VT8235 ISA Bridge
        Subsystem: VIA Technologies, Inc. VT8235 ISA Bridge
        Flags: bus master, stepping, medium devsel, latency 0
        Capabilities: [c0] Power Management version 2

00:11.1 IDE interface: VIA Technologies, Inc. VT82C586A/B/VT82C686/A/B/VT8233/A/C/VT8235 PIPC Bus Master IDE (rev 06) (prog-if 8a [Master SecP PriP])
        Subsystem: VIA Technologies, Inc. VT82C586/B/VT82C686/A/B/VT8233/A/C/VT8235 PIPC Bus Master IDE
        Flags: bus master, medium devsel, latency 32, IRQ 11
        I/O ports at dc00 [size=16]
        Capabilities: [c0] Power Management version 2

00:11.5 Multimedia audio controller: VIA Technologies, Inc. VT8233/A/8235 AC97 Audio Controller (rev 50)
        Subsystem: VIA Technologies, Inc.: Unknown device 4161
        Flags: medium devsel, IRQ 22
        I/O ports at e000 [size=256]
        Capabilities: [c0] Power Management version 2

00:12.0 Ethernet controller: VIA Technologies, Inc. VT6102 [Rhine-II] (rev 74)
        Subsystem: VIA Technologies, Inc. VT6102 [Rhine II] Embeded Ethernet Controller on VT8235
        Flags: bus master, medium devsel, latency 32, IRQ 23
        I/O ports at e800 [size=256]
        Memory at ee001000 (32-bit, non-prefetchable) [size=256]
        Capabilities: [40] Power Management version 2

01:00.0 VGA compatible controller: S3 Inc. VT8375 [ProSavage8 KM266/KL266] (prog-if 00 [VGA])
        Subsystem: S3 Inc. VT8375 [ProSavage8 KM266/KL266]
        Flags: bus master, 66Mhz, medium devsel, latency 32, IRQ 16
        Memory at ed000000 (32-bit, non-prefetchable) [size=512K]
        Memory at e0000000 (32-bit, prefetchable) [size=128M]
        Expansion ROM at <unassigned> [disabled] [size=64K]
        Capabilities: [dc] Power Management version 2
        Capabilities: [80] AGP version 2.0


^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: Double Interrupt with HT
  2003-12-15 14:58 Double Interrupt with HT Miroslaw KLABA
  2003-12-15 17:16 ` Herbert Poetzl
@ 2003-12-16 19:31 ` john stultz
  2003-12-16 22:55   ` Miroslaw KLABA
  1 sibling, 1 reply; 16+ messages in thread
From: john stultz @ 2003-12-16 19:31 UTC (permalink / raw)
  To: Miroslaw KLABA; +Cc: lkml

On Mon, 2003-12-15 at 06:58, Miroslaw KLABA wrote:
> I've got a problem while using Hyper-Threading on a motherboard with Via P4M266A
> chipset with 2.4.23 kernel.

Could you try to narrow down when the problem first appeared? Was it not
seen in 2.4.23-pre3 but showed up in 2.4.23-rc1? The narrower the
better. 

thanks
-john




^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: Double Interrupt with HT
  2003-12-16 19:31 ` john stultz
@ 2003-12-16 22:55   ` Miroslaw KLABA
  2003-12-16 23:50     ` john stultz
  0 siblings, 1 reply; 16+ messages in thread
From: Miroslaw KLABA @ 2003-12-16 22:55 UTC (permalink / raw)
  To: john stultz; +Cc: lkml

Hello,

I had the problem with 2.4.22, 2.4.22-ac4, 2.4.23 and 2.4.24-pre1.
The problem is that all the kernel is working "twice the speed".
The command "while true; do date; sleep 1; done;" shows that the date is growing
2 seconds per second... :/
I found a patch for irqbalance for 2.4.23, and now I don't have the problem 
anymore with the clock.
http://www.hardrock.org/kernel/2.4.23/irqbalance-2.4.23-jb.patch

With 2.6.0-test11, I didn't have any problem, but we can't switch to 2.6.0 yet
production.
I think it is a bug with the via chipset, but I'm not able to get deeper in the
kernel code.

Thanks
Miro






Quoting john stultz <johnstul@us.ibm.com>:

> On Mon, 2003-12-15 at 06:58, Miroslaw KLABA wrote:
> > I've got a problem while using Hyper-Threading on a motherboard with Via
> P4M266A
> > chipset with 2.4.23 kernel.
> 
> Could you try to narrow down when the problem first appeared? Was it not
> seen in 2.4.23-pre3 but showed up in 2.4.23-rc1? The narrower the
> better. 
> 
> thanks
> -john
> 
> 
> 
> -
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at  http://www.tux.org/lkml/
> 



^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: Double Interrupt with HT
  2003-12-16 22:55   ` Miroslaw KLABA
@ 2003-12-16 23:50     ` john stultz
  2003-12-17  3:03       ` Miroslaw KLABA
  0 siblings, 1 reply; 16+ messages in thread
From: john stultz @ 2003-12-16 23:50 UTC (permalink / raw)
  To: Miroslaw KLABA; +Cc: lkml

On Tue, 2003-12-16 at 14:55, Miroslaw KLABA wrote:
> I had the problem with 2.4.22, 2.4.22-ac4, 2.4.23 and 2.4.24-pre1.

Ok, so its been around awhile. Do you remember what was the last 2.4
kernel where you did not see this problem?

> The problem is that all the kernel is working "twice the speed".
> The command "while true; do date; sleep 1; done;" shows that the date is growing
> 2 seconds per second... :/
> I found a patch for irqbalance for 2.4.23, and now I don't have the problem 
> anymore with the clock.
> http://www.hardrock.org/kernel/2.4.23/irqbalance-2.4.23-jb.patch

Hmm. Just skimming that patch, I notice it won't work on clustered apic
systems. They've dropped the following chunk from set_ioapic_affinity
and forgot to re-add it.

-	/* pick a single cpu for clustered xapics */
-	if(clustered_apic_mode == CLUSTERED_APIC_XAPIC){
-		int cpu = ffs(mask)-1;
-		mask = cpu_to_physical_apicid(cpu);
-	}

Further I can't see how it fixes the problem, but it may just be working
around the issue. I'd be interested in what the patch author thinks. 

> I think it is a bug with the via chipset, but I'm not able to get deeper in the
> kernel code.

Could be, but I suspect interrupt routing isn't happening properly at
boot time. The irqbalance code just forces it to be readjusted correctly
once your up and running. 

thanks
-john



^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: Double Interrupt with HT
  2003-12-16 23:50     ` john stultz
@ 2003-12-17  3:03       ` Miroslaw KLABA
  2003-12-18  3:22         ` john stultz
  0 siblings, 1 reply; 16+ messages in thread
From: Miroslaw KLABA @ 2003-12-17  3:03 UTC (permalink / raw)
  To: john stultz; +Cc: lkml

Hello,

> Ok, so its been around awhile. Do you remember what was the last 2.4
> kernel where you did not see this problem?
> 

In fact, it is a new motherboard we're testing, and with the oldest version of
the kernel I have, 2.4.18, I have also the problem.

> Further I can't see how it fixes the problem, but it may just be working
> around the issue. I'd be interested in what the patch author thinks. 
> 
> > I think it is a bug with the via chipset, but I'm not able to get deeper in
> the
> > kernel code.
> 
> Could be, but I suspect interrupt routing isn't happening properly at
> boot time. The irqbalance code just forces it to be readjusted correctly
> once your up and running. 
> 

With SMP disabled, I have no problem with any kernel. So it must be in the APIC
init, I think.
I don't know how the patch works around this problem, but it's a workaround. I
can test other kernels to find a "better" patch to find and fix this problem,
and have a stable 2.4.24 that works with this hardware.
If you can suggest other things to test or to identify the problem, I can do it.

Thanks
Miro

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: Double Interrupt with HT
  2003-12-17  3:03       ` Miroslaw KLABA
@ 2003-12-18  3:22         ` john stultz
  2003-12-18 12:14           ` Miroslaw KLABA
  0 siblings, 1 reply; 16+ messages in thread
From: john stultz @ 2003-12-18  3:22 UTC (permalink / raw)
  To: Miroslaw KLABA; +Cc: lkml

On Tue, 2003-12-16 at 19:03, Miroslaw KLABA wrote:

> > Further I can't see how it fixes the problem, but it may just be working
> > around the issue. I'd be interested in what the patch author thinks. 
> > 
> > > I think it is a bug with the via chipset, but I'm not able to get deeper in
> > the
> > > kernel code.
> > 
> > Could be, but I suspect interrupt routing isn't happening properly at
> > boot time. The irqbalance code just forces it to be readjusted correctly
> > once your up and running. 
> > 
> 
> With SMP disabled, I have no problem with any kernel. So it must be in the APIC
> init, I think.

Does booting w/ "noapic" help?

thanks
-john



^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: Double Interrupt with HT
  2003-12-18  3:22         ` john stultz
@ 2003-12-18 12:14           ` Miroslaw KLABA
  2003-12-18 13:51             ` Zwane Mwaikambo
  0 siblings, 1 reply; 16+ messages in thread
From: Miroslaw KLABA @ 2003-12-18 12:14 UTC (permalink / raw)
  To: john stultz; +Cc: linux-kernel

Hello,

> Does booting w/ "noapic" help?
No, I still have the time that is going twice the speed.
I included /proc/interrupts, dmesg and lspci. It's with the 2.4.23 kernel without the irq_balance patch.
Hope this help.

Thanks.
Miro


# cat /proc/interrupts 
           CPU0       CPU1       
  0:      71181      71121    IO-APIC-edge  timer
  1:          2          2    IO-APIC-edge  keyboard
  2:          0          0          XT-PIC  cascade
  4:         16         16    IO-APIC-edge  serial
  8:          1          1    IO-APIC-edge  rtc
 14:       3294       3295    IO-APIC-edge  ide0
 23:       2334       2339   IO-APIC-level  eth0
NMI:          0          0 
LOC:      71109      71108 
ERR:          0
MIS:          0

#dmesg
Linux version 2.4.23 (root@XXX) (gcc version 2.96 20000731 (Red Hat Linux 7.1 2.96-98)) #1 SMP lun déc 1 21:52:33 CET 2003
BIOS-provided physical RAM map:
 BIOS-e820: 0000000000000000 - 00000000000a0000 (usable)
 BIOS-e820: 00000000000f0000 - 0000000000100000 (reserved)
 BIOS-e820: 0000000000100000 - 000000001dff0000 (usable)
 BIOS-e820: 000000001dff0000 - 000000001dff3000 (ACPI NVS)
 BIOS-e820: 000000001dff3000 - 000000001e000000 (ACPI data)
 BIOS-e820: 00000000fec00000 - 0000000100000000 (reserved)
0MB HIGHMEM available.
479MB LOWMEM available.
found SMP MP-table at 000f5410
hm, page 000f5000 reserved twice.
hm, page 000f6000 reserved twice.
hm, page 000f0000 reserved twice.
hm, page 000f1000 reserved twice.
On node 0 totalpages: 122864
zone(0): 4096 pages.
zone(1): 118768 pages.
zone(2): 0 pages.
ACPI: RSDP (v000 VIAP4X                                    ) @ 0x000f6dc0
ACPI: RSDT (v001 VIAP4X AWRDACPI 0x42302e31 AWRD 0x00000000) @ 0x1dff3000
ACPI: FADT (v001 VIAP4X AWRDACPI 0x42302e31 AWRD 0x00000000) @ 0x1dff3040
ACPI: MADT (v001 VIAP4X AWRDACPI 0x42302e31 AWRD 0x00000000) @ 0x1dff6d80
ACPI: DSDT (v001 VIAP4X AWRDACPI 0x00001000 MSFT 0x0100000d) @ 0x00000000
ACPI: Local APIC address 0xfee00000
ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled)
Processor #0 Pentium 4(tm) XEON(tm) APIC version 20
ACPI: LAPIC (acpi_id[0x01] lapic_id[0x01] enabled)
Processor #1 Pentium 4(tm) XEON(tm) APIC version 20
Using ACPI for processor (LAPIC) configuration information
Intel MultiProcessor Specification v1.4
    Virtual Wire compatibility mode.
OEM ID: OEM00000 Product ID: PROD00000000 APIC at: 0xFEE00000
I/O APIC #2 Version 17 at 0xFEC00000.
Enabling APIC mode: Flat.       Using 1 I/O APICs
Processors: 2
Kernel command line: auto BOOT_IMAGE=linux-bi ro root=301 BOOT_FILE=/boot/bzImage-2.4.23-bipiv noacpi
Initializing CPU#0
Detected 3064.187 MHz processor.
Console: colour VGA+ 80x25
Calibrating delay loop... 6107.95 BogoMIPS
Memory: 482512k/491456k available (1536k kernel code, 8560k reserved, 386k data, 304k init, 0k highmem)
Dentry cache hash table entries: 65536 (order: 7, 524288 bytes)
Inode cache hash table entries: 32768 (order: 6, 262144 bytes)
Mount cache hash table entries: 512 (order: 0, 4096 bytes)
Buffer cache hash table entries: 32768 (order: 5, 131072 bytes)
Page-cache hash table entries: 131072 (order: 7, 524288 bytes)
CPU: Trace cache: 12K uops, L1 D cache: 8K
CPU: L2 cache: 512K
CPU: Physical Processor ID: 0
Intel machine check architecture supported.
Intel machine check reporting enabled on CPU#0.
CPU:     After generic, caps: bfebfbff 00000000 00000000 00000000
CPU:             Common caps: bfebfbff 00000000 00000000 00000000
Enabling fast FPU save and restore... done.
Enabling unmasked SIMD FPU exception support... done.
Checking 'hlt' instruction... OK.
POSIX conformance testing by UNIFIX
CPU: Trace cache: 12K uops, L1 D cache: 8K
CPU: L2 cache: 512K
CPU: Physical Processor ID: 0
Intel machine check reporting enabled on CPU#0.
CPU:     After generic, caps: bfebfbff 00000000 00000000 00000000
CPU:             Common caps: bfebfbff 00000000 00000000 00000000
CPU0: Intel(R) Pentium(R) 4 CPU 3.06GHz stepping 07
per-CPU timeslice cutoff: 1462.76 usecs.
enabled ExtINT on CPU#0
ESR value before enabling vector: 00000000
ESR value after enabling vector: 00000000
Booting processor 1/1 eip 2000
Initializing CPU#1
masked ExtINT on CPU#1
ESR value before enabling vector: 00000000
ESR value after enabling vector: 00000000
Calibrating delay loop... 6121.06 BogoMIPS
CPU: Trace cache: 12K uops, L1 D cache: 8K
CPU: L2 cache: 512K
CPU: Physical Processor ID: 0
Intel machine check reporting enabled on CPU#1.
CPU:     After generic, caps: bfebfbff 00000000 00000000 00000000
CPU:             Common caps: bfebfbff 00000000 00000000 00000000
CPU1: Intel(R) Pentium(R) 4 CPU 3.06GHz stepping 07
Total of 2 processors activated (12229.01 BogoMIPS).
cpu_sibling_map[0] = 1
cpu_sibling_map[1] = 0
ENABLING IO-APIC IRQs
Setting 2 in the phys_id_present_map
...changing IO-APIC physical APIC ID to 2 ... ok.
init IO_APIC IRQs
 IO-APIC (apicid-pin) 2-0, 2-5, 2-7, 2-12, 2-17, 2-18, 2-20 not connected.
..TIMER: vector=0x31 pin1=2 pin2=0
number of MP IRQ sources: 21.
number of IO-APIC #2 registers: 24.
testing the IO APIC.......................

IO APIC #2......
.... register #00: 02000000
.......    : physical APIC id: 02
.......    : Delivery Type: 0
.......    : LTS          : 0
.... register #01: 00178003
.......     : max redirection entries: 0017
.......     : PRQ implemented: 1
.......     : IO APIC version: 0003
.... IRQ redirection table:
 NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect:   
 00 000 00  1    0    0   0   0    0    0    00
 01 003 03  0    0    0   0   0    1    1    39
 02 003 03  0    0    0   0   0    1    1    31
 03 003 03  0    0    0   0   0    1    1    41
 04 003 03  0    0    0   0   0    1    1    49
 05 000 00  1    0    0   0   0    0    0    00
 06 003 03  0    0    0   0   0    1    1    51
 07 000 00  1    0    0   0   0    0    0    00
 08 003 03  0    0    0   0   0    1    1    59
 09 003 03  0    0    0   0   0    1    1    61
 0a 003 03  0    0    0   0   0    1    1    69
 0b 003 03  1    1    0   1   0    1    1    71
 0c 000 00  1    0    0   0   0    0    0    00
 0d 003 03  0    0    0   0   0    1    1    79
 0e 003 03  0    0    0   0   0    1    1    81
 0f 003 03  0    0    0   0   0    1    1    89
 10 003 03  1    1    0   1   0    1    1    91
 11 000 00  1    0    0   0   0    0    0    00
 12 000 00  1    0    0   0   0    0    0    00
 13 003 03  1    1    0   1   0    1    1    99
 14 000 00  1    0    0   0   0    0    0    00
 15 003 03  1    1    0   1   0    1    1    A1
 16 003 03  1    1    0   1   0    1    1    A9
 17 003 03  1    1    0   1   0    1    1    B1
IRQ to pin mappings:
IRQ0 -> 0:2
IRQ1 -> 0:1
IRQ3 -> 0:3
IRQ4 -> 0:4
IRQ6 -> 0:6
IRQ8 -> 0:8
IRQ9 -> 0:9
IRQ10 -> 0:10
IRQ11 -> 0:11
IRQ13 -> 0:13
IRQ14 -> 0:14
IRQ15 -> 0:15
IRQ16 -> 0:16
IRQ19 -> 0:19
IRQ21 -> 0:21
IRQ22 -> 0:22
IRQ23 -> 0:23
.................................... done.
Using local APIC timer interrupts.
calibrating APIC timer ...
..... CPU clock speed is 3063.9864 MHz.
..... host bus clock speed is 133.2168 MHz.
cpu: 0, clocks: 1332168, slice: 444056
CPU0<T0:1332160,T1:888096,D:8,S:444056,C:1332168>
cpu: 1, clocks: 1332168, slice: 444056
CPU1<T0:1332160,T1:444048,D:0,S:444056,C:1332168>
checking TSC synchronization across CPUs: passed.
Waiting on wait_init_idle (map = 0x2)
All processors have done init_idle
PCI: PCI BIOS revision 2.10 entry at 0xfb510, last bus=1
PCI: Using configuration type 1
PCI: Probing PCI hardware
PCI: Probing PCI hardware (bus 00)
PCI: Using IRQ router VIA [1106/3177] at 00:11.0
PCI->APIC IRQ transform: (B0,I16,P0) -> 21
PCI->APIC IRQ transform: (B0,I16,P1) -> 21
PCI->APIC IRQ transform: (B0,I16,P2) -> 21
PCI->APIC IRQ transform: (B0,I16,P3) -> 19
PCI->APIC IRQ transform: (B0,I17,P0) -> 11
PCI->APIC IRQ transform: (B0,I17,P2) -> 22
PCI->APIC IRQ transform: (B0,I18,P0) -> 23
PCI->APIC IRQ transform: (B1,I0,P0) -> 16
PCI: Via IRQ fixup for 00:10.0, from 11 to 5
PCI: Via IRQ fixup for 00:10.1, from 7 to 5
PCI: Via IRQ fixup for 00:10.2, from 12 to 5
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Initializing RT netlink socket
Starting kswapd
VFS: Disk quotas vdquot_6.5.1
Journalled Block Device driver loaded
pty: 256 Unix98 ptys configured
Serial driver version 5.05c (2001-07-08) with MANY_PORTS SHARE_IRQ SERIAL_PCI enabled
ttyS00 at 0x03f8 (irq = 4) is a 16550A
Real Time Clock Driver v1.10e
Software Watchdog Timer: 0.05, timer margin: 60 sec
Floppy drive(s): fd0 is 1.44M
reset set in interrupt, calling c01a4bf0
floppy0: no floppy controllers found
loop: loaded (max 8 devices)
Intel(R) PRO/1000 Network Driver - version 5.2.20-k1
Copyright (c) 1999-2003 Intel Corporation.
via-rhine.c:v1.10-LK1.1.19  July-12-2003  Written by Donald Becker
  http://www.scyld.com/network/via-rhine.html
eth0: VIA VT6102 Rhine-II at 0xe800, 00:0d:87:5e:d3:b9, IRQ 23.
eth0: MII PHY found at address 1, status 0x786d advertising 05e1 Link 40a1.
Uniform Multi-Platform E-IDE driver Revision: 7.00beta4-2.4
ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
VP_IDE: IDE controller at PCI slot 00:11.1
VP_IDE: chipset revision 6
VP_IDE: not 100% native mode: will probe irqs later
ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
VP_IDE: VIA vt8235 (rev 00) IDE UDMA133 controller on pci00:11.1
    ide0: BM-DMA at 0xdc00-0xdc07, BIOS settings: hda:DMA, hdb:pio
    ide1: BM-DMA at 0xdc08-0xdc0f, BIOS settings: hdc:pio, hdd:pio
hda: IC35L060AVV207-0, ATA DISK drive
blk: queue c038af60, I/O limit 4095Mb (mask 0xffffffff)
ide0 at 0x1f0-0x1f7,0x3f6 on irq 14
hda: attached ide-disk driver.
hda: host protected area => 1
hda: 80418240 sectors (41174 MB) w/1821KiB Cache, CHS=5005/255/63, UDMA(100)
Partition check:
 hda: hda1 hda2 hda3
SCSI subsystem driver Revision: 1.00
md: linear personality registered as nr 1
md: raid0 personality registered as nr 2
md: raid1 personality registered as nr 3
md: raid5 personality registered as nr 4
raid5: measuring checksumming speed
   8regs     :  3552.000 MB/sec
   32regs    :  2172.800 MB/sec
   pIII_sse  :  3955.200 MB/sec
   pII_mmx   :  3608.800 MB/sec
   p5_mmx    :  3529.600 MB/sec
raid5: using function: pIII_sse (3955.200 MB/sec)
md: md driver 0.90.0 MAX_MD_DEVS=256, MD_SB_DISKS=27
md: Autodetecting RAID arrays.
md: autorun ...
md: ... autorun DONE.
Initializing Cryptographic API
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: ICMP, UDP, TCP, IGMP
IP: routing cache hash table of 4096 buckets, 32Kbytes
TCP: Hash tables configured (established 32768 bind 32768)
IPv4 over IPv4 tunneling driver
ip_conntrack version 2.1 (3839 buckets, 30712 max) - 292 bytes per conntrack
ip_tables: (C) 2000-2002 Netfilter core team
NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
kjournald starting.  Commit interval 5 seconds
EXT3-fs: mounted filesystem with ordered data mode.
VFS: Mounted root (ext3 filesystem) readonly.
Freeing unused kernel memory: 304k freed
Adding Swap: 522104k swap-space (priority -1)
EXT3 FS 2.4-0.9.19, 19 August 2002 on ide0(3,1), internal journal
kjournald starting.  Commit interval 5 seconds
EXT3 FS 2.4-0.9.19, 19 August 2002 on ide0(3,2), internal journal
EXT3-fs: mounted filesystem with ordered data mode.

#lspci -vv
00:00.0 Host bridge: VIA Technologies, Inc. P4M266 Host Bridge
        Subsystem: VIA Technologies, Inc. P4M266 Host Bridge
        Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
        Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR-
        Latency: 8
        Region 0: Memory at e8000000 (32-bit, prefetchable) [size=64M]
        Capabilities: [a0] AGP version 2.0
                Status: RQ=31 SBA+ 64bit- FW- Rate=x1,x2
                Command: RQ=0 SBA- AGP- 64bit- FW- Rate=<none>
        Capabilities: [c0] Power Management version 2
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
                Status: D0 PME-Enable- DSel=0 DScale=0 PME-

00:01.0 PCI bridge: VIA Technologies, Inc. VT8633 [Apollo Pro266 AGP] (prog-if 00 [Normal decode])
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
        Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR+
        Latency: 0
        Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
        I/O behind bridge: 0000f000-00000fff
        Memory behind bridge: ec000000-edffffff
        Prefetchable memory behind bridge: e0000000-e7ffffff
        BridgeCtl: Parity- SERR- NoISA+ VGA+ MAbort- >Reset- FastB2B-
        Capabilities: [80] Power Management version 2
                Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
                Status: D0 PME-Enable- DSel=0 DScale=0 PME-

00:10.0 USB Controller: VIA Technologies, Inc. USB (rev 80) (prog-if 00 [UHCI])
        Subsystem: VIA Technologies, Inc. USB
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
        Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
        Latency: 32, cache line size 08
        Interrupt: pin A routed to IRQ 21
        Region 4: I/O ports at d000 [size=32]
        Capabilities: [80] Power Management version 2
                Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
                Status: D0 PME-Enable- DSel=0 DScale=0 PME-

00:10.1 USB Controller: VIA Technologies, Inc. USB (rev 80) (prog-if 00 [UHCI])
        Subsystem: VIA Technologies, Inc. USB
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
        Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
        Latency: 32, cache line size 08
        Interrupt: pin B routed to IRQ 21
        Region 4: I/O ports at d400 [size=32]
        Capabilities: [80] Power Management version 2
                Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
                Status: D0 PME-Enable- DSel=0 DScale=0 PME-

00:10.2 USB Controller: VIA Technologies, Inc. USB (rev 80) (prog-if 00 [UHCI])
        Subsystem: VIA Technologies, Inc. USB
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
        Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
        Latency: 32, cache line size 08
        Interrupt: pin C routed to IRQ 21
        Region 4: I/O ports at d800 [size=32]
        Capabilities: [80] Power Management version 2
                Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
                Status: D0 PME-Enable- DSel=0 DScale=0 PME-

00:10.3 USB Controller: VIA Technologies, Inc. USB 2.0 (rev 82) (prog-if 20 [EHCI])
        Subsystem: VIA Technologies, Inc. USB 2.0
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
        Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
        Latency: 32, cache line size 08
        Interrupt: pin D routed to IRQ 19
        Region 0: Memory at ee000000 (32-bit, non-prefetchable) [size=256]
        Capabilities: [80] Power Management version 2
                Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
                Status: D0 PME-Enable- DSel=0 DScale=0 PME-

00:11.0 ISA bridge: VIA Technologies, Inc. VT8235 ISA Bridge
        Subsystem: VIA Technologies, Inc. VT8235 ISA Bridge
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B-
        Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
        Latency: 0
        Capabilities: [c0] Power Management version 2
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
                Status: D0 PME-Enable- DSel=0 DScale=0 PME-

00:11.1 IDE interface: VIA Technologies, Inc. VT82C586A/B/VT82C686/A/B/VT8233/A/C/VT8235 PIPC Bus Master IDE (rev 06) (prog-if 8a [Master SecP PriP])
        Subsystem: VIA Technologies, Inc. VT82C586/B/VT82C686/A/B/VT8233/A/C/VT8235 PIPC Bus Master IDE
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
        Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
        Latency: 32
        Interrupt: pin A routed to IRQ 11
        Region 4: I/O ports at dc00 [size=16]
        Capabilities: [c0] Power Management version 2
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
                Status: D0 PME-Enable- DSel=0 DScale=0 PME-

00:11.5 Multimedia audio controller: VIA Technologies, Inc. VT8233/A/8235 AC97 Audio Controller (rev 50)
        Subsystem: VIA Technologies, Inc.: Unknown device 4161
        Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
        Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
        Interrupt: pin C routed to IRQ 22
        Region 0: I/O ports at e000 [size=256]
        Capabilities: [c0] Power Management version 2
                Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
                Status: D0 PME-Enable- DSel=0 DScale=0 PME-

00:12.0 Ethernet controller: VIA Technologies, Inc. VT6102 [Rhine-II] (rev 74)
        Subsystem: VIA Technologies, Inc. VT6102 [Rhine II] Embeded Ethernet Controller on VT8235
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
        Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
        Latency: 32 (750ns min, 2000ns max), cache line size 08
        Interrupt: pin A routed to IRQ 23
        Region 0: I/O ports at e800 [size=256]
        Region 1: Memory at ee001000 (32-bit, non-prefetchable) [size=256]
        Capabilities: [40] Power Management version 2
                Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
                Status: D0 PME-Enable- DSel=0 DScale=0 PME-

01:00.0 VGA compatible controller: S3 Inc. VT8375 [ProSavage8 KM266/KL266] (prog-if 00 [VGA])
        Subsystem: S3 Inc. VT8375 [ProSavage8 KM266/KL266]
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
        Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
        Latency: 32 (1000ns min, 63750ns max), cache line size 08
        Interrupt: pin A routed to IRQ 16
        Region 0: Memory at ed000000 (32-bit, non-prefetchable) [size=512K]
        Region 1: Memory at e0000000 (32-bit, prefetchable) [size=128M]
        Expansion ROM at <unassigned> [disabled] [size=64K]
        Capabilities: [dc] Power Management version 2
                Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
                Status: D0 PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [80] AGP version 2.0
                Status: RQ=31 SBA- 64bit- FW- Rate=<none>
                Command: RQ=0 SBA- AGP- 64bit- FW- Rate=<none>

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: Double Interrupt with HT
  2003-12-18 12:14           ` Miroslaw KLABA
@ 2003-12-18 13:51             ` Zwane Mwaikambo
  2003-12-18 16:35               ` Miroslaw KLABA
  0 siblings, 1 reply; 16+ messages in thread
From: Zwane Mwaikambo @ 2003-12-18 13:51 UTC (permalink / raw)
  To: Miroslaw KLABA; +Cc: john stultz, linux-kernel

On Thu, 18 Dec 2003, Miroslaw KLABA wrote:

> > Does booting w/ "noapic" help?
> No, I still have the time that is going twice the speed.
> I included /proc/interrupts, dmesg and lspci. It's with the 2.4.23 kernel without the irq_balance patch.
> Hope this help.
>
> # cat /proc/interrupts
>            CPU0       CPU1
>   0:      71181      71121    IO-APIC-edge  timer
>   1:          2          2    IO-APIC-edge  keyboard
>   2:          0          0          XT-PIC  cascade
>   4:         16         16    IO-APIC-edge  serial
>   8:          1          1    IO-APIC-edge  rtc
>  14:       3294       3295    IO-APIC-edge  ide0
>  23:       2334       2339   IO-APIC-level  eth0
> NMI:          0          0
> LOC:      71109      71108
> ERR:          0
> MIS:          0
>
> Kernel command line: auto BOOT_IMAGE=linux-bi ro root=301 BOOT_FILE=/boot/bzImage-2.4.23-bipiv noacpi

John meant 'noapic' not 'noacpi', you'll note that the interrupt
controller types after boot will be XT-PIC instead of say IO-APIC-edge
etc..

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: Double Interrupt with HT
  2003-12-18 13:51             ` Zwane Mwaikambo
@ 2003-12-18 16:35               ` Miroslaw KLABA
  2003-12-18 16:42                 ` William Lee Irwin III
  2003-12-18 17:21                 ` Zwane Mwaikambo
  0 siblings, 2 replies; 16+ messages in thread
From: Miroslaw KLABA @ 2003-12-18 16:35 UTC (permalink / raw)
  To: Zwane Mwaikambo; +Cc: john stultz, lkml

My fault...
It works now.
`while true; do date; sleep 1; done` counts well now.
Thanks.
But now, how may I help to find this bug in apic code?

Miro

# cat /proc/interrupts 
           CPU0       CPU1       
  0:      12421          0          XT-PIC  timer
  1:          2          0          XT-PIC  keyboard
  2:          0          0          XT-PIC  cascade
  4:         16          0          XT-PIC  serial
  8:          1          0          XT-PIC  rtc
 11:        642          0          XT-PIC  eth0
 14:       2865          0          XT-PIC  ide0
NMI:          0          0 
LOC:      12355      12353 
ERR:          0
MIS:          0



On Thu, 18 Dec 2003 08:51:06 -0500 (EST)
Zwane Mwaikambo <zwane@arm.linux.org.uk> wrote:

> On Thu, 18 Dec 2003, Miroslaw KLABA wrote:
> 
> > > Does booting w/ "noapic" help?
> > No, I still have the time that is going twice the speed.
> > I included /proc/interrupts, dmesg and lspci. It's with the 2.4.23 kernel without the irq_balance patch.
> > Hope this help.
> >
> > # cat /proc/interrupts
> >            CPU0       CPU1
> >   0:      71181      71121    IO-APIC-edge  timer
> >   1:          2          2    IO-APIC-edge  keyboard
> >   2:          0          0          XT-PIC  cascade
> >   4:         16         16    IO-APIC-edge  serial
> >   8:          1          1    IO-APIC-edge  rtc
> >  14:       3294       3295    IO-APIC-edge  ide0
> >  23:       2334       2339   IO-APIC-level  eth0
> > NMI:          0          0
> > LOC:      71109      71108
> > ERR:          0
> > MIS:          0
> >
> > Kernel command line: auto BOOT_IMAGE=linux-bi ro root=301 BOOT_FILE=/boot/bzImage-2.4.23-bipiv noacpi
> 
> John meant 'noapic' not 'noacpi', you'll note that the interrupt
> controller types after boot will be XT-PIC instead of say IO-APIC-edge
> etc..

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: Double Interrupt with HT
  2003-12-18 16:35               ` Miroslaw KLABA
@ 2003-12-18 16:42                 ` William Lee Irwin III
  2003-12-18 17:31                   ` William Lee Irwin III
  2003-12-18 17:21                 ` Zwane Mwaikambo
  1 sibling, 1 reply; 16+ messages in thread
From: William Lee Irwin III @ 2003-12-18 16:42 UTC (permalink / raw)
  To: Miroslaw KLABA; +Cc: Zwane Mwaikambo, john stultz, lkml

On Thu, Dec 18, 2003 at 05:35:28PM +0100, Miroslaw KLABA wrote:
> My fault...
> It works now.
> `while true; do date; sleep 1; done` counts well now.
> Thanks.
> But now, how may I help to find this bug in apic code?
> Miro
> # cat /proc/interrupts 
>            CPU0       CPU1       
>   0:      12421          0          XT-PIC  timer
>   1:          2          0          XT-PIC  keyboard
>   2:          0          0          XT-PIC  cascade
>   4:         16          0          XT-PIC  serial
>   8:          1          0          XT-PIC  rtc
>  11:        642          0          XT-PIC  eth0
>  14:       2865          0          XT-PIC  ide0
> NMI:          0          0 
> LOC:      12355      12353 
> ERR:          0
> MIS:          0

Known issue. Boot with norqbalance to work around it.

-- wli

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: Double Interrupt with HT
  2003-12-18 16:35               ` Miroslaw KLABA
  2003-12-18 16:42                 ` William Lee Irwin III
@ 2003-12-18 17:21                 ` Zwane Mwaikambo
  2003-12-19  0:32                   ` Miroslaw KLABA
  1 sibling, 1 reply; 16+ messages in thread
From: Zwane Mwaikambo @ 2003-12-18 17:21 UTC (permalink / raw)
  To: Miroslaw KLABA; +Cc: john stultz, lkml

On Thu, 18 Dec 2003, Miroslaw KLABA wrote:

> My fault...
> It works now.
> `while true; do date; sleep 1; done` counts well now.
> Thanks.
> But now, how may I help to find this bug in apic code?

Thanks for verifying that Miroslaw, could you also test the following
patch (against 2.4.23) ?

Ta,
	Zwane

Index: linux-2.4.23/include/asm-i386/smpboot.h
===================================================================
RCS file: /build/cvsroot/linux-2.4.23/include/asm-i386/smpboot.h,v
retrieving revision 1.1.1.1
diff -u -p -B -r1.1.1.1 smpboot.h
--- linux-2.4.23/include/asm-i386/smpboot.h	4 Dec 2003 22:20:21 -0000	1.1.1.1
+++ linux-2.4.23/include/asm-i386/smpboot.h	18 Dec 2003 17:19:28 -0000
@@ -57,7 +57,7 @@ static inline void detect_clustered_apic
 #define esr_disable (0)
 #define detect_clustered_apic(x,y)
 #define INT_DEST_ADDR_MODE (APIC_DEST_LOGICAL)	/* logical delivery */
-#define INT_DELIVERY_MODE (dest_LowestPrio)
+#define INT_DELIVERY_MODE (dest_Fixed)
 #endif /* CONFIG_X86_CLUSTERED_APIC */
 #define BAD_APICID 0xFFu


^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: Double Interrupt with HT
  2003-12-18 16:42                 ` William Lee Irwin III
@ 2003-12-18 17:31                   ` William Lee Irwin III
  0 siblings, 0 replies; 16+ messages in thread
From: William Lee Irwin III @ 2003-12-18 17:31 UTC (permalink / raw)
  To: Miroslaw KLABA, Zwane Mwaikambo, john stultz, lkml

On Thu, Dec 18, 2003 at 05:35:28PM +0100, Miroslaw KLABA wrote:
>> My fault...
>> It works now.
>> `while true; do date; sleep 1; done` counts well now.
>> Thanks.
>> But now, how may I help to find this bug in apic code?
>> Miro
> 
On Thu, Dec 18, 2003 at 08:42:28AM -0800, William Lee Irwin III wrote:
> Known issue. Boot with norqbalance to work around it.

Woops, you actually have an xAPIC; diregard this.


-- wli

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: Double Interrupt with HT
  2003-12-18 17:21                 ` Zwane Mwaikambo
@ 2003-12-19  0:32                   ` Miroslaw KLABA
  2003-12-19  0:38                     ` Zwane Mwaikambo
  0 siblings, 1 reply; 16+ messages in thread
From: Miroslaw KLABA @ 2003-12-19  0:32 UTC (permalink / raw)
  To: Zwane Mwaikambo; +Cc: john stultz, lkml

Hello,

This patch doesn't solve the problem.
`while true; do date; sleep 1; done` still counts twice the speed.

Thanks
Miro

Quoting Zwane Mwaikambo <zwane@arm.linux.org.uk>:

> On Thu, 18 Dec 2003, Miroslaw KLABA wrote:
> 
> > My fault...
> > It works now.
> > `while true; do date; sleep 1; done` counts well now.
> > Thanks.
> > But now, how may I help to find this bug in apic code?
> 
> Thanks for verifying that Miroslaw, could you also test the following
> patch (against 2.4.23) ?
> 
> Ta,
> 	Zwane
> 
> Index: linux-2.4.23/include/asm-i386/smpboot.h
> ===================================================================
> RCS file: /build/cvsroot/linux-2.4.23/include/asm-i386/smpboot.h,v
> retrieving revision 1.1.1.1
> diff -u -p -B -r1.1.1.1 smpboot.h
> --- linux-2.4.23/include/asm-i386/smpboot.h	4 Dec 2003 22:20:21
> -0000	1.1.1.1
> +++ linux-2.4.23/include/asm-i386/smpboot.h	18 Dec 2003 17:19:28 -0000
> @@ -57,7 +57,7 @@ static inline void detect_clustered_apic
>  #define esr_disable (0)
>  #define detect_clustered_apic(x,y)
>  #define INT_DEST_ADDR_MODE (APIC_DEST_LOGICAL)	/* logical delivery */
> -#define INT_DELIVERY_MODE (dest_LowestPrio)
> +#define INT_DELIVERY_MODE (dest_Fixed)
>  #endif /* CONFIG_X86_CLUSTERED_APIC */
>  #define BAD_APICID 0xFFu
> 
> -
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> 



^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: Double Interrupt with HT
  2003-12-19  0:32                   ` Miroslaw KLABA
@ 2003-12-19  0:38                     ` Zwane Mwaikambo
  0 siblings, 0 replies; 16+ messages in thread
From: Zwane Mwaikambo @ 2003-12-19  0:38 UTC (permalink / raw)
  To: Miroslaw KLABA; +Cc: john stultz, lkml

On Fri, 19 Dec 2003, Miroslaw KLABA wrote:

> Hello,
>
> This patch doesn't solve the problem.
> `while true; do date; sleep 1; done` still counts twice the speed.

Thanks for entertaining my curiosity, i'll see what else i can dig up.


^ permalink raw reply	[flat|nested] 16+ messages in thread

end of thread, other threads:[~2003-12-19  0:39 UTC | newest]

Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2003-12-15 14:58 Double Interrupt with HT Miroslaw KLABA
2003-12-15 17:16 ` Herbert Poetzl
2003-12-15 17:31   ` Miroslaw KLABA
2003-12-16 19:31 ` john stultz
2003-12-16 22:55   ` Miroslaw KLABA
2003-12-16 23:50     ` john stultz
2003-12-17  3:03       ` Miroslaw KLABA
2003-12-18  3:22         ` john stultz
2003-12-18 12:14           ` Miroslaw KLABA
2003-12-18 13:51             ` Zwane Mwaikambo
2003-12-18 16:35               ` Miroslaw KLABA
2003-12-18 16:42                 ` William Lee Irwin III
2003-12-18 17:31                   ` William Lee Irwin III
2003-12-18 17:21                 ` Zwane Mwaikambo
2003-12-19  0:32                   ` Miroslaw KLABA
2003-12-19  0:38                     ` Zwane Mwaikambo

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