* [BK PATCHES] 2.6.x libata updates
@ 2004-10-19 17:14 Jeff Garzik
0 siblings, 0 replies; 7+ messages in thread
From: Jeff Garzik @ 2004-10-19 17:14 UTC (permalink / raw)
To: Andrew Morton, Linus Torvalds; +Cc: linux-ide, linux-kernel
Today's libata updates. Fun stuff:
* AHCI driver (finally a nice, clean, open piece of h/w)
* Bart gets ATAPI working, which is a big step towards libata
being able to be useful for users with PATA.
Please do a
bk pull bk://gkernel.bkbits.net/libata-2.6
This will update the following files:
drivers/scsi/Kconfig | 8
drivers/scsi/Makefile | 1
drivers/scsi/ahci.c | 1023 +++++++++++++++++++++++++++++++++++++++++++++
drivers/scsi/libata-core.c | 204 +++++++-
drivers/scsi/libata-scsi.c | 12
drivers/scsi/sata_vsc.c | 8
include/linux/libata.h | 4
7 files changed, 1217 insertions(+), 43 deletions(-)
through these ChangeSets:
<bzolnier@gmail.com> (04/10/18 1.2131.12.6)
[PATCH] make ATAPI PIO work
If "BSY=0, DRQ=0" condition happens on ATAPI just
complete the command as this condition happens for:
* the end of the PIO transfer (ie. REQUEST_SENSE
seems to return only 18 of 96 requested bytes)
* unsupported ATAPI commands (ie. REPORT_LUNS)
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
<bzolnier@gmail.com> (04/10/18 1.2131.12.5)
[PATCH] arbitrary size ATAPI PIO support bugfixes
* sg was incorrectly used instead of qc->sg in __atapi_pio_bytes()
* due to obvious typo qc->curbytes wasn't zeroed in ata_qc_new_init()
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
<bzolnier@gmail.com> (04/10/15 1.2131.12.4)
[libata] arbitrary size ATAPI PIO support
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
<bzolnier@gmail.com> (04/10/15 1.2131.12.3)
[PATCH] REQUEST_SENSE support for ATAPI
It is quite different from your patch:
* uses ata_qc_issue()
* supports both DMA and PIO
* ->sense_buffer[] mangling dropped for now
Now libata works with ATAPI devices (yeah!)...
...unless PIO is used, then it fails in mysterious way.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
<jeremy@sgi.com> (04/10/15 1.2131.11.1)
[PATCH] per-port LED control for sata_vsc
signed-off-by: Jeremy Higdon <jeremy@sgi.com>
<jgarzik@pobox.com> (04/10/15 1.2131.1.39)
[libata ahci] more updates
* allocate DMA areas in better order
* remove unneeded hooks
<jgarzik@pobox.com> (04/10/15 1.2131.1.38)
[libata ahci] fix several bugs
* PCI IDs from test version didn't make it into mainline... doh
* do all command setup in ->qc_prep
* phy_reset routine that does signature check
* check SATA phy for errors
* reset hardware from scratch, in case card BIOS didn't run
* implement staggered spinup by default
* adding additional debugging output
<jgarzik@pobox.com> (04/10/15 1.2131.1.37)
[libata] add AHCI driver
diff -Nru a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig
--- a/drivers/scsi/Kconfig 2004-10-19 13:13:01 -04:00
+++ b/drivers/scsi/Kconfig 2004-10-19 13:13:01 -04:00
@@ -406,6 +406,14 @@
If unsure, say N.
+config SCSI_SATA_AHCI
+ tristate "AHCI SATA support"
+ depends on SCSI_SATA && PCI && EXPERIMENTAL
+ help
+ This option enables support for AHCI Serial ATA.
+
+ If unsure, say N.
+
config SCSI_SATA_SVW
tristate "ServerWorks Frodo / Apple K2 SATA support (EXPERIMENTAL)"
depends on SCSI_SATA && PCI && EXPERIMENTAL
diff -Nru a/drivers/scsi/Makefile b/drivers/scsi/Makefile
--- a/drivers/scsi/Makefile 2004-10-19 13:13:01 -04:00
+++ b/drivers/scsi/Makefile 2004-10-19 13:13:01 -04:00
@@ -121,6 +121,7 @@
obj-$(CONFIG_SCSI_NSP32) += nsp32.o
obj-$(CONFIG_SCSI_IPR) += ipr.o
obj-$(CONFIG_SCSI_IBMVSCSI) += ibmvscsi/
+obj-$(CONFIG_SCSI_SATA_AHCI) += libata.o ahci.o
obj-$(CONFIG_SCSI_SATA_SVW) += libata.o sata_svw.o
obj-$(CONFIG_SCSI_ATA_PIIX) += libata.o ata_piix.o
obj-$(CONFIG_SCSI_SATA_PROMISE) += libata.o sata_promise.o
diff -Nru a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/drivers/scsi/ahci.c 2004-10-19 13:13:01 -04:00
@@ -0,0 +1,1023 @@
+/*
+ * ahci.c - AHCI SATA support
+ *
+ * Copyright 2004 Red Hat, Inc.
+ *
+ * The contents of this file are subject to the Open
+ * Software License version 1.1 that can be found at
+ * http://www.opensource.org/licenses/osl-1.1.txt and is included herein
+ * by reference.
+ *
+ * Alternatively, the contents of this file may be used under the terms
+ * of the GNU General Public License version 2 (the "GPL") as distributed
+ * in the kernel source COPYING file, in which case the provisions of
+ * the GPL are applicable instead of the above. If you wish to allow
+ * the use of your version of this file only under the terms of the
+ * GPL and not to allow others to use your version of this file under
+ * the OSL, indicate your decision by deleting the provisions above and
+ * replace them with the notice and other provisions required by the GPL.
+ * If you do not delete the provisions above, a recipient may use your
+ * version of this file under either the OSL or the GPL.
+ *
+ * Version 1.0 of the AHCI specification:
+ * http://www.intel.com/technology/serialata/pdf/rev1_0.pdf
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/init.h>
+#include <linux/blkdev.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/sched.h>
+#include "scsi.h"
+#include <scsi/scsi_host.h>
+#include <linux/libata.h>
+#include <asm/io.h>
+
+#define DRV_NAME "ahci"
+#define DRV_VERSION "0.11"
+
+
+enum {
+ AHCI_PCI_BAR = 5,
+ AHCI_MAX_SG = 168, /* hardware max is 64K */
+ AHCI_DMA_BOUNDARY = 0xffffffff,
+ AHCI_USE_CLUSTERING = 0,
+ AHCI_CMD_SLOT_SZ = 32 * 32,
+ AHCI_RX_FIS_SZ = 256,
+ AHCI_CMD_TBL_HDR = 0x80,
+ AHCI_CMD_TBL_SZ = AHCI_CMD_TBL_HDR + (AHCI_MAX_SG * 16),
+ AHCI_PORT_PRIV_DMA_SZ = AHCI_CMD_SLOT_SZ + AHCI_CMD_TBL_SZ +
+ AHCI_RX_FIS_SZ,
+ AHCI_IRQ_ON_SG = (1 << 31),
+ AHCI_CMD_ATAPI = (1 << 5),
+ AHCI_CMD_WRITE = (1 << 6),
+
+ RX_FIS_D2H_REG = 0x40, /* offset of D2H Register FIS data */
+
+ board_ahci = 0,
+
+ /* global controller registers */
+ HOST_CAP = 0x00, /* host capabilities */
+ HOST_CTL = 0x04, /* global host control */
+ HOST_IRQ_STAT = 0x08, /* interrupt status */
+ HOST_PORTS_IMPL = 0x0c, /* bitmap of implemented ports */
+ HOST_VERSION = 0x10, /* AHCI spec. version compliancy */
+
+ /* HOST_CTL bits */
+ HOST_RESET = (1 << 0), /* reset controller; self-clear */
+ HOST_IRQ_EN = (1 << 1), /* global IRQ enable */
+ HOST_AHCI_EN = (1 << 31), /* AHCI enabled */
+
+ /* HOST_CAP bits */
+ HOST_CAP_64 = (1 << 31), /* PCI DAC (64-bit DMA) support */
+
+ /* registers for each SATA port */
+ PORT_LST_ADDR = 0x00, /* command list DMA addr */
+ PORT_LST_ADDR_HI = 0x04, /* command list DMA addr hi */
+ PORT_FIS_ADDR = 0x08, /* FIS rx buf addr */
+ PORT_FIS_ADDR_HI = 0x0c, /* FIS rx buf addr hi */
+ PORT_IRQ_STAT = 0x10, /* interrupt status */
+ PORT_IRQ_MASK = 0x14, /* interrupt enable/disable mask */
+ PORT_CMD = 0x18, /* port command */
+ PORT_TFDATA = 0x20, /* taskfile data */
+ PORT_SIG = 0x24, /* device TF signature */
+ PORT_CMD_ISSUE = 0x38, /* command issue */
+ PORT_SCR = 0x28, /* SATA phy register block */
+ PORT_SCR_STAT = 0x28, /* SATA phy register: SStatus */
+ PORT_SCR_CTL = 0x2c, /* SATA phy register: SControl */
+ PORT_SCR_ERR = 0x30, /* SATA phy register: SError */
+
+ /* PORT_IRQ_{STAT,MASK} bits */
+ PORT_IRQ_COLD_PRES = (1 << 31), /* cold presence detect */
+ PORT_IRQ_TF_ERR = (1 << 30), /* task file error */
+ PORT_IRQ_HBUS_ERR = (1 << 29), /* host bus fatal error */
+ PORT_IRQ_HBUS_DATA_ERR = (1 << 28), /* host bus data error */
+ PORT_IRQ_IF_ERR = (1 << 27), /* interface fatal error */
+ PORT_IRQ_IF_NONFATAL = (1 << 26), /* interface non-fatal error */
+ PORT_IRQ_OVERFLOW = (1 << 24), /* xfer exhausted available S/G */
+ PORT_IRQ_BAD_PMP = (1 << 23), /* incorrect port multiplier */
+
+ PORT_IRQ_PHYRDY = (1 << 22), /* PhyRdy changed */
+ PORT_IRQ_DEV_ILCK = (1 << 7), /* device interlock */
+ PORT_IRQ_CONNECT = (1 << 6), /* port connect change status */
+ PORT_IRQ_SG_DONE = (1 << 5), /* descriptor processed */
+ PORT_IRQ_UNK_FIS = (1 << 4), /* unknown FIS rx'd */
+ PORT_IRQ_SDB_FIS = (1 << 3), /* Set Device Bits FIS rx'd */
+ PORT_IRQ_DMAS_FIS = (1 << 2), /* DMA Setup FIS rx'd */
+ PORT_IRQ_PIOS_FIS = (1 << 1), /* PIO Setup FIS rx'd */
+ PORT_IRQ_D2H_REG_FIS = (1 << 0), /* D2H Register FIS rx'd */
+
+ PORT_IRQ_FATAL = PORT_IRQ_TF_ERR |
+ PORT_IRQ_HBUS_ERR |
+ PORT_IRQ_HBUS_DATA_ERR |
+ PORT_IRQ_IF_ERR,
+ DEF_PORT_IRQ = PORT_IRQ_FATAL | PORT_IRQ_PHYRDY |
+ PORT_IRQ_D2H_REG_FIS,
+
+ /* PORT_CMD bits */
+ PORT_CMD_LIST_ON = (1 << 15), /* cmd list DMA engine running */
+ PORT_CMD_FIS_ON = (1 << 14), /* FIS DMA engine running */
+ PORT_CMD_FIS_RX = (1 << 4), /* Enable FIS receive DMA engine */
+ PORT_CMD_POWER_ON = (1 << 2), /* Power up device */
+ PORT_CMD_SPIN_UP = (1 << 1), /* Spin up device */
+ PORT_CMD_START = (1 << 0), /* Enable port DMA engine */
+
+ PORT_CMD_ICC_ACTIVE = (0x1 << 28), /* Put i/f in active state */
+ PORT_CMD_ICC_PARTIAL = (0x2 << 28), /* Put i/f in partial state */
+ PORT_CMD_ICC_SLUMBER = (0x6 << 28), /* Put i/f in slumber state */
+};
+
+struct ahci_cmd_hdr {
+ u32 opts;
+ u32 status;
+ u32 tbl_addr;
+ u32 tbl_addr_hi;
+ u32 reserved[4];
+};
+
+struct ahci_sg {
+ u32 addr;
+ u32 addr_hi;
+ u32 reserved;
+ u32 flags_size;
+};
+
+struct ahci_host_priv {
+ unsigned long flags;
+ u32 cap; /* cache of HOST_CAP register */
+ u32 port_map; /* cache of HOST_PORTS_IMPL reg */
+};
+
+struct ahci_port_priv {
+ struct ahci_cmd_hdr *cmd_slot;
+ dma_addr_t cmd_slot_dma;
+ void *cmd_tbl;
+ dma_addr_t cmd_tbl_dma;
+ struct ahci_sg *cmd_tbl_sg;
+ void *rx_fis;
+ dma_addr_t rx_fis_dma;
+};
+
+static u32 ahci_scr_read (struct ata_port *ap, unsigned int sc_reg);
+static void ahci_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
+static int ahci_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
+static int ahci_qc_issue(struct ata_queued_cmd *qc);
+static irqreturn_t ahci_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
+static void ahci_phy_reset(struct ata_port *ap);
+static void ahci_irq_clear(struct ata_port *ap);
+static void ahci_eng_timeout(struct ata_port *ap);
+static int ahci_port_start(struct ata_port *ap);
+static void ahci_port_stop(struct ata_port *ap);
+static void ahci_host_stop(struct ata_host_set *host_set);
+static void ahci_qc_prep(struct ata_queued_cmd *qc);
+static u8 ahci_check_status(struct ata_port *ap);
+static inline int ahci_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc);
+
+static Scsi_Host_Template ahci_sht = {
+ .module = THIS_MODULE,
+ .name = DRV_NAME,
+ .queuecommand = ata_scsi_queuecmd,
+ .eh_strategy_handler = ata_scsi_error,
+ .can_queue = ATA_DEF_QUEUE,
+ .this_id = ATA_SHT_THIS_ID,
+ .sg_tablesize = AHCI_MAX_SG,
+ .max_sectors = ATA_MAX_SECTORS,
+ .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
+ .emulated = ATA_SHT_EMULATED,
+ .use_clustering = AHCI_USE_CLUSTERING,
+ .proc_name = DRV_NAME,
+ .dma_boundary = AHCI_DMA_BOUNDARY,
+ .slave_configure = ata_scsi_slave_config,
+ .bios_param = ata_std_bios_param,
+};
+
+static struct ata_port_operations ahci_ops = {
+ .port_disable = ata_port_disable,
+
+ .check_status = ahci_check_status,
+ .dev_select = ata_noop_dev_select,
+
+ .phy_reset = ahci_phy_reset,
+
+ .qc_prep = ahci_qc_prep,
+ .qc_issue = ahci_qc_issue,
+
+ .eng_timeout = ahci_eng_timeout,
+
+ .irq_handler = ahci_interrupt,
+ .irq_clear = ahci_irq_clear,
+
+ .scr_read = ahci_scr_read,
+ .scr_write = ahci_scr_write,
+
+ .port_start = ahci_port_start,
+ .port_stop = ahci_port_stop,
+ .host_stop = ahci_host_stop,
+};
+
+static struct ata_port_info ahci_port_info[] = {
+ /* board_ahci */
+ {
+ .sht = &ahci_sht,
+ .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
+ ATA_FLAG_SATA_RESET | ATA_FLAG_MMIO,
+ .pio_mask = 0x03, /* pio3-4 */
+ .udma_mask = 0x7f, /* udma0-6 ; FIXME */
+ .port_ops = &ahci_ops,
+ },
+};
+
+static struct pci_device_id ahci_pci_tbl[] = {
+ { PCI_VENDOR_ID_INTEL, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ board_ahci },
+ { PCI_VENDOR_ID_INTEL, 0x2653, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ board_ahci },
+ { } /* terminate list */
+};
+
+
+static struct pci_driver ahci_pci_driver = {
+ .name = DRV_NAME,
+ .id_table = ahci_pci_tbl,
+ .probe = ahci_init_one,
+ .remove = ata_pci_remove_one,
+};
+
+
+static inline unsigned long ahci_port_base_ul (unsigned long base, unsigned int port)
+{
+ return base + 0x100 + (port * 0x80);
+}
+
+static inline void *ahci_port_base (void *base, unsigned int port)
+{
+ return (void *) ahci_port_base_ul((unsigned long)base, port);
+}
+
+static void ahci_host_stop(struct ata_host_set *host_set)
+{
+ struct ahci_host_priv *hpriv = host_set->private_data;
+ kfree(hpriv);
+}
+
+static int ahci_port_start(struct ata_port *ap)
+{
+ struct pci_dev *pdev = ap->host_set->pdev;
+ struct ahci_host_priv *hpriv = ap->host_set->private_data;
+ struct ahci_port_priv *pp;
+ int rc;
+ void *mem, *mmio = ap->host_set->mmio_base;
+ void *port_mmio = ahci_port_base(mmio, ap->port_no);
+ dma_addr_t mem_dma;
+
+ rc = ata_port_start(ap);
+ if (rc)
+ return rc;
+
+ pp = kmalloc(sizeof(*pp), GFP_KERNEL);
+ if (!pp) {
+ rc = -ENOMEM;
+ goto err_out;
+ }
+ memset(pp, 0, sizeof(*pp));
+
+ mem = pci_alloc_consistent(pdev, AHCI_PORT_PRIV_DMA_SZ, &mem_dma);
+ if (!mem) {
+ rc = -ENOMEM;
+ goto err_out_kfree;
+ }
+ memset(mem, 0, AHCI_PORT_PRIV_DMA_SZ);
+
+ /*
+ * First item in chunk of DMA memory: 32-slot command table,
+ * 32 bytes each in size
+ */
+ pp->cmd_slot = mem;
+ pp->cmd_slot_dma = mem_dma;
+
+ mem += AHCI_CMD_SLOT_SZ;
+ mem_dma += AHCI_CMD_SLOT_SZ;
+
+ /*
+ * Second item: Received-FIS area
+ */
+ pp->rx_fis = mem;
+ pp->rx_fis_dma = mem_dma;
+
+ mem += AHCI_RX_FIS_SZ;
+ mem_dma += AHCI_RX_FIS_SZ;
+
+ /*
+ * Third item: data area for storing a single command
+ * and its scatter-gather table
+ */
+ pp->cmd_tbl = mem;
+ pp->cmd_tbl_dma = mem_dma;
+
+ pp->cmd_tbl_sg = mem + AHCI_CMD_TBL_HDR;
+
+ ap->private_data = pp;
+
+ if (hpriv->cap & HOST_CAP_64)
+ writel((pp->cmd_slot_dma >> 16) >> 16, port_mmio + PORT_LST_ADDR_HI);
+ writel(pp->cmd_slot_dma & 0xffffffff, port_mmio + PORT_LST_ADDR);
+ readl(port_mmio + PORT_LST_ADDR); /* flush */
+
+ if (hpriv->cap & HOST_CAP_64)
+ writel((pp->rx_fis_dma >> 16) >> 16, port_mmio + PORT_FIS_ADDR_HI);
+ writel(pp->rx_fis_dma & 0xffffffff, port_mmio + PORT_LST_ADDR);
+ readl(port_mmio + PORT_LST_ADDR); /* flush */
+
+ writel(PORT_CMD_ICC_ACTIVE | PORT_CMD_FIS_RX |
+ PORT_CMD_POWER_ON | PORT_CMD_SPIN_UP |
+ PORT_CMD_START, port_mmio + PORT_CMD);
+ readl(port_mmio + PORT_CMD); /* flush */
+
+ return 0;
+
+err_out_kfree:
+ kfree(pp);
+err_out:
+ ata_port_stop(ap);
+ return rc;
+}
+
+
+static void ahci_port_stop(struct ata_port *ap)
+{
+ struct pci_dev *pdev = ap->host_set->pdev;
+ struct ahci_port_priv *pp = ap->private_data;
+ void *mmio = ap->host_set->mmio_base;
+ void *port_mmio = ahci_port_base(mmio, ap->port_no);
+ u32 tmp;
+
+ tmp = readl(port_mmio + PORT_CMD);
+ tmp &= ~(PORT_CMD_START | PORT_CMD_FIS_RX);
+ writel(tmp, port_mmio + PORT_CMD);
+ readl(port_mmio + PORT_CMD); /* flush */
+
+ /* spec says 500 msecs for each PORT_CMD_{START,FIS_RX} bit, so
+ * this is slightly incorrect.
+ */
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout((HZ / 2) + 1);
+
+ ap->private_data = NULL;
+ pci_free_consistent(pdev, AHCI_PORT_PRIV_DMA_SZ,
+ pp->cmd_slot, pp->cmd_slot_dma);
+ kfree(pp);
+ ata_port_stop(ap);
+}
+
+static u32 ahci_scr_read (struct ata_port *ap, unsigned int sc_reg_in)
+{
+ unsigned int sc_reg;
+
+ switch (sc_reg_in) {
+ case SCR_STATUS: sc_reg = 0; break;
+ case SCR_CONTROL: sc_reg = 1; break;
+ case SCR_ERROR: sc_reg = 2; break;
+ case SCR_ACTIVE: sc_reg = 3; break;
+ default:
+ return 0xffffffffU;
+ }
+
+ return readl((void *) ap->ioaddr.scr_addr + (sc_reg * 4));
+}
+
+
+static void ahci_scr_write (struct ata_port *ap, unsigned int sc_reg_in,
+ u32 val)
+{
+ unsigned int sc_reg;
+
+ switch (sc_reg_in) {
+ case SCR_STATUS: sc_reg = 0; break;
+ case SCR_CONTROL: sc_reg = 1; break;
+ case SCR_ERROR: sc_reg = 2; break;
+ case SCR_ACTIVE: sc_reg = 3; break;
+ default:
+ return;
+ }
+
+ writel(val, (void *) ap->ioaddr.scr_addr + (sc_reg * 4));
+}
+
+static void ahci_phy_reset(struct ata_port *ap)
+{
+ void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr;
+ struct ata_taskfile tf;
+ struct ata_device *dev = &ap->device[0];
+ u32 tmp;
+
+ __sata_phy_reset(ap);
+
+ if (ap->flags & ATA_FLAG_PORT_DISABLED)
+ return;
+
+ tmp = readl(port_mmio + PORT_SIG);
+ tf.lbah = (tmp >> 24) & 0xff;
+ tf.lbam = (tmp >> 16) & 0xff;
+ tf.lbal = (tmp >> 8) & 0xff;
+ tf.nsect = (tmp) & 0xff;
+
+ dev->class = ata_dev_classify(&tf);
+ if (!ata_dev_present(dev))
+ ata_port_disable(ap);
+}
+
+static u8 ahci_check_status(struct ata_port *ap)
+{
+ void *mmio = (void *) ap->ioaddr.cmd_addr;
+
+ return readl(mmio + PORT_TFDATA) & 0xFF;
+}
+
+static void ahci_fill_sg(struct ata_queued_cmd *qc)
+{
+ struct ahci_port_priv *pp = qc->ap->private_data;
+ unsigned int i;
+
+ VPRINTK("ENTER\n");
+
+ /*
+ * Next, the S/G list.
+ */
+ for (i = 0; i < qc->n_elem; i++) {
+ u32 sg_len;
+ dma_addr_t addr;
+
+ addr = sg_dma_address(&qc->sg[i]);
+ sg_len = sg_dma_len(&qc->sg[i]);
+
+ pp->cmd_tbl_sg[i].addr = cpu_to_le32(addr & 0xffffffff);
+ pp->cmd_tbl_sg[i].addr_hi = cpu_to_le32((addr >> 16) >> 16);
+ pp->cmd_tbl_sg[i].flags_size = cpu_to_le32(sg_len - 1);
+ }
+}
+
+static void ahci_qc_prep(struct ata_queued_cmd *qc)
+{
+ struct ahci_port_priv *pp = qc->ap->private_data;
+ u32 opts;
+ const u32 cmd_fis_len = 5; /* five dwords */
+
+ /*
+ * Fill in command slot information (currently only one slot,
+ * slot 0, is currently since we don't do queueing)
+ */
+
+ opts = (qc->n_elem << 16) | cmd_fis_len;
+ if (qc->tf.flags & ATA_TFLAG_WRITE)
+ opts |= AHCI_CMD_WRITE;
+
+ switch (qc->tf.protocol) {
+ case ATA_PROT_ATAPI:
+ case ATA_PROT_ATAPI_NODATA:
+ case ATA_PROT_ATAPI_DMA:
+ opts |= AHCI_CMD_ATAPI;
+ break;
+
+ default:
+ /* do nothing */
+ break;
+ }
+
+ pp->cmd_slot[0].opts = cpu_to_le32(opts);
+ pp->cmd_slot[0].status = 0;
+ pp->cmd_slot[0].tbl_addr = cpu_to_le32(pp->cmd_tbl_dma & 0xffffffff);
+ pp->cmd_slot[0].tbl_addr_hi = cpu_to_le32((pp->cmd_tbl_dma >> 16) >> 16);
+
+ /*
+ * Fill in command table information. First, the header,
+ * a SATA Register - Host to Device command FIS.
+ */
+ ata_tf_to_fis(&qc->tf, pp->cmd_tbl, 0);
+
+ if (!(qc->flags & ATA_QCFLAG_DMAMAP))
+ return;
+
+ ahci_fill_sg(qc);
+}
+
+static inline void ahci_dma_complete (struct ata_port *ap,
+ struct ata_queued_cmd *qc,
+ int have_err)
+{
+ /* get drive status; clear intr; complete txn */
+ ata_qc_complete(ata_qc_from_tag(ap, ap->active_tag),
+ have_err ? ATA_ERR : 0);
+}
+
+static void ahci_intr_error(struct ata_port *ap, u32 irq_stat)
+{
+ void *mmio = ap->host_set->mmio_base;
+ void *port_mmio = ahci_port_base(mmio, ap->port_no);
+ u32 tmp;
+ int work;
+
+ /* stop DMA */
+ tmp = readl(port_mmio + PORT_CMD);
+ tmp &= PORT_CMD_START | PORT_CMD_FIS_RX;
+ writel(tmp, port_mmio + PORT_CMD);
+
+ /* wait for engine to stop. TODO: this could be
+ * as long as 500 msec
+ */
+ work = 1000;
+ while (work-- > 0) {
+ tmp = readl(port_mmio + PORT_CMD);
+ if ((tmp & PORT_CMD_LIST_ON) == 0)
+ break;
+ udelay(10);
+ }
+
+ /* clear SATA phy error, if any */
+ tmp = readl(port_mmio + PORT_SCR_ERR);
+ writel(tmp, port_mmio + PORT_SCR_ERR);
+
+ /* if DRQ/BSY is set, device needs to be reset.
+ * if so, issue COMRESET
+ */
+ tmp = readl(port_mmio + PORT_TFDATA);
+ if (tmp & (ATA_BUSY | ATA_DRQ)) {
+ writel(0x301, port_mmio + PORT_SCR_CTL);
+ readl(port_mmio + PORT_SCR_CTL); /* flush */
+ udelay(10);
+ writel(0x300, port_mmio + PORT_SCR_CTL);
+ readl(port_mmio + PORT_SCR_CTL); /* flush */
+ }
+
+ /* re-start DMA */
+ tmp = readl(port_mmio + PORT_CMD);
+ tmp |= PORT_CMD_START | PORT_CMD_FIS_RX;
+ writel(tmp, port_mmio + PORT_CMD);
+ readl(port_mmio + PORT_CMD); /* flush */
+
+ printk(KERN_WARNING "ata%u: error occurred, port reset\n", ap->port_no);
+}
+
+static void ahci_eng_timeout(struct ata_port *ap)
+{
+ void *mmio = ap->host_set->mmio_base;
+ void *port_mmio = ahci_port_base(mmio, ap->port_no);
+ struct ata_queued_cmd *qc;
+
+ DPRINTK("ENTER\n");
+
+ ahci_intr_error(ap, readl(port_mmio + PORT_IRQ_STAT));
+
+ qc = ata_qc_from_tag(ap, ap->active_tag);
+ if (!qc) {
+ printk(KERN_ERR "ata%u: BUG: timeout without command\n",
+ ap->id);
+ } else {
+ /* hack alert! We cannot use the supplied completion
+ * function from inside the ->eh_strategy_handler() thread.
+ * libata is the only user of ->eh_strategy_handler() in
+ * any kernel, so the default scsi_done() assumes it is
+ * not being called from the SCSI EH.
+ */
+ qc->scsidone = scsi_finish_command;
+ ata_qc_complete(qc, ATA_ERR);
+ }
+
+}
+
+static inline int ahci_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
+{
+ void *mmio = ap->host_set->mmio_base;
+ void *port_mmio = ahci_port_base(mmio, ap->port_no);
+ u32 status, serr, ci;
+
+ serr = readl(port_mmio + PORT_SCR_ERR);
+ writel(serr, port_mmio + PORT_SCR_ERR);
+
+ status = readl(port_mmio + PORT_IRQ_STAT);
+ writel(status, port_mmio + PORT_IRQ_STAT);
+
+ ci = readl(port_mmio + PORT_CMD_ISSUE);
+ if (likely((ci & 0x1) == 0)) {
+ if (qc) {
+ ata_qc_complete(qc, 0);
+ qc = NULL;
+ }
+ }
+
+ if (status & PORT_IRQ_FATAL) {
+ ahci_intr_error(ap, status);
+ if (qc)
+ ata_qc_complete(qc, ATA_ERR);
+ }
+
+ return 1;
+}
+
+static void ahci_irq_clear(struct ata_port *ap)
+{
+ /* TODO */
+}
+
+static irqreturn_t ahci_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
+{
+ struct ata_host_set *host_set = dev_instance;
+ struct ahci_host_priv *hpriv;
+ unsigned int i, handled = 0;
+ void *mmio;
+ u32 irq_stat, irq_ack = 0;
+
+ VPRINTK("ENTER\n");
+
+ hpriv = host_set->private_data;
+ mmio = host_set->mmio_base;
+
+ /* sigh. 0xffffffff is a valid return from h/w */
+ irq_stat = readl(mmio + HOST_IRQ_STAT);
+ irq_stat &= hpriv->port_map;
+ if (!irq_stat)
+ return IRQ_NONE;
+
+ spin_lock(&host_set->lock);
+
+ for (i = 0; i < host_set->n_ports; i++) {
+ struct ata_port *ap;
+ u32 tmp;
+
+ VPRINTK("port %u\n", i);
+ ap = host_set->ports[i];
+ tmp = irq_stat & (1 << i);
+ if (tmp && ap) {
+ struct ata_queued_cmd *qc;
+ qc = ata_qc_from_tag(ap, ap->active_tag);
+ if (ahci_host_intr(ap, qc))
+ irq_ack |= (1 << i);
+ }
+ }
+
+ if (irq_ack) {
+ writel(irq_ack, mmio + HOST_IRQ_STAT);
+ handled = 1;
+ }
+
+ spin_unlock(&host_set->lock);
+
+ VPRINTK("EXIT\n");
+
+ return IRQ_RETVAL(handled);
+}
+
+static int ahci_qc_issue(struct ata_queued_cmd *qc)
+{
+ struct ata_port *ap = qc->ap;
+ void *mmio = (void *) ap->ioaddr.cmd_addr;
+
+ writel(1, mmio + PORT_CMD_ISSUE);
+ readl(mmio + PORT_CMD_ISSUE); /* flush */
+
+ return 0;
+}
+
+static void ahci_setup_port(struct ata_ioports *port, unsigned long base,
+ unsigned int port_idx)
+{
+ VPRINTK("ENTER, base==0x%lx, port_idx %u\n", base, port_idx);
+ base = ahci_port_base_ul(base, port_idx);
+ VPRINTK("base now==0x%lx\n", base);
+
+ port->cmd_addr = base;
+ port->scr_addr = base + PORT_SCR;
+
+ VPRINTK("EXIT\n");
+}
+
+static int ahci_host_init(struct ata_probe_ent *probe_ent)
+{
+ struct ahci_host_priv *hpriv = probe_ent->private_data;
+ struct pci_dev *pdev = probe_ent->pdev;
+ void __iomem *mmio = probe_ent->mmio_base;
+ u32 tmp, cap_save;
+ u16 tmp16;
+ unsigned int i, j, using_dac;
+ int rc;
+ void __iomem *port_mmio;
+
+ cap_save = readl(mmio + HOST_CAP);
+ cap_save &= ( (1<<28) | (1<<17) );
+ cap_save |= (1 << 27);
+
+ /* global controller reset */
+ tmp = readl(mmio + HOST_CTL);
+ if ((tmp & HOST_RESET) == 0) {
+ writel(tmp | HOST_RESET, mmio + HOST_CTL);
+ readl(mmio + HOST_CTL); /* flush */
+ }
+
+ /* reset must complete within 1 second, or
+ * the hardware should be considered fried.
+ */
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout(HZ + 1);
+
+ tmp = readl(mmio + HOST_CTL);
+ if (tmp & HOST_RESET) {
+ printk(KERN_ERR DRV_NAME "(%s): controller reset failed (0x%x)\n",
+ pci_name(pdev), tmp);
+ return -EIO;
+ }
+
+ writel(HOST_AHCI_EN, mmio + HOST_CTL);
+ (void) readl(mmio + HOST_CTL); /* flush */
+ writel(cap_save, mmio + HOST_CAP);
+ writel(0xf, mmio + HOST_PORTS_IMPL);
+ (void) readl(mmio + HOST_PORTS_IMPL); /* flush */
+
+ pci_read_config_word(pdev, 0x92, &tmp16);
+ tmp16 |= 0xf;
+ pci_write_config_word(pdev, 0x92, tmp16);
+
+ hpriv->cap = readl(mmio + HOST_CAP);
+ hpriv->port_map = readl(mmio + HOST_PORTS_IMPL);
+ probe_ent->n_ports = (hpriv->cap & 0x1f) + 1;
+
+ VPRINTK("cap 0x%x port_map 0x%x n_ports %d\n",
+ hpriv->cap, hpriv->port_map, probe_ent->n_ports);
+
+ using_dac = hpriv->cap & HOST_CAP_64;
+ if (using_dac &&
+ !pci_set_dma_mask(pdev, 0xffffffffffffffffULL)) {
+ rc = pci_set_consistent_dma_mask(pdev, 0xffffffffffffffffULL);
+ if (rc) {
+ rc = pci_set_consistent_dma_mask(pdev, 0xffffffffULL);
+ if (rc) {
+ printk(KERN_ERR DRV_NAME "(%s): 64-bit DMA enable failed\n",
+ pci_name(pdev));
+ return rc;
+ }
+ }
+
+ hpriv->flags |= HOST_CAP_64;
+ } else {
+ rc = pci_set_dma_mask(pdev, 0xffffffffULL);
+ if (rc) {
+ printk(KERN_ERR DRV_NAME "(%s): 32-bit DMA enable failed\n",
+ pci_name(pdev));
+ return rc;
+ }
+ rc = pci_set_consistent_dma_mask(pdev, 0xffffffffULL);
+ if (rc) {
+ printk(KERN_ERR DRV_NAME "(%s): 32-bit consistent DMA enable failed\n",
+ pci_name(pdev));
+ return rc;
+ }
+ }
+
+ for (i = 0; i < probe_ent->n_ports; i++) {
+ if (!(hpriv->port_map & (1 << i)))
+ continue;
+
+ port_mmio = ahci_port_base(mmio, i);
+ VPRINTK("mmio %p port_mmio %p\n", mmio, port_mmio);
+
+ ahci_setup_port(&probe_ent->port[i],
+ (unsigned long) mmio, i);
+
+ /* make sure port is not active */
+ tmp = readl(port_mmio + PORT_CMD);
+ VPRINTK("PORT_CMD 0x%x\n", tmp);
+ if (tmp & (PORT_CMD_LIST_ON | PORT_CMD_FIS_ON |
+ PORT_CMD_FIS_RX | PORT_CMD_START)) {
+ tmp &= ~(PORT_CMD_LIST_ON | PORT_CMD_FIS_ON |
+ PORT_CMD_FIS_RX | PORT_CMD_START);
+ writel(tmp, port_mmio + PORT_CMD);
+ readl(port_mmio + PORT_CMD); /* flush */
+
+ /* spec says 500 msecs for each bit, so
+ * this is slightly incorrect.
+ */
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout((HZ / 2) + 1);
+ }
+
+ writel(PORT_CMD_SPIN_UP, port_mmio + PORT_CMD);
+
+ j = 0;
+ while (j < 100) {
+ msleep(10);
+ tmp = readl(port_mmio + PORT_SCR_STAT);
+ if ((tmp & 0xf) == 0x3)
+ break;
+ j++;
+ }
+
+ tmp = readl(port_mmio + PORT_SCR_ERR);
+ VPRINTK("PORT_SCR_ERR 0x%x\n", tmp);
+ writel(tmp, port_mmio + PORT_SCR_ERR);
+
+ /* ack any pending irq events for this port */
+ tmp = readl(port_mmio + PORT_IRQ_STAT);
+ VPRINTK("PORT_IRQ_STAT 0x%x\n", tmp);
+ if (tmp)
+ writel(tmp, port_mmio + PORT_IRQ_STAT);
+
+ writel(1 << i, mmio + HOST_IRQ_STAT);
+
+ /* set irq mask (enables interrupts) */
+ writel(DEF_PORT_IRQ, port_mmio + PORT_IRQ_MASK);
+ }
+
+ tmp = readl(mmio + HOST_CTL);
+ VPRINTK("HOST_CTL 0x%x\n", tmp);
+ writel(tmp | HOST_IRQ_EN, mmio + HOST_CTL);
+ tmp = readl(mmio + HOST_CTL);
+ VPRINTK("HOST_CTL 0x%x\n", tmp);
+
+ pci_set_master(pdev);
+
+ return 0;
+}
+
+/* move to PCI layer, integrate w/ MSI stuff */
+static void pci_enable_intx(struct pci_dev *pdev)
+{
+ u16 pci_command;
+
+ pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
+ if (pci_command & PCI_COMMAND_INTX_DISABLE) {
+ pci_command &= ~PCI_COMMAND_INTX_DISABLE;
+ pci_write_config_word(pdev, PCI_COMMAND, pci_command);
+ }
+}
+
+static void ahci_print_info(struct ata_probe_ent *probe_ent)
+{
+ struct ahci_host_priv *hpriv = probe_ent->private_data;
+ struct pci_dev *pdev = probe_ent->pdev;
+ void *mmio = probe_ent->mmio_base;
+ u32 vers, cap, impl, speed;
+ const char *speed_s;
+
+ vers = readl(mmio + HOST_VERSION);
+ cap = hpriv->cap;
+ impl = hpriv->port_map;
+
+ speed = (cap >> 20) & 0xf;
+ if (speed == 1)
+ speed_s = "1.5";
+ else if (speed == 2)
+ speed_s = "3";
+ else
+ speed_s = "?";
+
+ printk(KERN_INFO DRV_NAME "(%s) AHCI %02x%02x.%02x%02x "
+ "%u slots %u ports %s Gbps 0x%x impl\n"
+ ,
+ pci_name(pdev),
+
+ (vers >> 24) & 0xff,
+ (vers >> 16) & 0xff,
+ (vers >> 8) & 0xff,
+ vers & 0xff,
+
+ ((cap >> 8) & 0x1f) + 1,
+ (cap & 0x1f) + 1,
+ speed_s,
+ impl);
+
+ printk(KERN_INFO DRV_NAME "(%s) flags: "
+ "%s%s%s%s%s%s"
+ "%s%s%s%s%s%s%s\n"
+ ,
+ pci_name(pdev),
+
+ cap & (1 << 31) ? "64bit " : "",
+ cap & (1 << 30) ? "ncq " : "",
+ cap & (1 << 28) ? "ilck " : "",
+ cap & (1 << 27) ? "stag " : "",
+ cap & (1 << 26) ? "pm " : "",
+ cap & (1 << 25) ? "led " : "",
+
+ cap & (1 << 24) ? "clo " : "",
+ cap & (1 << 19) ? "nz " : "",
+ cap & (1 << 18) ? "only " : "",
+ cap & (1 << 17) ? "pmp " : "",
+ cap & (1 << 15) ? "pio " : "",
+ cap & (1 << 14) ? "slum " : "",
+ cap & (1 << 13) ? "part " : ""
+ );
+}
+
+static int ahci_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
+{
+ static int printed_version;
+ struct ata_probe_ent *probe_ent = NULL;
+ struct ahci_host_priv *hpriv;
+ unsigned long base;
+ void *mmio_base;
+ unsigned int board_idx = (unsigned int) ent->driver_data;
+ int rc;
+
+ VPRINTK("ENTER\n");
+
+ if (!printed_version++)
+ printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n");
+
+ /*
+ * If this driver happens to only be useful on Apple's K2, then
+ * we should check that here as it has a normal Serverworks ID
+ */
+ rc = pci_enable_device(pdev);
+ if (rc)
+ return rc;
+
+ rc = pci_request_regions(pdev, DRV_NAME);
+ if (rc)
+ goto err_out;
+
+ pci_enable_intx(pdev);
+
+ probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL);
+ if (probe_ent == NULL) {
+ rc = -ENOMEM;
+ goto err_out_regions;
+ }
+
+ memset(probe_ent, 0, sizeof(*probe_ent));
+ probe_ent->pdev = pdev;
+ INIT_LIST_HEAD(&probe_ent->node);
+
+ mmio_base = ioremap(pci_resource_start(pdev, AHCI_PCI_BAR),
+ pci_resource_len(pdev, AHCI_PCI_BAR));
+ if (mmio_base == NULL) {
+ rc = -ENOMEM;
+ goto err_out_free_ent;
+ }
+ base = (unsigned long) mmio_base;
+
+ hpriv = kmalloc(sizeof(*hpriv), GFP_KERNEL);
+ if (!hpriv) {
+ rc = -ENOMEM;
+ goto err_out_iounmap;
+ }
+ memset(hpriv, 0, sizeof(*hpriv));
+
+ probe_ent->sht = ahci_port_info[board_idx].sht;
+ probe_ent->host_flags = ahci_port_info[board_idx].host_flags;
+ probe_ent->pio_mask = ahci_port_info[board_idx].pio_mask;
+ probe_ent->udma_mask = ahci_port_info[board_idx].udma_mask;
+ probe_ent->port_ops = ahci_port_info[board_idx].port_ops;
+
+ probe_ent->irq = pdev->irq;
+ probe_ent->irq_flags = SA_SHIRQ;
+ probe_ent->mmio_base = mmio_base;
+ probe_ent->private_data = hpriv;
+
+ /* initialize adapter */
+ rc = ahci_host_init(probe_ent);
+ if (rc)
+ goto err_out_hpriv;
+
+ ahci_print_info(probe_ent);
+
+ /* FIXME: check ata_device_add return value */
+ ata_device_add(probe_ent);
+ kfree(probe_ent);
+
+ return 0;
+
+err_out_hpriv:
+ kfree(hpriv);
+err_out_iounmap:
+ iounmap(mmio_base);
+err_out_free_ent:
+ kfree(probe_ent);
+err_out_regions:
+ pci_release_regions(pdev);
+err_out:
+ pci_disable_device(pdev);
+ return rc;
+}
+
+
+static int __init ahci_init(void)
+{
+ return pci_module_init(&ahci_pci_driver);
+}
+
+
+static void __exit ahci_exit(void)
+{
+ pci_unregister_driver(&ahci_pci_driver);
+}
+
+
+MODULE_AUTHOR("Jeff Garzik");
+MODULE_DESCRIPTION("AHCI SATA low-level driver");
+MODULE_LICENSE("GPL");
+MODULE_DEVICE_TABLE(pci, ahci_pci_tbl);
+
+module_init(ahci_init);
+module_exit(ahci_exit);
diff -Nru a/drivers/scsi/libata-core.c b/drivers/scsi/libata-core.c
--- a/drivers/scsi/libata-core.c 2004-10-19 13:13:01 -04:00
+++ b/drivers/scsi/libata-core.c 2004-10-19 13:13:01 -04:00
@@ -39,6 +39,7 @@
#include <linux/workqueue.h>
#include <scsi/scsi.h>
#include "scsi.h"
+#include "scsi_priv.h"
#include <scsi/scsi_host.h>
#include <linux/libata.h>
#include <asm/io.h>
@@ -58,6 +59,7 @@
u8 *xfer_mode_out,
unsigned int *xfer_shift_out);
static int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat);
+static void __ata_qc_complete(struct ata_queued_cmd *qc);
static unsigned int ata_unique_id = 1;
static struct workqueue_struct *ata_wq;
@@ -2193,11 +2195,50 @@
kunmap(page);
}
-static void atapi_pio_sector(struct ata_queued_cmd *qc)
+static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
+{
+ int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
+ struct scatterlist *sg = qc->sg;
+ struct ata_port *ap = qc->ap;
+ struct page *page;
+ unsigned char *buf;
+ unsigned int count;
+
+ if (qc->curbytes == qc->nbytes - bytes)
+ ap->pio_task_state = PIO_ST_LAST;
+
+next_sg:
+ sg = &qc->sg[qc->cursg];
+ page = sg->page;
+
+ count = min(sg_dma_len(sg) - qc->cursg_ofs, bytes);
+ buf = kmap(page) + sg->offset + qc->cursg_ofs;
+
+ bytes -= count;
+ qc->curbytes += count;
+ qc->cursg_ofs += count;
+
+ if (qc->cursg_ofs == sg_dma_len(sg)) {
+ qc->cursg++;
+ qc->cursg_ofs = 0;
+ }
+
+ DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
+
+ /* do the actual data transfer */
+ ata_data_xfer(ap, buf, count, do_write);
+
+ kunmap(page);
+
+ if (bytes)
+ goto next_sg;
+}
+
+static void atapi_pio_bytes(struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc->ap;
struct ata_device *dev = qc->dev;
- unsigned int i, ireason, bc_lo, bc_hi, bytes;
+ unsigned int ireason, bc_lo, bc_hi, bytes;
int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
ap->ops->tf_read(ap, &qc->tf);
@@ -2215,16 +2256,7 @@
if (do_write != i_write)
goto err_out;
- /* make sure byte count is multiple of sector size; not
- * required by standard (warning! warning!), but IDE driver
- * does this to simplify things a bit. We are lazy, and
- * follow suit.
- */
- if (bytes & (ATA_SECT_SIZE - 1))
- goto err_out;
-
- for (i = 0; i < (bytes >> 9); i++)
- ata_pio_sector(qc);
+ __atapi_pio_bytes(qc, bytes);
return;
@@ -2265,19 +2297,30 @@
}
}
- /* handle BSY=0, DRQ=0 as error */
- if ((status & ATA_DRQ) == 0) {
- ap->pio_task_state = PIO_ST_ERR;
- return;
- }
-
qc = ata_qc_from_tag(ap, ap->active_tag);
assert(qc != NULL);
- if (is_atapi_taskfile(&qc->tf))
- atapi_pio_sector(qc);
- else
+ if (is_atapi_taskfile(&qc->tf)) {
+ /* no more data to transfer or unsupported ATAPI command */
+ if ((status & ATA_DRQ) == 0) {
+ ap->pio_task_state = PIO_ST_IDLE;
+
+ ata_irq_on(ap);
+
+ ata_qc_complete(qc, status);
+ return;
+ }
+
+ atapi_pio_bytes(qc);
+ } else {
+ /* handle BSY=0, DRQ=0 as error */
+ if ((status & ATA_DRQ) == 0) {
+ ap->pio_task_state = PIO_ST_ERR;
+ return;
+ }
+
ata_pio_sector(qc);
+ }
}
static void ata_pio_error(struct ata_port *ap)
@@ -2335,6 +2378,59 @@
}
}
+static void atapi_request_sense(struct ata_port *ap, struct ata_device *dev,
+ struct scsi_cmnd *cmd)
+{
+ DECLARE_COMPLETION(wait);
+ struct ata_queued_cmd *qc;
+ unsigned long flags;
+ int using_pio = dev->flags & ATA_DFLAG_PIO;
+ int rc;
+
+ DPRINTK("ATAPI request sense\n");
+
+ qc = ata_qc_new_init(ap, dev);
+ BUG_ON(qc == NULL);
+
+ /* FIXME: is this needed? */
+ memset(cmd->sense_buffer, 0, sizeof(cmd->sense_buffer));
+
+ ata_sg_init_one(qc, cmd->sense_buffer, sizeof(cmd->sense_buffer));
+ qc->pci_dma_dir = PCI_DMA_FROMDEVICE;
+
+ memset(&qc->cdb, 0, sizeof(ap->cdb_len));
+ qc->cdb[0] = REQUEST_SENSE;
+ qc->cdb[4] = SCSI_SENSE_BUFFERSIZE;
+
+ qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
+ qc->tf.command = ATA_CMD_PACKET;
+
+ if (using_pio) {
+ qc->tf.protocol = ATA_PROT_ATAPI;
+ qc->tf.lbam = (8 * 1024) & 0xff;
+ qc->tf.lbah = (8 * 1024) >> 8;
+
+ qc->nbytes = SCSI_SENSE_BUFFERSIZE;
+ } else {
+ qc->tf.protocol = ATA_PROT_ATAPI_DMA;
+ qc->tf.feature |= ATAPI_PKT_DMA;
+ }
+
+ qc->waiting = &wait;
+ qc->complete_fn = ata_qc_complete_noop;
+
+ spin_lock_irqsave(&ap->host_set->lock, flags);
+ rc = ata_qc_issue(qc);
+ spin_unlock_irqrestore(&ap->host_set->lock, flags);
+
+ if (rc)
+ ata_port_disable(ap);
+ else
+ wait_for_completion(&wait);
+
+ DPRINTK("EXIT\n");
+}
+
/**
* ata_qc_timeout - Handle timeout of queued command
* @qc: Command that timed out
@@ -2356,10 +2452,29 @@
static void ata_qc_timeout(struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc->ap;
+ struct ata_device *dev = qc->dev;
u8 host_stat = 0, drv_stat;
DPRINTK("ENTER\n");
+ /* FIXME: doesn't this conflict with timeout handling? */
+ if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) {
+ struct scsi_cmnd *cmd = qc->scsicmd;
+
+ if (!scsi_eh_eflags_chk(cmd, SCSI_EH_CANCEL_CMD)) {
+
+ /* finish completing original command */
+ __ata_qc_complete(qc);
+
+ atapi_request_sense(ap, dev, cmd);
+
+ cmd->result = (CHECK_CONDITION << 1) | (DID_OK << 16);
+ scsi_finish_command(cmd);
+
+ goto out;
+ }
+ }
+
/* hack alert! We cannot use the supplied completion
* function from inside the ->eh_strategy_handler() thread.
* libata is the only user of ->eh_strategy_handler() in
@@ -2393,7 +2508,7 @@
ata_qc_complete(qc, drv_stat);
break;
}
-
+out:
DPRINTK("EXIT\n");
}
@@ -2482,6 +2597,7 @@
qc->dev = dev;
qc->cursect = qc->cursg = qc->cursg_ofs = 0;
qc->nsect = 0;
+ qc->nbytes = qc->curbytes = 0;
ata_tf_init(ap, &qc->tf, dev->devno);
@@ -2497,6 +2613,30 @@
return 0;
}
+static void __ata_qc_complete(struct ata_queued_cmd *qc)
+{
+ struct ata_port *ap = qc->ap;
+ unsigned int tag, do_clear = 0;
+
+ qc->flags = 0;
+ tag = qc->tag;
+ if (likely(ata_tag_valid(tag))) {
+ if (tag == ap->active_tag)
+ ap->active_tag = ATA_TAG_POISON;
+ qc->tag = ATA_TAG_POISON;
+ do_clear = 1;
+ }
+
+ if (qc->waiting) {
+ struct completion *waiting = qc->waiting;
+ qc->waiting = NULL;
+ complete(waiting);
+ }
+
+ if (likely(do_clear))
+ clear_bit(tag, &ap->qactive);
+}
+
/**
* ata_qc_complete - Complete an active ATA command
* @qc: Command to complete
@@ -2508,8 +2648,6 @@
void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
{
- struct ata_port *ap = qc->ap;
- unsigned int tag, do_clear = 0;
int rc;
assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
@@ -2527,23 +2665,7 @@
if (rc != 0)
return;
- qc->flags = 0;
- tag = qc->tag;
- if (likely(ata_tag_valid(tag))) {
- if (tag == ap->active_tag)
- ap->active_tag = ATA_TAG_POISON;
- qc->tag = ATA_TAG_POISON;
- do_clear = 1;
- }
-
- if (qc->waiting) {
- struct completion *waiting = qc->waiting;
- qc->waiting = NULL;
- complete(waiting);
- }
-
- if (likely(do_clear))
- clear_bit(tag, &ap->qactive);
+ __ata_qc_complete(qc);
VPRINTK("EXIT\n");
}
diff -Nru a/drivers/scsi/libata-scsi.c b/drivers/scsi/libata-scsi.c
--- a/drivers/scsi/libata-scsi.c 2004-10-19 13:13:01 -04:00
+++ b/drivers/scsi/libata-scsi.c 2004-10-19 13:13:01 -04:00
@@ -1248,9 +1248,15 @@
{
struct scsi_cmnd *cmd = qc->scsicmd;
- if (unlikely(drv_stat & (ATA_ERR | ATA_BUSY | ATA_DRQ)))
+ if (unlikely(drv_stat & (ATA_ERR | ATA_BUSY | ATA_DRQ))) {
+ DPRINTK("request check condition\n");
+
cmd->result = SAM_STAT_CHECK_CONDITION;
- else {
+
+ qc->scsidone(cmd);
+
+ return 1;
+ } else {
u8 *scsicmd = cmd->cmnd;
if (scsicmd[0] == INQUIRY) {
@@ -1321,6 +1327,8 @@
qc->tf.feature |= ATAPI_DMADIR;
#endif
}
+
+ qc->nbytes = cmd->bufflen;
return 0;
}
diff -Nru a/drivers/scsi/sata_vsc.c b/drivers/scsi/sata_vsc.c
--- a/drivers/scsi/sata_vsc.c 2004-10-19 13:13:01 -04:00
+++ b/drivers/scsi/sata_vsc.c 2004-10-19 13:13:01 -04:00
@@ -333,6 +333,14 @@
pci_set_master(pdev);
+ /*
+ * Config offset 0x98 is "Extended Control and Status Register 0"
+ * Default value is (1 << 28). All bits except bit 28 are reserved in
+ * DPA mode. If bit 28 is set, LED 0 reflects all ports' activity.
+ * If bit 28 is clear, each port has its own LED.
+ */
+ pci_write_config_dword(pdev, 0x98, 0);
+
/* FIXME: check ata_device_add return value */
ata_device_add(probe_ent);
kfree(probe_ent);
diff -Nru a/include/linux/libata.h b/include/linux/libata.h
--- a/include/linux/libata.h 2004-10-19 13:13:01 -04:00
+++ b/include/linux/libata.h 2004-10-19 13:13:01 -04:00
@@ -230,6 +230,10 @@
unsigned int nsect;
unsigned int cursect;
+
+ unsigned int nbytes;
+ unsigned int curbytes;
+
unsigned int cursg;
unsigned int cursg_ofs;
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [BK PATCHES] 2.6.x libata updates
2005-03-08 0:33 ` Aurelien Jarno
@ 2005-03-08 0:41 ` Jeff Garzik
0 siblings, 0 replies; 7+ messages in thread
From: Jeff Garzik @ 2005-03-08 0:41 UTC (permalink / raw)
To: Aurelien Jarno; +Cc: Linux Kernel
Aurelien Jarno wrote:
> On Mon, Mar 07, 2005 at 12:12:04PM -0500, Jeff Garzik wrote:
>
>
>>Please do a
>>
>> bk pull bk://gkernel.bkbits.net/libata-2.6
>>
>>This will update the following files:
>>
>> drivers/scsi/libata-core.c | 16 ++++++----------
>> drivers/scsi/sata_nv.c | 6 ++++--
>> drivers/scsi/sata_sil.c | 2 +-
>> drivers/scsi/sata_svw.c | 4 ++--
>> drivers/scsi/sata_vsc.c | 3 ++-
>> 5 files changed, 15 insertions(+), 16 deletions(-)
>>
>>through these ChangeSets:
>>
>>Adam J. Richter:
>> o ata_pci_remove_one used freed memory
>>
>>Adrian Bunk:
>> o drivers/scsi/sata_*: make code static
>>
>
> Is there any plan to include the ATA pass thru functionality into the main
> kernel tree?
When the SCSI opcodes are standardized (sometime this month), and a few
final locking/sync issues looked into.
Jeff
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [BK PATCHES] 2.6.x libata updates
2005-03-07 17:12 Jeff Garzik
@ 2005-03-08 0:33 ` Aurelien Jarno
2005-03-08 0:41 ` Jeff Garzik
0 siblings, 1 reply; 7+ messages in thread
From: Aurelien Jarno @ 2005-03-08 0:33 UTC (permalink / raw)
To: Jeff Garzik; +Cc: Linux Kernel
On Mon, Mar 07, 2005 at 12:12:04PM -0500, Jeff Garzik wrote:
> Please do a
>
> bk pull bk://gkernel.bkbits.net/libata-2.6
>
> This will update the following files:
>
> drivers/scsi/libata-core.c | 16 ++++++----------
> drivers/scsi/sata_nv.c | 6 ++++--
> drivers/scsi/sata_sil.c | 2 +-
> drivers/scsi/sata_svw.c | 4 ++--
> drivers/scsi/sata_vsc.c | 3 ++-
> 5 files changed, 15 insertions(+), 16 deletions(-)
>
> through these ChangeSets:
>
> Adam J. Richter:
> o ata_pci_remove_one used freed memory
>
> Adrian Bunk:
> o drivers/scsi/sata_*: make code static
>
Is there any plan to include the ATA pass thru functionality into the main
kernel tree?
Thanks,
Aurelien
--
.''`. Aurelien Jarno | GPG: 1024D/F1BCDB73
: :' : Debian GNU/Linux developer | Electrical Engineer
`. `' aurel32@debian.org | aurelien@aurel32.net
`- people.debian.org/~aurel32 | www.aurel32.net
^ permalink raw reply [flat|nested] 7+ messages in thread
* [BK PATCHES] 2.6.x libata updates
@ 2005-03-07 17:12 Jeff Garzik
2005-03-08 0:33 ` Aurelien Jarno
0 siblings, 1 reply; 7+ messages in thread
From: Jeff Garzik @ 2005-03-07 17:12 UTC (permalink / raw)
To: Andrew Morton, Linus Torvalds; +Cc: linux-ide, Linux Kernel
[-- Attachment #1: Type: text/plain, Size: 0 bytes --]
[-- Attachment #2: changelog.txt --]
[-- Type: text/plain, Size: 503 bytes --]
Please do a
bk pull bk://gkernel.bkbits.net/libata-2.6
This will update the following files:
drivers/scsi/libata-core.c | 16 ++++++----------
drivers/scsi/sata_nv.c | 6 ++++--
drivers/scsi/sata_sil.c | 2 +-
drivers/scsi/sata_svw.c | 4 ++--
drivers/scsi/sata_vsc.c | 3 ++-
5 files changed, 15 insertions(+), 16 deletions(-)
through these ChangeSets:
Adam J. Richter:
o ata_pci_remove_one used freed memory
Adrian Bunk:
o drivers/scsi/sata_*: make code static
[-- Attachment #3: patch --]
[-- Type: text/plain, Size: 3544 bytes --]
diff -Nru a/drivers/scsi/libata-core.c b/drivers/scsi/libata-core.c
--- a/drivers/scsi/libata-core.c 2005-03-07 12:11:31 -05:00
+++ b/drivers/scsi/libata-core.c 2005-03-07 12:11:31 -05:00
@@ -3884,26 +3884,22 @@
ap = host_set->ports[i];
ata_scsi_release(ap->host);
- scsi_host_put(ap->host);
- }
-
- pci_release_regions(pdev);
-
- for (i = 0; i < host_set->n_ports; i++) {
- struct ata_ioports *ioaddr;
-
- ap = host_set->ports[i];
- ioaddr = &ap->ioaddr;
if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
+ struct ata_ioports *ioaddr = &ap->ioaddr;
+
if (ioaddr->cmd_addr == 0x1f0)
release_region(0x1f0, 8);
else if (ioaddr->cmd_addr == 0x170)
release_region(0x170, 8);
}
+
+ scsi_host_put(ap->host);
}
kfree(host_set);
+
+ pci_release_regions(pdev);
pci_disable_device(pdev);
dev_set_drvdata(dev, NULL);
}
diff -Nru a/drivers/scsi/sata_nv.c b/drivers/scsi/sata_nv.c
--- a/drivers/scsi/sata_nv.c 2005-03-07 12:11:31 -05:00
+++ b/drivers/scsi/sata_nv.c 2005-03-07 12:11:31 -05:00
@@ -99,7 +99,8 @@
#define NV_MCP_SATA_CFG_20_SATA_SPACE_EN 0x04
static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
-irqreturn_t nv_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
+static irqreturn_t nv_interrupt (int irq, void *dev_instance,
+ struct pt_regs *regs);
static u32 nv_scr_read (struct ata_port *ap, unsigned int sc_reg);
static void nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
static void nv_host_stop (struct ata_host_set *host_set);
@@ -257,7 +258,8 @@
MODULE_DEVICE_TABLE(pci, nv_pci_tbl);
MODULE_VERSION(DRV_VERSION);
-irqreturn_t nv_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
+static irqreturn_t nv_interrupt (int irq, void *dev_instance,
+ struct pt_regs *regs)
{
struct ata_host_set *host_set = dev_instance;
struct nv_host *host = host_set->private_data;
diff -Nru a/drivers/scsi/sata_sil.c b/drivers/scsi/sata_sil.c
--- a/drivers/scsi/sata_sil.c 2005-03-07 12:11:31 -05:00
+++ b/drivers/scsi/sata_sil.c 2005-03-07 12:11:31 -05:00
@@ -78,7 +78,7 @@
/* TODO firmware versions should be added - eric */
-struct sil_drivelist {
+static const struct sil_drivelist {
const char * product;
unsigned int quirk;
} sil_blacklist [] = {
diff -Nru a/drivers/scsi/sata_svw.c b/drivers/scsi/sata_svw.c
--- a/drivers/scsi/sata_svw.c 2005-03-07 12:11:31 -05:00
+++ b/drivers/scsi/sata_svw.c 2005-03-07 12:11:31 -05:00
@@ -156,7 +156,7 @@
* spin_lock_irqsave(host_set lock)
*/
-void k2_bmdma_setup_mmio (struct ata_queued_cmd *qc)
+static void k2_bmdma_setup_mmio (struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc->ap;
unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
@@ -186,7 +186,7 @@
* spin_lock_irqsave(host_set lock)
*/
-void k2_bmdma_start_mmio (struct ata_queued_cmd *qc)
+static void k2_bmdma_start_mmio (struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc->ap;
void *mmio = (void *) ap->ioaddr.bmdma_addr;
diff -Nru a/drivers/scsi/sata_vsc.c b/drivers/scsi/sata_vsc.c
--- a/drivers/scsi/sata_vsc.c 2005-03-07 12:11:31 -05:00
+++ b/drivers/scsi/sata_vsc.c 2005-03-07 12:11:31 -05:00
@@ -155,7 +155,8 @@
*
* Read the interrupt register and process for the devices that have them pending.
*/
-irqreturn_t vsc_sata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
+static irqreturn_t vsc_sata_interrupt (int irq, void *dev_instance,
+ struct pt_regs *regs)
{
struct ata_host_set *host_set = dev_instance;
unsigned int i;
^ permalink raw reply [flat|nested] 7+ messages in thread
* [BK PATCHES] 2.6.x libata updates
@ 2005-03-05 18:46 Jeff Garzik
0 siblings, 0 replies; 7+ messages in thread
From: Jeff Garzik @ 2005-03-05 18:46 UTC (permalink / raw)
To: Andrew Morton, Linus Torvalds; +Cc: linux-ide, Linux Kernel
[-- Attachment #1: Type: text/plain, Size: 0 bytes --]
[-- Attachment #2: changelog.txt --]
[-- Type: text/plain, Size: 670 bytes --]
Please do a
bk pull bk://gkernel.bkbits.net/libata-2.6
This will update the following files:
drivers/scsi/ahci.c | 12 +++++------
drivers/scsi/sata_qstor.c | 50 +++++++++++++++++++++++++++++++---------------
drivers/scsi/sata_vsc.c | 4 +--
3 files changed, 42 insertions(+), 24 deletions(-)
through these ChangeSets:
<liml:rtr.ca>:
o sata_qstor: eh_timeout fix
<tklauser:nuerscht.ch>:
o drivers/scsi/ahci: Use the DMA_{64,32}BIT_MASK constants
o drivers/scsi/sata_vsc: Use the DMA_{64,32}BIT_MASK constants
Jeff Garzik:
o [libata ahci] Print out port id on error messages
Mark Lord:
o [libata qstor] minor update per LKML comments
[-- Attachment #3: patch --]
[-- Type: text/plain, Size: 6062 bytes --]
diff -Nru a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c
--- a/drivers/scsi/ahci.c 2005-03-05 13:45:12 -05:00
+++ b/drivers/scsi/ahci.c 2005-03-05 13:45:12 -05:00
@@ -574,7 +574,7 @@
writel(tmp, port_mmio + PORT_CMD);
readl(port_mmio + PORT_CMD); /* flush */
- printk(KERN_WARNING "ata%u: error occurred, port reset\n", ap->port_no);
+ printk(KERN_WARNING "ata%u: error occurred, port reset\n", ap->id);
}
static void ahci_eng_timeout(struct ata_port *ap)
@@ -766,10 +766,10 @@
using_dac = hpriv->cap & HOST_CAP_64;
if (using_dac &&
- !pci_set_dma_mask(pdev, 0xffffffffffffffffULL)) {
- rc = pci_set_consistent_dma_mask(pdev, 0xffffffffffffffffULL);
+ !pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
+ rc = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
if (rc) {
- rc = pci_set_consistent_dma_mask(pdev, 0xffffffffULL);
+ rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
if (rc) {
printk(KERN_ERR DRV_NAME "(%s): 64-bit DMA enable failed\n",
pci_name(pdev));
@@ -779,13 +779,13 @@
hpriv->flags |= HOST_CAP_64;
} else {
- rc = pci_set_dma_mask(pdev, 0xffffffffULL);
+ rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
if (rc) {
printk(KERN_ERR DRV_NAME "(%s): 32-bit DMA enable failed\n",
pci_name(pdev));
return rc;
}
- rc = pci_set_consistent_dma_mask(pdev, 0xffffffffULL);
+ rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
if (rc) {
printk(KERN_ERR DRV_NAME "(%s): 32-bit consistent DMA enable failed\n",
pci_name(pdev));
diff -Nru a/drivers/scsi/sata_qstor.c b/drivers/scsi/sata_qstor.c
--- a/drivers/scsi/sata_qstor.c 2005-03-05 13:45:12 -05:00
+++ b/drivers/scsi/sata_qstor.c 2005-03-05 13:45:12 -05:00
@@ -38,7 +38,7 @@
#include <linux/libata.h>
#define DRV_NAME "sata_qstor"
-#define DRV_VERSION "0.03"
+#define DRV_VERSION "0.04"
enum {
QS_PORTS = 4,
@@ -120,6 +120,7 @@
static void qs_bmdma_stop(struct ata_port *ap);
static u8 qs_bmdma_status(struct ata_port *ap);
static void qs_irq_clear(struct ata_port *ap);
+static void qs_eng_timeout(struct ata_port *ap);
static Scsi_Host_Template qs_ata_sht = {
.module = THIS_MODULE,
@@ -152,7 +153,7 @@
.phy_reset = qs_phy_reset,
.qc_prep = qs_qc_prep,
.qc_issue = qs_qc_issue,
- .eng_timeout = ata_eng_timeout,
+ .eng_timeout = qs_eng_timeout,
.irq_handler = qs_intr,
.irq_clear = qs_irq_clear,
.scr_read = qs_scr_read,
@@ -212,7 +213,7 @@
/* nothing */
}
-static void qs_enter_reg_mode(struct ata_port *ap)
+static inline void qs_enter_reg_mode(struct ata_port *ap)
{
u8 __iomem *chan = ap->host_set->mmio_base + (ap->port_no * 0x4000);
@@ -220,17 +221,34 @@
readb(chan + QS_CCT_CTR0); /* flush */
}
-static void qs_phy_reset(struct ata_port *ap)
+static inline void qs_reset_channel_logic(struct ata_port *ap)
{
u8 __iomem *chan = ap->host_set->mmio_base + (ap->port_no * 0x4000);
- struct qs_port_priv *pp = ap->private_data;
- pp->state = qs_state_idle;
writeb(QS_CTR1_RCHN, chan + QS_CCT_CTR1);
+ readb(chan + QS_CCT_CTR0); /* flush */
qs_enter_reg_mode(ap);
+}
+
+static void qs_phy_reset(struct ata_port *ap)
+{
+ struct qs_port_priv *pp = ap->private_data;
+
+ pp->state = qs_state_idle;
+ qs_reset_channel_logic(ap);
sata_phy_reset(ap);
}
+static void qs_eng_timeout(struct ata_port *ap)
+{
+ struct qs_port_priv *pp = ap->private_data;
+
+ if (pp->state != qs_state_idle) /* healthy paranoia */
+ pp->state = qs_state_mmio;
+ qs_reset_channel_logic(ap);
+ ata_eng_timeout(ap);
+}
+
static u32 qs_scr_read (struct ata_port *ap, unsigned int sc_reg)
{
if (sc_reg > SCR_CONTROL)
@@ -261,11 +279,11 @@
u32 len;
addr = sg_dma_address(sg);
- *(u64 *)prd = cpu_to_le64(addr);
+ *(__le64 *)prd = cpu_to_le64(addr);
prd += sizeof(u64);
len = sg_dma_len(sg);
- *(u32 *)prd = cpu_to_le32(len);
+ *(__le32 *)prd = cpu_to_le32(len);
prd += sizeof(u64);
VPRINTK("PRD[%u] = (0x%llX, 0x%X)\n", nelem,
@@ -298,10 +316,10 @@
/* host control block (HCB) */
buf[ 0] = QS_HCB_HDR;
buf[ 1] = hflags;
- *(u32 *)(&buf[ 4]) = cpu_to_le32(qc->nsect * ATA_SECT_SIZE);
- *(u32 *)(&buf[ 8]) = cpu_to_le32(qc->n_elem);
+ *(__le32 *)(&buf[ 4]) = cpu_to_le32(qc->nsect * ATA_SECT_SIZE);
+ *(__le32 *)(&buf[ 8]) = cpu_to_le32(qc->n_elem);
addr = ((u64)pp->pkt_dma) + QS_CPB_BYTES;
- *(u64 *)(&buf[16]) = cpu_to_le64(addr);
+ *(__le64 *)(&buf[16]) = cpu_to_le64(addr);
/* device control block (DCB) */
buf[24] = QS_DCB_HDR;
@@ -566,10 +584,10 @@
int rc, have_64bit_bus = (bus_info & QS_HPHY_64BIT);
if (have_64bit_bus &&
- !pci_set_dma_mask(pdev, 0xffffffffffffffffULL)) {
- rc = pci_set_consistent_dma_mask(pdev, 0xffffffffffffffffULL);
+ !pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
+ rc = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
if (rc) {
- rc = pci_set_consistent_dma_mask(pdev, 0xffffffffULL);
+ rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
if (rc) {
printk(KERN_ERR DRV_NAME
"(%s): 64-bit DMA enable failed\n",
@@ -578,14 +596,14 @@
}
}
} else {
- rc = pci_set_dma_mask(pdev, 0xffffffffULL);
+ rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
if (rc) {
printk(KERN_ERR DRV_NAME
"(%s): 32-bit DMA enable failed\n",
pci_name(pdev));
return rc;
}
- rc = pci_set_consistent_dma_mask(pdev, 0xffffffffULL);
+ rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
if (rc) {
printk(KERN_ERR DRV_NAME
"(%s): 32-bit consistent DMA enable failed\n",
diff -Nru a/drivers/scsi/sata_vsc.c b/drivers/scsi/sata_vsc.c
--- a/drivers/scsi/sata_vsc.c 2005-03-05 13:45:12 -05:00
+++ b/drivers/scsi/sata_vsc.c 2005-03-05 13:45:12 -05:00
@@ -285,10 +285,10 @@
/*
* Use 32 bit DMA mask, because 64 bit address support is poor.
*/
- rc = pci_set_dma_mask(pdev, 0xFFFFFFFFULL);
+ rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
if (rc)
goto err_out_regions;
- rc = pci_set_consistent_dma_mask(pdev, 0xFFFFFFFFULL);
+ rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
if (rc)
goto err_out_regions;
^ permalink raw reply [flat|nested] 7+ messages in thread
* [BK PATCHES] 2.6.x libata updates
@ 2004-11-13 20:53 Jeff Garzik
0 siblings, 0 replies; 7+ messages in thread
From: Jeff Garzik @ 2004-11-13 20:53 UTC (permalink / raw)
To: Andrew Morton, Linus Torvalds; +Cc: linux-ide, linux-kernel
Please do a
bk pull bk://gkernel.bkbits.net/libata-2.6
This will update the following files:
drivers/scsi/Kconfig | 14 ++++----
drivers/scsi/ahci.c | 16 ++++-----
drivers/scsi/ata_piix.c | 16 +++++----
drivers/scsi/libata-core.c | 71 ++++++++++++++++++++++++--------------------
drivers/scsi/libata-scsi.c | 2 -
drivers/scsi/libata.h | 2 -
drivers/scsi/sata_nv.c | 13 ++++----
drivers/scsi/sata_promise.c | 13 ++++----
drivers/scsi/sata_sil.c | 5 +--
drivers/scsi/sata_sis.c | 9 +++--
drivers/scsi/sata_svw.c | 5 +--
drivers/scsi/sata_sx4.c | 13 ++++----
drivers/scsi/sata_uli.c | 9 +++--
drivers/scsi/sata_via.c | 3 +
drivers/scsi/sata_vsc.c | 5 +--
include/linux/libata.h | 44 ++++++++++++++++++---------
16 files changed, 141 insertions(+), 99 deletions(-)
through these ChangeSets:
<jgarzik@pobox.com> (04/11/13 1.2095)
[libata] bump versions, add MODULE_VERSION() tags
Also remove dep on CONFIG_EXPERIMENTAL for libata itself,
and several libata drivers.
<jgarzik@pobox.com> (04/11/12 1.2094)
[libata] remove dependence on PCI
Most of this work was done by "Mat Loikkanen" <Mat.Loikkanen@synopsys.com>.
* use struct device rather than struct pci_dev
* use generic DMA routines (dma_xxx) and generic struct device
routines (dev_xxx)
* isolate PCI-specific helpers inside CONFIG_PCI
diff -Nru a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig
--- a/drivers/scsi/Kconfig 2004-11-13 15:52:21 -05:00
+++ b/drivers/scsi/Kconfig 2004-11-13 15:52:21 -05:00
@@ -399,7 +399,7 @@
config SCSI_SATA
bool "Serial ATA (SATA) support"
- depends on SCSI && EXPERIMENTAL
+ depends on SCSI
help
This driver family supports Serial ATA host controllers
and devices.
@@ -408,15 +408,15 @@
config SCSI_SATA_AHCI
tristate "AHCI SATA support"
- depends on SCSI_SATA && PCI && EXPERIMENTAL
+ depends on SCSI_SATA && PCI
help
This option enables support for AHCI Serial ATA.
If unsure, say N.
config SCSI_SATA_SVW
- tristate "ServerWorks Frodo / Apple K2 SATA support (EXPERIMENTAL)"
- depends on SCSI_SATA && PCI && EXPERIMENTAL
+ tristate "ServerWorks Frodo / Apple K2 SATA support"
+ depends on SCSI_SATA && PCI
help
This option enables support for Broadcom/Serverworks/Apple K2
SATA support.
@@ -467,7 +467,7 @@
config SCSI_SATA_SIS
tristate "SiS 964/180 SATA support"
- depends on SCSI_SATA && PCI
+ depends on SCSI_SATA && PCI && EXPERIMENTAL
help
This option enables support for SiS Serial ATA 964/180.
@@ -483,7 +483,7 @@
config SCSI_SATA_VIA
tristate "VIA SATA support"
- depends on SCSI_SATA && PCI && EXPERIMENTAL
+ depends on SCSI_SATA && PCI
help
This option enables support for VIA Serial ATA.
@@ -491,7 +491,7 @@
config SCSI_SATA_VITESSE
tristate "VITESSE VSC-7174 SATA support"
- depends on SCSI_SATA && PCI && EXPERIMENTAL
+ depends on SCSI_SATA && PCI
help
This option enables support for Vitesse VSC7174 Serial ATA.
diff -Nru a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c
--- a/drivers/scsi/ahci.c 2004-11-13 15:52:21 -05:00
+++ b/drivers/scsi/ahci.c 2004-11-13 15:52:21 -05:00
@@ -270,7 +270,7 @@
static int ahci_port_start(struct ata_port *ap)
{
- struct pci_dev *pdev = ap->host_set->pdev;
+ struct device *dev = ap->host_set->dev;
struct ahci_host_priv *hpriv = ap->host_set->private_data;
struct ahci_port_priv *pp;
int rc;
@@ -289,7 +289,7 @@
}
memset(pp, 0, sizeof(*pp));
- mem = pci_alloc_consistent(pdev, AHCI_PORT_PRIV_DMA_SZ, &mem_dma);
+ mem = dma_alloc_coherent(dev, AHCI_PORT_PRIV_DMA_SZ, &mem_dma, GFP_KERNEL);
if (!mem) {
rc = -ENOMEM;
goto err_out_kfree;
@@ -353,7 +353,7 @@
static void ahci_port_stop(struct ata_port *ap)
{
- struct pci_dev *pdev = ap->host_set->pdev;
+ struct device *dev = ap->host_set->dev;
struct ahci_port_priv *pp = ap->private_data;
void *mmio = ap->host_set->mmio_base;
void *port_mmio = ahci_port_base(mmio, ap->port_no);
@@ -370,8 +370,8 @@
msleep(500);
ap->private_data = NULL;
- pci_free_consistent(pdev, AHCI_PORT_PRIV_DMA_SZ,
- pp->cmd_slot, pp->cmd_slot_dma);
+ dma_free_coherent(dev, AHCI_PORT_PRIV_DMA_SZ,
+ pp->cmd_slot, pp->cmd_slot_dma);
kfree(pp);
ata_port_stop(ap);
}
@@ -703,7 +703,7 @@
static int ahci_host_init(struct ata_probe_ent *probe_ent)
{
struct ahci_host_priv *hpriv = probe_ent->private_data;
- struct pci_dev *pdev = probe_ent->pdev;
+ struct pci_dev *pdev = to_pci_dev(probe_ent->dev);
void __iomem *mmio = probe_ent->mmio_base;
u32 tmp, cap_save;
u16 tmp16;
@@ -861,7 +861,7 @@
static void ahci_print_info(struct ata_probe_ent *probe_ent)
{
struct ahci_host_priv *hpriv = probe_ent->private_data;
- struct pci_dev *pdev = probe_ent->pdev;
+ struct pci_dev *pdev = to_pci_dev(probe_ent->dev);
void *mmio = probe_ent->mmio_base;
u32 vers, cap, impl, speed;
const char *speed_s;
@@ -965,7 +965,7 @@
}
memset(probe_ent, 0, sizeof(*probe_ent));
- probe_ent->pdev = pdev;
+ probe_ent->dev = pci_dev_to_dev(pdev);
INIT_LIST_HEAD(&probe_ent->node);
mmio_base = ioremap(pci_resource_start(pdev, AHCI_PCI_BAR),
diff -Nru a/drivers/scsi/ata_piix.c b/drivers/scsi/ata_piix.c
--- a/drivers/scsi/ata_piix.c 2004-11-13 15:52:21 -05:00
+++ b/drivers/scsi/ata_piix.c 2004-11-13 15:52:21 -05:00
@@ -32,7 +32,7 @@
#include <linux/libata.h>
#define DRV_NAME "ata_piix"
-#define DRV_VERSION "1.02"
+#define DRV_VERSION "1.03"
enum {
PIIX_IOCFG = 0x54, /* IDE I/O configuration register */
@@ -247,6 +247,7 @@
MODULE_DESCRIPTION("SCSI low-level driver for Intel PIIX/ICH ATA controllers");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, piix_pci_tbl);
+MODULE_VERSION(DRV_VERSION);
/**
* piix_pata_cbl_detect - Probe host controller cable detect info
@@ -260,7 +261,7 @@
*/
static void piix_pata_cbl_detect(struct ata_port *ap)
{
- struct pci_dev *pdev = ap->host_set->pdev;
+ struct pci_dev *pdev = to_pci_dev(ap->host_set->dev);
u8 tmp, mask;
/* no 80c support in host controller? */
@@ -293,8 +294,9 @@
static void piix_pata_phy_reset(struct ata_port *ap)
{
- if (!pci_test_config_bits(ap->host_set->pdev,
- &piix_enable_bits[ap->hard_port_no])) {
+ struct pci_dev *pdev = to_pci_dev(ap->host_set->dev);
+
+ if (!pci_test_config_bits(pdev, &piix_enable_bits[ap->hard_port_no])) {
ata_port_disable(ap);
printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id);
return;
@@ -322,7 +324,7 @@
*/
static int piix_sata_probe (struct ata_port *ap)
{
- struct pci_dev *pdev = ap->host_set->pdev;
+ struct pci_dev *pdev = to_pci_dev(ap->host_set->dev);
int combined = (ap->flags & ATA_FLAG_SLAVE_POSS);
int orig_mask, mask, i;
u8 pcs;
@@ -392,7 +394,7 @@
static void piix_set_piomode (struct ata_port *ap, struct ata_device *adev)
{
unsigned int pio = adev->pio_mode - XFER_PIO_0;
- struct pci_dev *dev = ap->host_set->pdev;
+ struct pci_dev *dev = to_pci_dev(ap->host_set->dev);
unsigned int is_slave = (adev->devno != 0);
unsigned int master_port= ap->hard_port_no ? 0x42 : 0x40;
unsigned int slave_port = 0x44;
@@ -444,7 +446,7 @@
static void piix_set_dmamode (struct ata_port *ap, struct ata_device *adev)
{
unsigned int udma = adev->dma_mode; /* FIXME: MWDMA too */
- struct pci_dev *dev = ap->host_set->pdev;
+ struct pci_dev *dev = to_pci_dev(ap->host_set->dev);
u8 maslave = ap->hard_port_no ? 0x42 : 0x40;
u8 speed = udma;
unsigned int drive_dn = (ap->hard_port_no ? 2 : 0) + adev->devno;
diff -Nru a/drivers/scsi/libata-core.c b/drivers/scsi/libata-core.c
--- a/drivers/scsi/libata-core.c 2004-11-13 15:52:21 -05:00
+++ b/drivers/scsi/libata-core.c 2004-11-13 15:52:21 -05:00
@@ -67,6 +67,7 @@
MODULE_AUTHOR("Jeff Garzik");
MODULE_DESCRIPTION("Library module for ATA devices");
MODULE_LICENSE("GPL");
+MODULE_VERSION(DRV_VERSION);
/**
* ata_tf_load - send taskfile registers to host controller
@@ -1017,7 +1018,7 @@
BUG_ON(qc == NULL);
ata_sg_init_one(qc, dev->id, sizeof(dev->id));
- qc->pci_dma_dir = PCI_DMA_FROMDEVICE;
+ qc->dma_dir = DMA_FROM_DEVICE;
qc->tf.protocol = ATA_PROT_PIO;
qc->nsect = 1;
@@ -1849,7 +1850,7 @@
{
struct ata_port *ap = qc->ap;
struct scatterlist *sg = qc->sg;
- int dir = qc->pci_dma_dir;
+ int dir = qc->dma_dir;
assert(qc->flags & ATA_QCFLAG_DMAMAP);
assert(sg != NULL);
@@ -1860,9 +1861,9 @@
DPRINTK("unmapping %u sg elements\n", qc->n_elem);
if (qc->flags & ATA_QCFLAG_SG)
- pci_unmap_sg(ap->host_set->pdev, sg, qc->n_elem, dir);
+ dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
else
- pci_unmap_single(ap->host_set->pdev, sg_dma_address(&sg[0]),
+ dma_unmap_single(ap->host_set->dev, sg_dma_address(&sg[0]),
sg_dma_len(&sg[0]), dir);
qc->flags &= ~ATA_QCFLAG_DMAMAP;
@@ -1973,13 +1974,13 @@
static int ata_sg_setup_one(struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc->ap;
- int dir = qc->pci_dma_dir;
+ int dir = qc->dma_dir;
struct scatterlist *sg = qc->sg;
dma_addr_t dma_address;
- dma_address = pci_map_single(ap->host_set->pdev, qc->buf_virt,
+ dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
sg_dma_len(sg), dir);
- if (pci_dma_mapping_error(dma_address))
+ if (dma_mapping_error(dma_address))
return -1;
sg_dma_address(sg) = dma_address;
@@ -2010,8 +2011,8 @@
VPRINTK("ENTER, ata%u\n", ap->id);
assert(qc->flags & ATA_QCFLAG_SG);
- dir = qc->pci_dma_dir;
- n_elem = pci_map_sg(ap->host_set->pdev, sg, qc->n_elem, dir);
+ dir = qc->dma_dir;
+ n_elem = dma_map_sg(ap->host_set->dev, sg, qc->n_elem, dir);
if (n_elem < 1)
return -1;
@@ -2416,7 +2417,7 @@
memset(cmd->sense_buffer, 0, sizeof(cmd->sense_buffer));
ata_sg_init_one(qc, cmd->sense_buffer, sizeof(cmd->sense_buffer));
- qc->pci_dma_dir = PCI_DMA_FROMDEVICE;
+ qc->dma_dir = DMA_FROM_DEVICE;
memset(&qc->cdb, 0, sizeof(ap->cdb_len));
qc->cdb[0] = REQUEST_SENSE;
@@ -3104,9 +3105,9 @@
int ata_port_start (struct ata_port *ap)
{
- struct pci_dev *pdev = ap->host_set->pdev;
+ struct device *dev = ap->host_set->dev;
- ap->prd = pci_alloc_consistent(pdev, ATA_PRD_TBL_SZ, &ap->prd_dma);
+ ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
if (!ap->prd)
return -ENOMEM;
@@ -3117,9 +3118,9 @@
void ata_port_stop (struct ata_port *ap)
{
- struct pci_dev *pdev = ap->host_set->pdev;
+ struct device *dev = ap->host_set->dev;
- pci_free_consistent(pdev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
+ dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
}
/**
@@ -3165,7 +3166,7 @@
host->max_channel = 1;
host->unique_id = ata_unique_id++;
host->max_cmd_len = 12;
- scsi_set_device(host, &ent->pdev->dev);
+ scsi_set_device(host, ent->dev);
scsi_assign_lock(host, &host_set->lock);
ap->flags = ATA_FLAG_PORT_DISABLED;
@@ -3252,7 +3253,7 @@
int ata_device_add(struct ata_probe_ent *ent)
{
unsigned int count = 0, i;
- struct pci_dev *pdev = ent->pdev;
+ struct device *dev = ent->dev;
struct ata_host_set *host_set;
DPRINTK("ENTER\n");
@@ -3264,7 +3265,7 @@
memset(host_set, 0, sizeof(struct ata_host_set) + (ent->n_ports * sizeof(void *)));
spin_lock_init(&host_set->lock);
- host_set->pdev = pdev;
+ host_set->dev = dev;
host_set->n_ports = ent->n_ports;
host_set->irq = ent->irq;
host_set->mmio_base = ent->mmio_base;
@@ -3332,7 +3333,7 @@
*/
}
- rc = scsi_add_host(ap->host, &pdev->dev);
+ rc = scsi_add_host(ap->host, dev);
if (rc) {
printk(KERN_ERR "ata%u: scsi_add_host failed\n",
ap->id);
@@ -3352,7 +3353,7 @@
scsi_scan_host(ap->host);
}
- pci_set_drvdata(pdev, host_set);
+ dev_set_drvdata(dev, host_set);
VPRINTK("EXIT, returning %u\n", ent->n_ports);
return ent->n_ports; /* success */
@@ -3413,7 +3414,7 @@
}
static struct ata_probe_ent *
-ata_probe_ent_alloc(int n, struct pci_dev *pdev, struct ata_port_info **port)
+ata_probe_ent_alloc(int n, struct device *dev, struct ata_port_info **port)
{
struct ata_probe_ent *probe_ent;
int i;
@@ -3421,7 +3422,7 @@
probe_ent = kmalloc(sizeof(*probe_ent) * n, GFP_KERNEL);
if (!probe_ent) {
printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
- pci_name(pdev));
+ kobject_name(&(dev->kobj)));
return NULL;
}
@@ -3429,7 +3430,7 @@
for (i = 0; i < n; i++) {
INIT_LIST_HEAD(&probe_ent[i].node);
- probe_ent[i].pdev = pdev;
+ probe_ent[i].dev = dev;
probe_ent[i].sht = port[i]->sht;
probe_ent[i].host_flags = port[i]->host_flags;
@@ -3443,10 +3444,12 @@
return probe_ent;
}
+#ifdef CONFIG_PCI
struct ata_probe_ent *
ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port)
{
- struct ata_probe_ent *probe_ent = ata_probe_ent_alloc(1, pdev, port);
+ struct ata_probe_ent *probe_ent =
+ ata_probe_ent_alloc(1, pci_dev_to_dev(pdev), port);
if (!probe_ent)
return NULL;
@@ -3475,7 +3478,8 @@
struct ata_probe_ent *
ata_pci_init_legacy_mode(struct pci_dev *pdev, struct ata_port_info **port)
{
- struct ata_probe_ent *probe_ent = ata_probe_ent_alloc(2, pdev, port);
+ struct ata_probe_ent *probe_ent =
+ ata_probe_ent_alloc(2, pci_dev_to_dev(pdev), port);
if (!probe_ent)
return NULL;
@@ -3651,7 +3655,8 @@
void ata_pci_remove_one (struct pci_dev *pdev)
{
- struct ata_host_set *host_set = pci_get_drvdata(pdev);
+ struct device *dev = pci_dev_to_dev(pdev);
+ struct ata_host_set *host_set = dev_get_drvdata(dev);
struct ata_port *ap;
unsigned int i;
@@ -3692,7 +3697,7 @@
kfree(host_set);
pci_disable_device(pdev);
- pci_set_drvdata(pdev, NULL);
+ dev_set_drvdata(dev, NULL);
}
/* move to PCI subsystem */
@@ -3728,6 +3733,7 @@
return (tmp == bits->val) ? 1 : 0;
}
+#endif /* CONFIG_PCI */
/**
@@ -3764,7 +3770,6 @@
* Do not depend on ABI/API stability.
*/
-EXPORT_SYMBOL_GPL(pci_test_config_bits);
EXPORT_SYMBOL_GPL(ata_std_bios_param);
EXPORT_SYMBOL_GPL(ata_std_ports);
EXPORT_SYMBOL_GPL(ata_device_add);
@@ -3779,8 +3784,6 @@
EXPORT_SYMBOL_GPL(ata_std_dev_select);
EXPORT_SYMBOL_GPL(ata_tf_to_fis);
EXPORT_SYMBOL_GPL(ata_tf_from_fis);
-EXPORT_SYMBOL_GPL(ata_pci_init_legacy_mode);
-EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
EXPORT_SYMBOL_GPL(ata_check_status);
EXPORT_SYMBOL_GPL(ata_exec_command);
EXPORT_SYMBOL_GPL(ata_port_start);
@@ -3795,8 +3798,6 @@
EXPORT_SYMBOL_GPL(__sata_phy_reset);
EXPORT_SYMBOL_GPL(ata_bus_reset);
EXPORT_SYMBOL_GPL(ata_port_disable);
-EXPORT_SYMBOL_GPL(ata_pci_init_one);
-EXPORT_SYMBOL_GPL(ata_pci_remove_one);
EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
EXPORT_SYMBOL_GPL(ata_scsi_error);
@@ -3806,3 +3807,11 @@
EXPORT_SYMBOL_GPL(ata_dev_classify);
EXPORT_SYMBOL_GPL(ata_dev_id_string);
EXPORT_SYMBOL_GPL(ata_scsi_simulate);
+
+#ifdef CONFIG_PCI
+EXPORT_SYMBOL_GPL(pci_test_config_bits);
+EXPORT_SYMBOL_GPL(ata_pci_init_legacy_mode);
+EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
+EXPORT_SYMBOL_GPL(ata_pci_init_one);
+EXPORT_SYMBOL_GPL(ata_pci_remove_one);
+#endif /* CONFIG_PCI */
diff -Nru a/drivers/scsi/libata-scsi.c b/drivers/scsi/libata-scsi.c
--- a/drivers/scsi/libata-scsi.c 2004-11-13 15:52:21 -05:00
+++ b/drivers/scsi/libata-scsi.c 2004-11-13 15:52:21 -05:00
@@ -678,7 +678,7 @@
ata_sg_init_one(qc, cmd->request_buffer,
cmd->request_bufflen);
- qc->pci_dma_dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
+ qc->dma_dir = cmd->sc_data_direction;
}
qc->complete_fn = ata_scsi_qc_complete;
diff -Nru a/drivers/scsi/libata.h b/drivers/scsi/libata.h
--- a/drivers/scsi/libata.h 2004-11-13 15:52:21 -05:00
+++ b/drivers/scsi/libata.h 2004-11-13 15:52:21 -05:00
@@ -26,7 +26,7 @@
#define __LIBATA_H__
#define DRV_NAME "libata"
-#define DRV_VERSION "1.02" /* must be exactly four chars */
+#define DRV_VERSION "1.10" /* must be exactly four chars */
struct ata_scsi_args {
u16 *id;
diff -Nru a/drivers/scsi/sata_nv.c b/drivers/scsi/sata_nv.c
--- a/drivers/scsi/sata_nv.c 2004-11-13 15:52:21 -05:00
+++ b/drivers/scsi/sata_nv.c 2004-11-13 15:52:21 -05:00
@@ -44,7 +44,7 @@
#include <linux/libata.h>
#define DRV_NAME "sata_nv"
-#define DRV_VERSION "0.03"
+#define DRV_VERSION "0.5"
#define NV_PORTS 2
#define NV_PIO_MASK 0x1f
@@ -234,6 +234,7 @@
MODULE_DESCRIPTION("low-level driver for NVIDIA nForce SATA controller");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, nv_pci_tbl);
+MODULE_VERSION(DRV_VERSION);
irqreturn_t nv_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
{
@@ -454,12 +455,13 @@
static void nv_enable_hotplug_ck804(struct ata_probe_ent *probe_ent)
{
+ struct pci_dev *pdev = to_pci_dev(probe_ent->dev);
u8 intr_mask;
u8 regval;
- pci_read_config_byte(probe_ent->pdev, NV_MCP_SATA_CFG_20, ®val);
+ pci_read_config_byte(pdev, NV_MCP_SATA_CFG_20, ®val);
regval |= NV_MCP_SATA_CFG_20_SATA_SPACE_EN;
- pci_write_config_byte(probe_ent->pdev, NV_MCP_SATA_CFG_20, regval);
+ pci_write_config_byte(pdev, NV_MCP_SATA_CFG_20, regval);
writeb(NV_INT_STATUS_HOTPLUG, probe_ent->mmio_base + NV_INT_STATUS_CK804);
@@ -471,6 +473,7 @@
static void nv_disable_hotplug_ck804(struct ata_host_set *host_set)
{
+ struct pci_dev *pdev = to_pci_dev(host_set->dev);
u8 intr_mask;
u8 regval;
@@ -480,9 +483,9 @@
writeb(intr_mask, host_set->mmio_base + NV_INT_ENABLE_CK804);
- pci_read_config_byte(host_set->pdev, NV_MCP_SATA_CFG_20, ®val);
+ pci_read_config_byte(pdev, NV_MCP_SATA_CFG_20, ®val);
regval &= ~NV_MCP_SATA_CFG_20_SATA_SPACE_EN;
- pci_write_config_byte(host_set->pdev, NV_MCP_SATA_CFG_20, regval);
+ pci_write_config_byte(pdev, NV_MCP_SATA_CFG_20, regval);
}
static void nv_check_hotplug_ck804(struct ata_host_set *host_set)
diff -Nru a/drivers/scsi/sata_promise.c b/drivers/scsi/sata_promise.c
--- a/drivers/scsi/sata_promise.c 2004-11-13 15:52:21 -05:00
+++ b/drivers/scsi/sata_promise.c 2004-11-13 15:52:21 -05:00
@@ -40,7 +40,7 @@
#include "sata_promise.h"
#define DRV_NAME "sata_promise"
-#define DRV_VERSION "1.00"
+#define DRV_VERSION "1.01"
enum {
@@ -174,7 +174,7 @@
static int pdc_port_start(struct ata_port *ap)
{
- struct pci_dev *pdev = ap->host_set->pdev;
+ struct device *dev = ap->host_set->dev;
struct pdc_port_priv *pp;
int rc;
@@ -189,7 +189,7 @@
}
memset(pp, 0, sizeof(*pp));
- pp->pkt = pci_alloc_consistent(pdev, 128, &pp->pkt_dma);
+ pp->pkt = dma_alloc_coherent(dev, 128, &pp->pkt_dma, GFP_KERNEL);
if (!pp->pkt) {
rc = -ENOMEM;
goto err_out_kfree;
@@ -209,11 +209,11 @@
static void pdc_port_stop(struct ata_port *ap)
{
- struct pci_dev *pdev = ap->host_set->pdev;
+ struct device *dev = ap->host_set->dev;
struct pdc_port_priv *pp = ap->private_data;
ap->private_data = NULL;
- pci_free_consistent(pdev, 128, pp->pkt, pp->pkt_dma);
+ dma_free_coherent(dev, 128, pp->pkt, pp->pkt_dma);
kfree(pp);
ata_port_stop(ap);
}
@@ -577,7 +577,7 @@
}
memset(probe_ent, 0, sizeof(*probe_ent));
- probe_ent->pdev = pdev;
+ probe_ent->dev = pci_dev_to_dev(pdev);
INIT_LIST_HEAD(&probe_ent->node);
mmio_base = ioremap(pci_resource_start(pdev, 3),
@@ -661,6 +661,7 @@
MODULE_DESCRIPTION("Promise SATA TX2/TX4 low-level driver");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, pdc_ata_pci_tbl);
+MODULE_VERSION(DRV_VERSION);
module_init(pdc_ata_init);
module_exit(pdc_ata_exit);
diff -Nru a/drivers/scsi/sata_sil.c b/drivers/scsi/sata_sil.c
--- a/drivers/scsi/sata_sil.c 2004-11-13 15:52:21 -05:00
+++ b/drivers/scsi/sata_sil.c 2004-11-13 15:52:21 -05:00
@@ -38,7 +38,7 @@
#include <linux/libata.h>
#define DRV_NAME "sata_sil"
-#define DRV_VERSION "0.54"
+#define DRV_VERSION "0.8"
enum {
sil_3112 = 0,
@@ -190,6 +190,7 @@
MODULE_DESCRIPTION("low-level driver for Silicon Image SATA controller");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, sil_pci_tbl);
+MODULE_VERSION(DRV_VERSION);
static void sil_post_set_mode (struct ata_port *ap)
{
@@ -363,7 +364,7 @@
memset(probe_ent, 0, sizeof(*probe_ent));
INIT_LIST_HEAD(&probe_ent->node);
- probe_ent->pdev = pdev;
+ probe_ent->dev = pci_dev_to_dev(pdev);
probe_ent->port_ops = sil_port_info[ent->driver_data].port_ops;
probe_ent->sht = sil_port_info[ent->driver_data].sht;
probe_ent->n_ports = (ent->driver_data == sil_3114) ? 4 : 2;
diff -Nru a/drivers/scsi/sata_sis.c b/drivers/scsi/sata_sis.c
--- a/drivers/scsi/sata_sis.c 2004-11-13 15:52:21 -05:00
+++ b/drivers/scsi/sata_sis.c 2004-11-13 15:52:21 -05:00
@@ -38,7 +38,7 @@
#include <linux/libata.h>
#define DRV_NAME "sata_sis"
-#define DRV_VERSION "0.10"
+#define DRV_VERSION "0.5"
enum {
sis_180 = 0,
@@ -128,6 +128,7 @@
MODULE_DESCRIPTION("low-level driver for Silicon Integratad Systems SATA controller");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, sis_pci_tbl);
+MODULE_VERSION(DRV_VERSION);
static unsigned int get_scr_cfg_addr(unsigned int port_no, unsigned int sc_reg)
{
@@ -140,22 +141,24 @@
static u32 sis_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg)
{
+ struct pci_dev *pdev = to_pci_dev(ap->host_set->dev);
unsigned int cfg_addr = get_scr_cfg_addr(ap->port_no, sc_reg);
u32 val;
if (sc_reg == SCR_ERROR) /* doesn't exist in PCI cfg space */
return 0xffffffff;
- pci_read_config_dword(ap->host_set->pdev, cfg_addr, &val);
+ pci_read_config_dword(pdev, cfg_addr, &val);
return val;
}
static void sis_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val)
{
+ struct pci_dev *pdev = to_pci_dev(ap->host_set->dev);
unsigned int cfg_addr = get_scr_cfg_addr(ap->port_no, scr);
if (scr == SCR_ERROR) /* doesn't exist in PCI cfg space */
return;
- pci_write_config_dword(ap->host_set->pdev, cfg_addr, val);
+ pci_write_config_dword(pdev, cfg_addr, val);
}
static u32 sis_scr_read (struct ata_port *ap, unsigned int sc_reg)
diff -Nru a/drivers/scsi/sata_svw.c b/drivers/scsi/sata_svw.c
--- a/drivers/scsi/sata_svw.c 2004-11-13 15:52:21 -05:00
+++ b/drivers/scsi/sata_svw.c 2004-11-13 15:52:21 -05:00
@@ -49,7 +49,7 @@
#endif /* CONFIG_PPC_OF */
#define DRV_NAME "sata_svw"
-#define DRV_VERSION "1.04"
+#define DRV_VERSION "1.05"
/* Taskfile registers offsets */
#define K2_SATA_TF_CMD_OFFSET 0x00
@@ -376,7 +376,7 @@
}
memset(probe_ent, 0, sizeof(*probe_ent));
- probe_ent->pdev = pdev;
+ probe_ent->dev = pci_dev_to_dev(pdev);
INIT_LIST_HEAD(&probe_ent->node);
mmio_base = ioremap(pci_resource_start(pdev, 5),
@@ -470,6 +470,7 @@
MODULE_DESCRIPTION("low-level driver for K2 SATA controller");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, k2_sata_pci_tbl);
+MODULE_VERSION(DRV_VERSION);
module_init(k2_sata_init);
module_exit(k2_sata_exit);
diff -Nru a/drivers/scsi/sata_sx4.c b/drivers/scsi/sata_sx4.c
--- a/drivers/scsi/sata_sx4.c 2004-11-13 15:52:21 -05:00
+++ b/drivers/scsi/sata_sx4.c 2004-11-13 15:52:21 -05:00
@@ -40,7 +40,7 @@
#include "sata_promise.h"
#define DRV_NAME "sata_sx4"
-#define DRV_VERSION "0.50"
+#define DRV_VERSION "0.7"
enum {
@@ -248,7 +248,7 @@
static int pdc_port_start(struct ata_port *ap)
{
- struct pci_dev *pdev = ap->host_set->pdev;
+ struct device *dev = ap->host_set->dev;
struct pdc_port_priv *pp;
int rc;
@@ -263,7 +263,7 @@
}
memset(pp, 0, sizeof(*pp));
- pp->pkt = pci_alloc_consistent(pdev, 128, &pp->pkt_dma);
+ pp->pkt = dma_alloc_coherent(dev, 128, &pp->pkt_dma, GFP_KERNEL);
if (!pp->pkt) {
rc = -ENOMEM;
goto err_out_kfree;
@@ -283,11 +283,11 @@
static void pdc_port_stop(struct ata_port *ap)
{
- struct pci_dev *pdev = ap->host_set->pdev;
+ struct device *dev = ap->host_set->dev;
struct pdc_port_priv *pp = ap->private_data;
ap->private_data = NULL;
- pci_free_consistent(pdev, 128, pp->pkt, pp->pkt_dma);
+ dma_free_coherent(dev, 128, pp->pkt, pp->pkt_dma);
kfree(pp);
ata_port_stop(ap);
}
@@ -1397,7 +1397,7 @@
}
memset(probe_ent, 0, sizeof(*probe_ent));
- probe_ent->pdev = pdev;
+ probe_ent->dev = pci_dev_to_dev(pdev);
INIT_LIST_HEAD(&probe_ent->node);
mmio_base = ioremap(pci_resource_start(pdev, 3),
@@ -1492,6 +1492,7 @@
MODULE_DESCRIPTION("Promise SATA low-level driver");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, pdc_sata_pci_tbl);
+MODULE_VERSION(DRV_VERSION);
module_init(pdc_sata_init);
module_exit(pdc_sata_exit);
diff -Nru a/drivers/scsi/sata_uli.c b/drivers/scsi/sata_uli.c
--- a/drivers/scsi/sata_uli.c 2004-11-13 15:52:21 -05:00
+++ b/drivers/scsi/sata_uli.c 2004-11-13 15:52:21 -05:00
@@ -32,7 +32,7 @@
#include <linux/libata.h>
#define DRV_NAME "sata_uli"
-#define DRV_VERSION "0.11"
+#define DRV_VERSION "0.2"
enum {
uli_5289 = 0,
@@ -123,6 +123,7 @@
MODULE_DESCRIPTION("low-level driver for ULi Electronics SATA controller");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, uli_pci_tbl);
+MODULE_VERSION(DRV_VERSION);
static unsigned int get_scr_cfg_addr(unsigned int port_no, unsigned int sc_reg)
{
@@ -149,18 +150,20 @@
static u32 uli_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg)
{
+ struct pci_dev *pdev = to_pci_dev(ap->host_set->dev);
unsigned int cfg_addr = get_scr_cfg_addr(ap->port_no, sc_reg);
u32 val;
- pci_read_config_dword(ap->host_set->pdev, cfg_addr, &val);
+ pci_read_config_dword(pdev, cfg_addr, &val);
return val;
}
static void uli_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val)
{
+ struct pci_dev *pdev = to_pci_dev(ap->host_set->dev);
unsigned int cfg_addr = get_scr_cfg_addr(ap->port_no, scr);
- pci_write_config_dword(ap->host_set->pdev, cfg_addr, val);
+ pci_write_config_dword(pdev, cfg_addr, val);
}
static u32 uli_scr_read (struct ata_port *ap, unsigned int sc_reg)
diff -Nru a/drivers/scsi/sata_via.c b/drivers/scsi/sata_via.c
--- a/drivers/scsi/sata_via.c 2004-11-13 15:52:21 -05:00
+++ b/drivers/scsi/sata_via.c 2004-11-13 15:52:21 -05:00
@@ -38,7 +38,7 @@
#include <asm/io.h>
#define DRV_NAME "sata_via"
-#define DRV_VERSION "0.20"
+#define DRV_VERSION "1.0"
enum {
via_sata = 0,
@@ -138,6 +138,7 @@
MODULE_DESCRIPTION("SCSI low-level driver for VIA SATA controllers");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, svia_pci_tbl);
+MODULE_VERSION(DRV_VERSION);
static u32 svia_scr_read (struct ata_port *ap, unsigned int sc_reg)
{
diff -Nru a/drivers/scsi/sata_vsc.c b/drivers/scsi/sata_vsc.c
--- a/drivers/scsi/sata_vsc.c 2004-11-13 15:52:21 -05:00
+++ b/drivers/scsi/sata_vsc.c 2004-11-13 15:52:21 -05:00
@@ -26,7 +26,7 @@
#include <linux/libata.h>
#define DRV_NAME "sata_vsc"
-#define DRV_VERSION "0.01"
+#define DRV_VERSION "1.0"
/* Interrupt register offsets (from chip base address) */
#define VSC_SATA_INT_STAT_OFFSET 0x00
@@ -293,7 +293,7 @@
goto err_out_regions;
}
memset(probe_ent, 0, sizeof(*probe_ent));
- probe_ent->pdev = pdev;
+ probe_ent->dev = pci_dev_to_dev(pdev);
INIT_LIST_HEAD(&probe_ent->node);
mmio_base = ioremap(pci_resource_start(pdev, 0),
@@ -393,6 +393,7 @@
MODULE_DESCRIPTION("low-level driver for Vitesse VSC7174 SATA controller");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, vsc_sata_pci_tbl);
+MODULE_VERSION(DRV_VERSION);
module_init(vsc_sata_init);
module_exit(vsc_sata_exit);
diff -Nru a/include/linux/libata.h b/include/linux/libata.h
--- a/include/linux/libata.h 2004-11-13 15:52:21 -05:00
+++ b/include/linux/libata.h 2004-11-13 15:52:21 -05:00
@@ -25,6 +25,7 @@
#include <linux/delay.h>
#include <linux/interrupt.h>
+#include <linux/pci.h>
#include <asm/io.h>
#include <linux/ata.h>
#include <linux/workqueue.h>
@@ -68,6 +69,12 @@
/* defines only for the constants which don't work well as enums */
#define ATA_TAG_POISON 0xfafbfcfdU
+/* move to PCI layer? */
+static inline struct device *pci_dev_to_dev(struct pci_dev *pdev)
+{
+ return &pdev->dev;
+}
+
enum {
/* various global constants */
LIBATA_MAX_PRD = ATA_MAX_PRD / 2,
@@ -184,7 +191,7 @@
struct ata_probe_ent {
struct list_head node;
- struct pci_dev *pdev;
+ struct device *dev;
struct ata_port_operations *port_ops;
Scsi_Host_Template *sht;
struct ata_ioports port[ATA_MAX_PORTS];
@@ -203,7 +210,7 @@
struct ata_host_set {
spinlock_t lock;
- struct pci_dev *pdev;
+ struct device *dev;
unsigned long irq;
void __iomem *mmio_base;
unsigned int n_ports;
@@ -226,7 +233,7 @@
unsigned int tag;
unsigned int n_elem;
- int pci_dma_dir;
+ int dma_dir;
unsigned int nsect;
unsigned int cursect;
@@ -361,12 +368,6 @@
struct ata_port_operations *port_ops;
};
-struct pci_bits {
- unsigned int reg; /* PCI config register to read */
- unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */
- unsigned long mask;
- unsigned long val;
-};
extern void ata_port_probe(struct ata_port *);
extern void __sata_phy_reset(struct ata_port *ap);
@@ -374,9 +375,11 @@
extern void ata_bus_reset(struct ata_port *ap);
extern void ata_port_disable(struct ata_port *);
extern void ata_std_ports(struct ata_ioports *ioaddr);
+#ifdef CONFIG_PCI
extern int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
unsigned int n_ports);
extern void ata_pci_remove_one (struct pci_dev *pdev);
+#endif /* CONFIG_PCI */
extern int ata_device_add(struct ata_probe_ent *ent);
extern int ata_scsi_detect(Scsi_Host_Template *sht);
extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
@@ -398,10 +401,6 @@
extern int ata_port_start (struct ata_port *ap);
extern void ata_port_stop (struct ata_port *ap);
extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
-extern struct ata_probe_ent *
-ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port);
-extern struct ata_probe_ent *
-ata_pci_init_legacy_mode(struct pci_dev *pdev, struct ata_port_info **port);
extern void ata_qc_prep(struct ata_queued_cmd *qc);
extern int ata_qc_issue_prot(struct ata_queued_cmd *qc);
extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf,
@@ -414,7 +413,6 @@
extern void ata_bmdma_setup (struct ata_queued_cmd *qc);
extern void ata_bmdma_start (struct ata_queued_cmd *qc);
extern void ata_bmdma_irq_clear(struct ata_port *ap);
-extern int pci_test_config_bits(struct pci_dev *pdev, struct pci_bits *bits);
extern void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat);
extern void ata_eng_timeout(struct ata_port *ap);
extern void ata_scsi_simulate(u16 *id, struct scsi_cmnd *cmd,
@@ -423,6 +421,24 @@
struct block_device *bdev,
sector_t capacity, int geom[]);
extern int ata_scsi_slave_config(struct scsi_device *sdev);
+
+
+#ifdef CONFIG_PCI
+struct pci_bits {
+ unsigned int reg; /* PCI config register to read */
+ unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */
+ unsigned long mask;
+ unsigned long val;
+};
+
+extern struct ata_probe_ent *
+ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port);
+extern struct ata_probe_ent *
+ata_pci_init_legacy_mode(struct pci_dev *pdev, struct ata_port_info **port);
+extern int pci_test_config_bits(struct pci_dev *pdev, struct pci_bits *bits);
+
+#endif /* CONFIG_PCI */
+
static inline unsigned int ata_tag_valid(unsigned int tag)
{
^ permalink raw reply [flat|nested] 7+ messages in thread
* [BK PATCHES] 2.6.x libata updates
@ 2004-01-20 19:20 Jeff Garzik
0 siblings, 0 replies; 7+ messages in thread
From: Jeff Garzik @ 2004-01-20 19:20 UTC (permalink / raw)
To: akpm, torvalds; +Cc: linux-kernel
(just driver updates)
Please do a
bk pull bk://gkernel.bkbits.net/libata-2.5
This will update the following files:
drivers/scsi/sata_sil.c | 125 ++++++++++++++++++++++++++++++++++++++++------
drivers/scsi/sata_svw.c | 129 ++++++++++++++++++++++++++----------------------
2 files changed, 178 insertions(+), 76 deletions(-)
through these ChangeSets:
<benh@kernel.crashing.org> (04/01/14 1.1474.88.10)
[libata sata_svw] cleanup, better probing
* use fewer magic numbers
* probe all 4 ports, using standard SATA SCRs
* limit udma mask to 0x3f
* clean up PPC-specific procfs stuff
<arubin@atl.lmco.com> (04/01/14 1.1474.88.9)
[libata sata_sil] add pci id for Silicon Image 3512
<normalperson@yhbt.net> (04/01/14 1.1474.88.8)
[libata sata_sil] cleaner, better version of errata workarounds
No longer unfairly punishes non-errata Seagate and Maxtor drives.
<marchand@kde.org> (04/01/06 1.1474.80.3)
[libata sata_sil] add support for adaptec 1210sa, 4-port sii 3114
<jgarzik@redhat.com> (04/01/06 1.1474.80.2)
[libata sata_svr] fix DRV_NAME to reflect actual driver filename
<jgarzik@redhat.com> (03/12/30 1.1474.65.1)
[libata sata_sil] unmask interrupts during initialization
Prudent in general, and needed for Adaptec BIOSes.
diff -Nru a/drivers/scsi/sata_sil.c b/drivers/scsi/sata_sil.c
--- a/drivers/scsi/sata_sil.c Tue Jan 20 14:18:05 2004
+++ b/drivers/scsi/sata_sil.c Tue Jan 20 14:18:05 2004
@@ -34,11 +34,16 @@
#include "hosts.h"
#include <linux/libata.h>
-#define DRV_NAME "ata_sil"
-#define DRV_VERSION "0.51"
+#define DRV_NAME "sata_sil"
+#define DRV_VERSION "0.52"
enum {
sil_3112 = 0,
+ sil_3114 = 1,
+
+ SIL_SYSCFG = 0x48,
+ SIL_MASK_IDE0_INT = (1 << 22),
+ SIL_MASK_IDE1_INT = (1 << 23),
SIL_IDE0_TF = 0x80,
SIL_IDE0_CTL = 0x8A,
@@ -49,6 +54,19 @@
SIL_IDE1_CTL = 0xCA,
SIL_IDE1_BMDMA = 0x08,
SIL_IDE1_SCR = 0x180,
+
+ SIL_IDE2_TF = 0x280,
+ SIL_IDE2_CTL = 0x28A,
+ SIL_IDE2_BMDMA = 0x200,
+ SIL_IDE2_SCR = 0x300,
+
+ SIL_IDE3_TF = 0x2C0,
+ SIL_IDE3_CTL = 0x2CA,
+ SIL_IDE3_BMDMA = 0x208,
+ SIL_IDE3_SCR = 0x380,
+
+ SIL_QUIRK_MOD15WRITE = (1 << 0),
+ SIL_QUIRK_UDMA5MAX = (1 << 1),
};
static void sil_set_piomode (struct ata_port *ap, struct ata_device *adev,
@@ -62,9 +80,33 @@
static struct pci_device_id sil_pci_tbl[] = {
{ 0x1095, 0x3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 },
+ { 0x1095, 0x0240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 },
+ { 0x1095, 0x3512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 },
+ { 0x1095, 0x3114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3114 },
{ } /* terminate list */
};
+
+/* TODO firmware versions should be added - eric */
+struct sil_drivelist {
+ const char * product;
+ unsigned int quirk;
+} sil_blacklist [] = {
+ { "ST320012AS", SIL_QUIRK_MOD15WRITE },
+ { "ST330013AS", SIL_QUIRK_MOD15WRITE },
+ { "ST340017AS", SIL_QUIRK_MOD15WRITE },
+ { "ST360015AS", SIL_QUIRK_MOD15WRITE },
+ { "ST380023AS", SIL_QUIRK_MOD15WRITE },
+ { "ST3120023AS", SIL_QUIRK_MOD15WRITE },
+ { "ST340014ASL", SIL_QUIRK_MOD15WRITE },
+ { "ST360014ASL", SIL_QUIRK_MOD15WRITE },
+ { "ST380011ASL", SIL_QUIRK_MOD15WRITE },
+ { "ST3120022ASL", SIL_QUIRK_MOD15WRITE },
+ { "ST3160021ASL", SIL_QUIRK_MOD15WRITE },
+ { "Maxtor 4D060H3", SIL_QUIRK_UDMA5MAX },
+ { }
+};
+
static struct pci_driver sil_pci_driver = {
.name = DRV_NAME,
.id_table = sil_pci_tbl,
@@ -120,6 +162,14 @@
.pio_mask = 0x03, /* pio3-4 */
.udma_mask = 0x7f, /* udma0-6; FIXME */
.port_ops = &sil_ops,
+ }, /* sil_3114 */
+ {
+ .sht = &sil_sht,
+ .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
+ ATA_FLAG_SRST | ATA_FLAG_MMIO,
+ .pio_mask = 0x03, /* pio3-4 */
+ .udma_mask = 0x7f, /* udma0-6; FIXME */
+ .port_ops = &sil_ops,
},
};
@@ -182,34 +232,52 @@
* information on these errata, I will create a more exhaustive
* list, and apply the fixups to only the specific
* devices/hosts/firmwares that need it.
+ *
+ * 20040111 - Seagate drives affected by the Mod15Write bug are blacklisted
+ * The Maxtor quirk is in the blacklist, but I'm keeping the original
+ * pessimistic fix for the following reasons:
+ * - There seems to be less info on it, only one device gleaned off the
+ * Windows driver, maybe only one is affected. More info would be greatly
+ * appreciated.
+ * - But then again UDMA5 is hardly anything to complain about
*/
static void sil_dev_config(struct ata_port *ap, struct ata_device *dev)
{
+ unsigned int n, quirks = 0;
+ u32 class_rev = 0;
const char *s = &dev->product[0];
unsigned int len = strnlen(s, sizeof(dev->product));
+ pci_read_config_dword(ap->host_set->pdev, PCI_CLASS_REVISION, &class_rev);
+ class_rev &= 0xff;
+
/* ATAPI specifies that empty space is blank-filled; remove blanks */
while ((len > 0) && (s[len - 1] == ' '))
len--;
- /* limit to udma5 */
- if (!memcmp(s, "Maxtor ", 7)) {
- printk(KERN_INFO "ata%u(%u): applying pessimistic Maxtor errata fix\n",
+ for (n = 0; sil_blacklist[n].product; n++)
+ if (!memcmp(sil_blacklist[n].product, s,
+ strlen(sil_blacklist[n].product))) {
+ quirks = sil_blacklist[n].quirk;
+ break;
+ }
+
+ /* limit requests to 15 sectors */
+ if ((class_rev <= 0x01) && (quirks & SIL_QUIRK_MOD15WRITE)) {
+ printk(KERN_INFO "ata%u(%u): applying Seagate errata fix\n",
ap->id, dev->devno);
- ap->udma_mask &= ATA_UDMA5;
+ ap->host->max_sectors = 15;
+ ap->host->hostt->max_sectors = 15;
return;
}
- /* limit requests to 15 sectors */
- if ((len > 4) && (!memcmp(s, "ST", 2))) {
- if ((!memcmp(s + len - 2, "AS", 2)) ||
- (!memcmp(s + len - 3, "ASL", 3))) {
- printk(KERN_INFO "ata%u(%u): applying pessimistic Seagate errata fix\n",
- ap->id, dev->devno);
- ap->host->max_sectors = 15;
- ap->host->hostt->max_sectors = 15;
- return;
- }
+ /* limit to udma5 */
+ /* is this for (class_rev <= 0x01) only, too? */
+ if (quirks & SIL_QUIRK_UDMA5MAX) {
+ printk(KERN_INFO "ata%u(%u): applying Maxtor errata fix %s\n",
+ ap->id, dev->devno, s);
+ ap->udma_mask &= ATA_UDMA5;
+ return;
}
}
@@ -236,6 +304,7 @@
unsigned long base;
void *mmio_base;
int rc;
+ u32 tmp;
if (!printed_version++)
printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n");
@@ -267,7 +336,7 @@
probe_ent->pdev = pdev;
probe_ent->port_ops = sil_port_info[ent->driver_data].port_ops;
probe_ent->sht = sil_port_info[ent->driver_data].sht;
- probe_ent->n_ports = 2;
+ probe_ent->n_ports = (ent->driver_data == sil_3114) ? 4 : 2;
probe_ent->pio_mask = sil_port_info[ent->driver_data].pio_mask;
probe_ent->udma_mask = sil_port_info[ent->driver_data].udma_mask;
probe_ent->irq = pdev->irq;
@@ -295,6 +364,28 @@
probe_ent->port[1].bmdma_addr = base + SIL_IDE1_BMDMA;
probe_ent->port[1].scr_addr = base + SIL_IDE1_SCR;
ata_std_ports(&probe_ent->port[1]);
+
+ /* make sure IDE0/1 interrupts are not masked */
+ tmp = readl(mmio_base + SIL_SYSCFG);
+ if (tmp & (SIL_MASK_IDE0_INT | SIL_MASK_IDE1_INT)) {
+ tmp &= ~(SIL_MASK_IDE0_INT | SIL_MASK_IDE1_INT);
+ writel(tmp, mmio_base + SIL_SYSCFG);
+ readl(mmio_base + SIL_SYSCFG); /* flush */
+ }
+
+ if (ent->driver_data == sil_3114) {
+ probe_ent->port[2].cmd_addr = base + SIL_IDE2_TF;
+ probe_ent->port[2].ctl_addr = base + SIL_IDE2_CTL;
+ probe_ent->port[2].bmdma_addr = base + SIL_IDE2_BMDMA;
+ probe_ent->port[2].scr_addr = base + SIL_IDE2_SCR;
+ ata_std_ports(&probe_ent->port[2]);
+
+ probe_ent->port[3].cmd_addr = base + SIL_IDE3_TF;
+ probe_ent->port[3].ctl_addr = base + SIL_IDE3_CTL;
+ probe_ent->port[3].bmdma_addr = base + SIL_IDE3_BMDMA;
+ probe_ent->port[3].scr_addr = base + SIL_IDE3_SCR;
+ ata_std_ports(&probe_ent->port[3]);
+ }
pci_set_master(pdev);
diff -Nru a/drivers/scsi/sata_svw.c b/drivers/scsi/sata_svw.c
--- a/drivers/scsi/sata_svw.c Tue Jan 20 14:18:05 2004
+++ b/drivers/scsi/sata_svw.c Tue Jan 20 14:18:05 2004
@@ -38,13 +38,41 @@
#include "hosts.h"
#include <linux/libata.h>
-#ifdef CONFIG_ALL_PPC
+#ifdef CONFIG_PPC_OF
#include <asm/prom.h>
#include <asm/pci-bridge.h>
-#endif /* CONFIG_ALL_PPC */
+#endif /* CONFIG_PPC_OF */
-#define DRV_NAME "ata_k2"
-#define DRV_VERSION "1.03"
+#define DRV_NAME "sata_svw"
+#define DRV_VERSION "1.04"
+
+/* Taskfile registers offsets */
+#define K2_SATA_TF_CMD_OFFSET 0x00
+#define K2_SATA_TF_DATA_OFFSET 0x00
+#define K2_SATA_TF_ERROR_OFFSET 0x04
+#define K2_SATA_TF_NSECT_OFFSET 0x08
+#define K2_SATA_TF_LBAL_OFFSET 0x0c
+#define K2_SATA_TF_LBAM_OFFSET 0x10
+#define K2_SATA_TF_LBAH_OFFSET 0x14
+#define K2_SATA_TF_DEVICE_OFFSET 0x18
+#define K2_SATA_TF_CMDSTAT_OFFSET 0x1c
+#define K2_SATA_TF_CTL_OFFSET 0x20
+
+/* DMA base */
+#define K2_SATA_DMA_CMD_OFFSET 0x30
+
+/* SCRs base */
+#define K2_SATA_SCR_STATUS_OFFSET 0x40
+#define K2_SATA_SCR_ERROR_OFFSET 0x44
+#define K2_SATA_SCR_CONTROL_OFFSET 0x48
+
+/* Others */
+#define K2_SATA_SICR1_OFFSET 0x80
+#define K2_SATA_SICR2_OFFSET 0x84
+#define K2_SATA_SIM_OFFSET 0x88
+
+/* Port stride */
+#define K2_SATA_PORT_OFFSET 0x100
static u32 k2_sata_scr_read (struct ata_port *ap, unsigned int sc_reg)
@@ -139,7 +167,7 @@
}
-#ifdef CONFIG_ALL_PPC
+#ifdef CONFIG_PPC_OF
/*
* k2_sata_proc_info
* inout : decides on the direction of the dataflow and the meaning of the
@@ -151,29 +179,15 @@
* length: If inout==FALSE max number of bytes to be written into the buffer
* else number of bytes in the buffer
*/
-static int k2_sata_proc_info(char *page, char **start, off_t offset, int count,
- int hostno, int inout)
+static int k2_sata_proc_info(struct Scsi_Host *shost, char *page, char **start,
+ off_t offset, int count, int inout)
{
- struct Scsi_Host *hpnt;
struct ata_port *ap;
struct device_node *np;
int len, index;
- /* Find ourself. That's locking-broken, shitty etc... but thanks to
- * /proc/scsi interface and lack of state kept around in this driver,
- * its best I want to do for now...
- */
- hpnt = scsi_hostlist;
- while (hpnt) {
- if (hostno == hpnt->host_no)
- break;
- hpnt = hpnt->next;
- }
- if (!hpnt)
- return 0;
-
/* Find the ata_port */
- ap = (struct ata_port *) &hpnt->hostdata[0];
+ ap = (struct ata_port *) &shost->hostdata[0];
if (ap == NULL)
return 0;
@@ -198,7 +212,7 @@
return len;
}
-#endif /* CONFIG_ALL_PPC */
+#endif /* CONFIG_PPC_OF */
static Scsi_Host_Template k2_sata_sht = {
@@ -216,8 +230,8 @@
.proc_name = DRV_NAME,
.dma_boundary = ATA_DMA_BOUNDARY,
.slave_configure = ata_scsi_slave_config,
-#ifdef CONFIG_ALL_PPC
- .proc_info = k2_sata_proc_info
+#ifdef CONFIG_PPC_OF
+ .proc_info = k2_sata_proc_info,
#endif
.bios_param = ata_std_bios_param,
};
@@ -243,21 +257,20 @@
.port_stop = ata_port_stop,
};
-
static void k2_sata_setup_port(struct ata_ioports *port, unsigned long base)
{
- port->cmd_addr = base;
- port->data_addr = base;
- port->error_addr = base + 0x4;
- port->nsect_addr = base + 0x8;
- port->lbal_addr = base + 0xc;
- port->lbam_addr = base + 0x10;
- port->lbah_addr = base + 0x14;
- port->device_addr = base + 0x18;
- port->cmdstat_addr = base + 0x1c;
- port->ctl_addr = base + 0x20;
- port->bmdma_addr = base + 0x30;
- port->scr_addr = base + 0x40;
+ port->cmd_addr = base + K2_SATA_TF_CMD_OFFSET;
+ port->data_addr = base + K2_SATA_TF_DATA_OFFSET;
+ port->error_addr = base + K2_SATA_TF_ERROR_OFFSET;
+ port->nsect_addr = base + K2_SATA_TF_NSECT_OFFSET;
+ port->lbal_addr = base + K2_SATA_TF_LBAL_OFFSET;
+ port->lbam_addr = base + K2_SATA_TF_LBAM_OFFSET;
+ port->lbah_addr = base + K2_SATA_TF_LBAH_OFFSET;
+ port->device_addr = base + K2_SATA_TF_DEVICE_OFFSET;
+ port->cmdstat_addr = base + K2_SATA_TF_CMDSTAT_OFFSET;
+ port->ctl_addr = base + K2_SATA_TF_CTL_OFFSET;
+ port->bmdma_addr = base + K2_SATA_DMA_CMD_OFFSET;
+ port->scr_addr = base + K2_SATA_SCR_STATUS_OFFSET;
}
@@ -279,7 +292,14 @@
rc = pci_enable_device(pdev);
if (rc)
return rc;
+ /*
+ * Check if we have resources mapped at all (second function may
+ * have been disabled by firmware)
+ */
+ if (pci_resource_len(pdev, 5) == 0)
+ return -ENODEV;
+ /* Request PCI regions */
rc = pci_request_regions(pdev, DRV_NAME);
if (rc)
goto err_out;
@@ -306,44 +326,37 @@
}
base = (unsigned long) mmio_base;
- /*
- * Check for the "disabled" second function to avoid registering
- * useless interfaces on K2
- */
- if (readl(mmio_base + 0x40) == 0xffffffffUL &&
- readl(mmio_base + 0x140) == 0xffffffffUL) {
- rc = -ENODEV;
- goto err_out_unmap;
- }
-
/* Clear a magic bit in SCR1 according to Darwin, those help
* some funky seagate drives (though so far, those were already
* set by the firmware on the machines I had access to
*/
- writel(readl(mmio_base + 0x80) & ~0x00040000, mmio_base + 0x80);
+ writel(readl(mmio_base + K2_SATA_SICR1_OFFSET) & ~0x00040000,
+ mmio_base + K2_SATA_SICR1_OFFSET);
/* Clear SATA error & interrupts we don't use */
- writel(0xffffffff, mmio_base + 0x44);
- writel(0x0, mmio_base + 0x88);
+ writel(0xffffffff, mmio_base + K2_SATA_SCR_ERROR_OFFSET);
+ writel(0x0, mmio_base + K2_SATA_SIM_OFFSET);
probe_ent->sht = &k2_sata_sht;
probe_ent->host_flags = ATA_FLAG_SATA | ATA_FLAG_SATA_RESET |
ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO;
probe_ent->port_ops = &k2_sata_ops;
- probe_ent->n_ports = 2;
+ probe_ent->n_ports = 4;
probe_ent->irq = pdev->irq;
probe_ent->irq_flags = SA_SHIRQ;
probe_ent->mmio_base = mmio_base;
- /*
- * We don't care much about the PIO/UDMA masks, but the core won't like us
+ /* We don't care much about the PIO/UDMA masks, but the core won't like us
* if we don't fill these
*/
probe_ent->pio_mask = 0x1f;
- probe_ent->udma_mask = 0x7f;
+ probe_ent->udma_mask = 0x3f;
- k2_sata_setup_port(&probe_ent->port[0], base);
- k2_sata_setup_port(&probe_ent->port[1], base + 0x100);
+ /* We have 4 ports per PCI function */
+ k2_sata_setup_port(&probe_ent->port[0], base + 0 * K2_SATA_PORT_OFFSET);
+ k2_sata_setup_port(&probe_ent->port[1], base + 1 * K2_SATA_PORT_OFFSET);
+ k2_sata_setup_port(&probe_ent->port[2], base + 2 * K2_SATA_PORT_OFFSET);
+ k2_sata_setup_port(&probe_ent->port[3], base + 3 * K2_SATA_PORT_OFFSET);
pci_set_master(pdev);
@@ -353,8 +366,6 @@
return 0;
-err_out_unmap:
- iounmap((void *)base);
err_out_free_ent:
kfree(probe_ent);
err_out_regions:
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2005-03-08 0:47 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2004-10-19 17:14 [BK PATCHES] 2.6.x libata updates Jeff Garzik
-- strict thread matches above, loose matches on Subject: below --
2005-03-07 17:12 Jeff Garzik
2005-03-08 0:33 ` Aurelien Jarno
2005-03-08 0:41 ` Jeff Garzik
2005-03-05 18:46 Jeff Garzik
2004-11-13 20:53 Jeff Garzik
2004-01-20 19:20 Jeff Garzik
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).