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From: Greg KH <gregkh@suse.de>
To: Andi Kleen <ak@suse.de>
Cc: len.brown@intel.com, acpi-devel@lists.sourceforge.net,
	linux-pci@atrey.karlin.mff.cuni.cz, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 02/04] PCI: use the MCFG table to properly access pci devices (i386)
Date: Wed, 15 Jun 2005 11:35:47 -0700	[thread overview]
Message-ID: <20050615183547.GA29587@suse.de> (raw)
In-Reply-To: <20050615182346.GQ11898@wotan.suse.de>

On Wed, Jun 15, 2005 at 08:23:47PM +0200, Andi Kleen wrote:
> On Wed, Jun 15, 2005 at 10:54:47AM -0700, Greg KH wrote:
> > On Wed, Jun 15, 2005 at 11:48:33AM +0200, Andi Kleen wrote:
> > > On Tue, Jun 14, 2005 at 10:31:20PM -0700, Greg KH wrote:
> > > > Now that we have access to the whole MCFG table, let's properly use it
> > > > for all pci device accesses (as that's what it is there for, some boxes
> > > > don't put all the busses into one entry.)
> > > > 
> > > > If, for some reason, the table is incorrect, we fallback to the "old
> > > > style" of mmconfig accesses, namely, we just assume the first entry in
> > > > the table is the one for us, and blindly use it.
> > > 
> > > I think it would be better to set different bus->ops at probe
> > > time, not walk the table at runtime.
> > 
> > Yeah, I thought of that, but it's the same ops pointers that we want to
> > have called for the different devices.  The only thing different is the
> > base address of the bus.
> 
> There can be bus segments that don't support it at all and still
> need the old port based access method
> (e.g. on a AMD K8 box the busses of the internal northbridge need this) 

Ugh, I was afraid of that :(

> For those you would have bus->ops pointing to the old port code,
> for the others to the mmconfig code.

Well, for that, I'll have to set the bus ops when they are discovered.
So the same callback I mentioned can be used for that (due to the need
to check the ranges in the MCFG table).  I'll work on that too.

Does the K8 box just not have MCFG entries for the northbridge busses?

> That's the whole point of the patch btw - to support mmconfig even
> on these machines ;-) 

Ah, I thought it was to also actually support the MCFG table for boxes
that supported the different mmconfig addresses.

> > In sleeping on it, I thought about just using the void * we have
> > availble for the bus to use to hold this base address, that way we only
> > have to look it up at bus creation time, not for every device access.
> > 
> > Of course to do that I might need another callback in the ops structure,
> > but hey, what's one more pointer :)
> > 
> > Sound a bit more reasonable?  I'll try to prototype this later tonight.
> 
> Yes, caching the base address would be a good idea too.

Ok, I'll work on this and the above mentioned stuff too.

thanks,

greg k-h

  reply	other threads:[~2005-06-15 18:36 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-06-15  5:29 [PATCH 00/04] PCI: add proper MCFG support to let AMD boxes support MMCONFIG Greg KH
2005-06-15  5:30 ` [PATCH 01/04] PCI: add proper MCFG table parsing to ACPI core Greg KH
2005-06-15  5:31   ` [PATCH 02/04] PCI: use the MCFG table to properly access pci devices (i386) Greg KH
2005-06-15  5:32     ` [PATCH 03/04] PCI: use the MCFG table to properly access pci devices (x86-64) Greg KH
2005-06-15  5:33       ` [PATCH 04/04] PCI: let AMD boxes use MMCONFIG Greg KH
2005-06-16 22:34       ` [PATCH 03/04] PCI: use the MCFG table to properly access pci devices (x86-64) Rajesh Shah
2005-06-16 22:42         ` Greg KH
2005-06-16 23:00           ` Andi Kleen
2005-06-16 23:49             ` Brian Gerst
2005-06-17  1:15             ` Rajesh Shah
2005-06-15  9:48     ` [PATCH 02/04] PCI: use the MCFG table to properly access pci devices (i386) Andi Kleen
2005-06-15 17:31       ` Jeff Garzik
2005-06-15 17:54       ` Greg KH
2005-06-15 18:23         ` Andi Kleen
2005-06-15 18:35           ` Greg KH [this message]
2005-06-15 19:03             ` Andi Kleen
2005-06-15 20:21               ` Greg KH

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