* post 2.6.26 requires pciehp_slot_with_bus
@ 2008-07-24 11:47 Pierre Ossman
2008-07-24 12:38 ` Kenji Kaneshige
0 siblings, 1 reply; 37+ messages in thread
From: Pierre Ossman @ 2008-07-24 11:47 UTC (permalink / raw)
To: Kenji Kaneshige, LKML
[-- Attachment #1: Type: text/plain, Size: 589 bytes --]
Somewhere post 2.6.26, pciehp started whining about not being able to
claim the slot and error code -17. It suggested adding
"pciehp_slot_with_bus", which actually helped. Still, having a kernel
parameter should just be a temporary fix.
--
-- Pierre Ossman
Linux kernel, MMC maintainer http://www.kernel.org
rdesktop, core developer http://www.rdesktop.org
WARNING: This correspondence is being monitored by the
Swedish government. Make sure your server uses encryption
for SMTP traffic and consider using PGP for end-to-end
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^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-24 11:47 post 2.6.26 requires pciehp_slot_with_bus Pierre Ossman
@ 2008-07-24 12:38 ` Kenji Kaneshige
2008-07-24 20:39 ` Pierre Ossman
0 siblings, 1 reply; 37+ messages in thread
From: Kenji Kaneshige @ 2008-07-24 12:38 UTC (permalink / raw)
To: Pierre Ossman; +Cc: LKML, linux-pci
Hi Pierre,
(Added linux-pci to CC)
Pierre Ossman wrote:
> Somewhere post 2.6.26, pciehp started whining about not being able to
> claim the slot and error code -17. It suggested adding
> "pciehp_slot_with_bus", which actually helped. Still, having a kernel
> parameter should just be a temporary fix.
The "pciehp_slot_with_bus" option is a workaround for the platforms
that assign the same physical slot number to multiple slots. If your
system has PCI chassis and it supports Chassis Number registers,
maybe one of the solution is using chassis number + slot number as a
slot name. But I don't have any idea other than "pciehp_slot_with_bus"
if your system doesn't support chassis number.
Do you have any idea?
Thanks,
Kenji Kaneshige
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-24 12:38 ` Kenji Kaneshige
@ 2008-07-24 20:39 ` Pierre Ossman
2008-07-24 21:07 ` Jesse Barnes
0 siblings, 1 reply; 37+ messages in thread
From: Pierre Ossman @ 2008-07-24 20:39 UTC (permalink / raw)
To: Kenji Kaneshige; +Cc: LKML, linux-pci
[-- Attachment #1: Type: text/plain, Size: 1402 bytes --]
On Thu, 24 Jul 2008 21:38:32 +0900
Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> wrote:
> Hi Pierre,
> (Added linux-pci to CC)
>
> Pierre Ossman wrote:
> > Somewhere post 2.6.26, pciehp started whining about not being able to
> > claim the slot and error code -17. It suggested adding
> > "pciehp_slot_with_bus", which actually helped. Still, having a kernel
> > parameter should just be a temporary fix.
>
> The "pciehp_slot_with_bus" option is a workaround for the platforms
> that assign the same physical slot number to multiple slots. If your
> system has PCI chassis and it supports Chassis Number registers,
> maybe one of the solution is using chassis number + slot number as a
> slot name. But I don't have any idea other than "pciehp_slot_with_bus"
> if your system doesn't support chassis number.
>
The what now? :)
This is a laptop with a single expressport that worked fine up until
this merge window. What changed and why is it no longer possible to
support this hardware without a kernel parameter?
Rgds
--
-- Pierre Ossman
Linux kernel, MMC maintainer http://www.kernel.org
rdesktop, core developer http://www.rdesktop.org
WARNING: This correspondence is being monitored by the
Swedish government. Make sure your server uses encryption
for SMTP traffic and consider using PGP for end-to-end
encryption.
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^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-24 20:39 ` Pierre Ossman
@ 2008-07-24 21:07 ` Jesse Barnes
2008-07-24 21:51 ` Pierre Ossman
0 siblings, 1 reply; 37+ messages in thread
From: Jesse Barnes @ 2008-07-24 21:07 UTC (permalink / raw)
To: Pierre Ossman; +Cc: Kenji Kaneshige, LKML, linux-pci
On Thursday, July 24, 2008 1:39 pm Pierre Ossman wrote:
> On Thu, 24 Jul 2008 21:38:32 +0900
>
> Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> wrote:
> > Hi Pierre,
> > (Added linux-pci to CC)
> >
> > Pierre Ossman wrote:
> > > Somewhere post 2.6.26, pciehp started whining about not being able to
> > > claim the slot and error code -17. It suggested adding
> > > "pciehp_slot_with_bus", which actually helped. Still, having a kernel
> > > parameter should just be a temporary fix.
> >
> > The "pciehp_slot_with_bus" option is a workaround for the platforms
> > that assign the same physical slot number to multiple slots. If your
> > system has PCI chassis and it supports Chassis Number registers,
> > maybe one of the solution is using chassis number + slot number as a
> > slot name. But I don't have any idea other than "pciehp_slot_with_bus"
> > if your system doesn't support chassis number.
>
> The what now? :)
>
> This is a laptop with a single expressport that worked fine up until
> this merge window. What changed and why is it no longer possible to
> support this hardware without a kernel parameter?
Yeah we're being a bit more careful about registering hotplug slots these
days. The fact that you got a conflict message indicates that more than one
driver is trying to bind to that PCIe port and handle hotplug for it. I
guess acpiphp must already be loaded?
Jesse
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-24 21:07 ` Jesse Barnes
@ 2008-07-24 21:51 ` Pierre Ossman
2008-07-24 22:06 ` Jesse Barnes
0 siblings, 1 reply; 37+ messages in thread
From: Pierre Ossman @ 2008-07-24 21:51 UTC (permalink / raw)
To: Jesse Barnes; +Cc: Kenji Kaneshige, LKML, linux-pci
[-- Attachment #1: Type: text/plain, Size: 1324 bytes --]
On Thu, 24 Jul 2008 14:07:18 -0700
Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> On Thursday, July 24, 2008 1:39 pm Pierre Ossman wrote:
> >
> > This is a laptop with a single expressport that worked fine up until
> > this merge window. What changed and why is it no longer possible to
> > support this hardware without a kernel parameter?
>
> Yeah we're being a bit more careful about registering hotplug slots these
> days. The fact that you got a conflict message indicates that more than one
> driver is trying to bind to that PCIe port and handle hotplug for it. I
> guess acpiphp must already be loaded?
>
Nope. Only pciehp is builtin, and acpiphp is not loaded. Anything
non-hotplug related that can block stuff?
Anyway, the port seems to work even with that warning present though
(sorry for not testing that properly earlier). Stray warnings is still
not pleasant though, so I can do some more testing if you have some
ideas.
Rgds
--
-- Pierre Ossman
Linux kernel, MMC maintainer http://www.kernel.org
rdesktop, core developer http://www.rdesktop.org
WARNING: This correspondence is being monitored by the
Swedish government. Make sure your server uses encryption
for SMTP traffic and consider using PGP for end-to-end
encryption.
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^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-24 21:51 ` Pierre Ossman
@ 2008-07-24 22:06 ` Jesse Barnes
2008-07-24 22:29 ` Alex Chiang
0 siblings, 1 reply; 37+ messages in thread
From: Jesse Barnes @ 2008-07-24 22:06 UTC (permalink / raw)
To: Pierre Ossman; +Cc: Kenji Kaneshige, LKML, linux-pci
On Thursday, July 24, 2008 2:51 pm Pierre Ossman wrote:
> On Thu, 24 Jul 2008 14:07:18 -0700
>
> Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> > On Thursday, July 24, 2008 1:39 pm Pierre Ossman wrote:
> > > This is a laptop with a single expressport that worked fine up until
> > > this merge window. What changed and why is it no longer possible to
> > > support this hardware without a kernel parameter?
> >
> > Yeah we're being a bit more careful about registering hotplug slots these
> > days. The fact that you got a conflict message indicates that more than
> > one driver is trying to bind to that PCIe port and handle hotplug for it.
> > I guess acpiphp must already be loaded?
>
> Nope. Only pciehp is builtin, and acpiphp is not loaded. Anything
> non-hotplug related that can block stuff?
Theoretically only one of the other hotplug drivers could claim the slot (e.g.
acpi, cpci, cpqhp, fakephp etc.). You could put a dump_stack() or something
into drivers/pci/hotplug/pci_hotplug_core.c:pci_hp_register to see if we're
getting multiple callers on the same slot for some reason... Maybe the
pciehp driver itself is trying to register the same slot twice?
> Anyway, the port seems to work even with that warning present though
> (sorry for not testing that properly earlier). Stray warnings is still
> not pleasant though, so I can do some more testing if you have some
> ideas.
Thanks. Yeah we don't want to scare people or break existing setups.
Jesse
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-24 22:06 ` Jesse Barnes
@ 2008-07-24 22:29 ` Alex Chiang
2008-07-24 22:49 ` Pierre Ossman
0 siblings, 1 reply; 37+ messages in thread
From: Alex Chiang @ 2008-07-24 22:29 UTC (permalink / raw)
To: Jesse Barnes; +Cc: Pierre Ossman, Kenji Kaneshige, LKML, linux-pci
* Jesse Barnes <jbarnes@virtuousgeek.org>:
> On Thursday, July 24, 2008 2:51 pm Pierre Ossman wrote:
> > On Thu, 24 Jul 2008 14:07:18 -0700
> >
> > Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> > > On Thursday, July 24, 2008 1:39 pm Pierre Ossman wrote:
> > > > This is a laptop with a single expressport that worked
> > > > fine up until this merge window. What changed and why is
> > > > it no longer possible to support this hardware without a
> > > > kernel parameter?
> > >
> > > Yeah we're being a bit more careful about registering
> > > hotplug slots these days. The fact that you got a conflict
> > > message indicates that more than one driver is trying to
> > > bind to that PCIe port and handle hotplug for it. I guess
> > > acpiphp must already be loaded?
> >
> > Nope. Only pciehp is builtin, and acpiphp is not loaded.
> > Anything non-hotplug related that can block stuff?
>
> Theoretically only one of the other hotplug drivers could claim
> the slot (e.g. acpi, cpci, cpqhp, fakephp etc.). You could
> put a dump_stack() or something into
> drivers/pci/hotplug/pci_hotplug_core.c:pci_hp_register to see
> if we're getting multiple callers on the same slot for some
> reason... Maybe the pciehp driver itself is trying to register
> the same slot twice?
This is a good idea.
Any chance you could get that debug info for us, Pierre?
Thanks.
/ac
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-24 22:29 ` Alex Chiang
@ 2008-07-24 22:49 ` Pierre Ossman
2008-07-24 23:08 ` Alex Chiang
0 siblings, 1 reply; 37+ messages in thread
From: Pierre Ossman @ 2008-07-24 22:49 UTC (permalink / raw)
To: Alex Chiang; +Cc: Jesse Barnes, Kenji Kaneshige, LKML, linux-pci
[-- Attachment #1: Type: text/plain, Size: 15387 bytes --]
On Thu, 24 Jul 2008 16:29:14 -0600
Alex Chiang <achiang@hp.com> wrote:
> * Jesse Barnes <jbarnes@virtuousgeek.org>:
> >
> > Theoretically only one of the other hotplug drivers could claim
> > the slot (e.g. acpi, cpci, cpqhp, fakephp etc.). You could
> > put a dump_stack() or something into
> > drivers/pci/hotplug/pci_hotplug_core.c:pci_hp_register to see
> > if we're getting multiple callers on the same slot for some
> > reason... Maybe the pciehp driver itself is trying to register
> > the same slot twice?
>
> This is a good idea.
>
> Any chance you could get that debug info for us, Pierre?
>
I aim to please. Following is the relevant lines from my bootup with a
dump_stack() right at the beginning of pci_hp_register():
[ 1.247459] pcieport-driver 0000:00:01.0: found MSI capability
[ 1.247523] pci_express 0000:00:01.0:pcie00: allocate port service
[ 1.247632] pci_express 0000:00:01.0:pcie02: allocate port service
[ 1.247741] pci_express 0000:00:01.0:pcie03: allocate port service
[ 1.248010] PCI: Setting latency timer of device 0000:00:1c.0 to 64
[ 1.248158] pcieport-driver 0000:00:1c.0: found MSI capability
[ 1.248299] pci_express 0000:00:1c.0:pcie00: allocate port service
[ 1.248415] pci_express 0000:00:1c.0:pcie02: allocate port service
[ 1.248524] pci_express 0000:00:1c.0:pcie03: allocate port service
[ 1.248873] PCI: Setting latency timer of device 0000:00:1c.1 to 64
[ 1.249020] pcieport-driver 0000:00:1c.1: found MSI capability
[ 1.249162] pci_express 0000:00:1c.1:pcie00: allocate port service
[ 1.249270] pci_express 0000:00:1c.1:pcie02: allocate port service
[ 1.249379] pci_express 0000:00:1c.1:pcie03: allocate port service
[ 1.249708] PCI: Setting latency timer of device 0000:00:1c.2 to 64
[ 1.249855] pcieport-driver 0000:00:1c.2: found MSI capability
[ 1.249995] pci_express 0000:00:1c.2:pcie00: allocate port service
[ 1.250102] pci_express 0000:00:1c.2:pcie02: allocate port service
[ 1.250211] pci_express 0000:00:1c.2:pcie03: allocate port service
[ 1.250531] PCI: Setting latency timer of device 0000:00:1c.3 to 64
[ 1.250679] pcieport-driver 0000:00:1c.3: found MSI capability
[ 1.250819] pci_express 0000:00:1c.3:pcie00: allocate port service
[ 1.250927] pci_express 0000:00:1c.3:pcie02: allocate port service
[ 1.251035] pci_express 0000:00:1c.3:pcie03: allocate port service
[ 1.251361] PCI: Setting latency timer of device 0000:00:1c.4 to 64
[ 1.251508] pcieport-driver 0000:00:1c.4: found MSI capability
[ 1.251649] pci_express 0000:00:1c.4:pcie00: allocate port service
[ 1.251762] pci_express 0000:00:1c.4:pcie02: allocate port service
[ 1.251894] pci_express 0000:00:1c.4:pcie03: allocate port service
[ 1.252429] pci_hotplug: PCI Hot Plug PCI Core version: 0.5
[ 1.253405] pciehp: HPC vendor_id 8086 device_id 2a01 ss_vid 0 ss_did 0
[ 1.253453] Pid: 1, comm: swapper Not tainted 2.6.26 #110
[ 1.253460] [<c0544545>] pci_hp_register+0x25/0x4b0
[ 1.253475] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
[ 1.253485] [<c05462ad>] ? pciehp_probe+0xbd/0x3f0
[ 1.253494] [<c054631b>] pciehp_probe+0x12b/0x3f0
[ 1.253502] [<c04e8b58>] ? sysfs_add_one+0x18/0x50
[ 1.253513] [<c04e9a94>] ? sysfs_do_create_link+0xa4/0x140
[ 1.253523] [<c0542110>] pcie_port_probe_service+0x50/0x90
[ 1.253531] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
[ 1.253540] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
[ 1.253550] [<c059f557>] driver_probe_device+0x87/0x1a0
[ 1.253557] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
[ 1.253569] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
[ 1.253578] [<c059f6e9>] __driver_attach+0x79/0x80
[ 1.253585] [<c059ee23>] bus_for_each_dev+0x53/0x80
[ 1.253593] [<c059f3ce>] driver_attach+0x1e/0x20
[ 1.253600] [<c059f670>] ? __driver_attach+0x0/0x80
[ 1.253608] [<c059e7e7>] bus_add_driver+0x1b7/0x230
[ 1.253615] [<c059f8be>] driver_register+0x6e/0x150
[ 1.253622] [<c059f8be>] ? driver_register+0x6e/0x150
[ 1.253630] [<c054202f>] pcie_port_service_register+0x3f/0x50
[ 1.253638] [<c07a7b52>] pcied_init+0x16/0x83
[ 1.253648] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
[ 1.253657] [<c078b417>] kernel_init+0x1ad/0x2b8
[ 1.253666] [<c04ae774>] ? sys_select+0x44/0x1a0
[ 1.253676] [<c07a7b3c>] ? pcied_init+0x0/0x83
[ 1.253685] [<c042337f>] ? schedule_tail+0x1f/0x50
[ 1.253695] [<c0403e72>] ? ret_from_fork+0x6/0x1c
[ 1.253704] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.253712] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.253720] [<c0404b9b>] kernel_thread_helper+0x7/0x10
[ 1.253728] =======================
[ 1.253841] hpdriver 0000:00:01.0:pcie02: service driver hpdriver loaded
[ 1.254648] pciehp: HPC vendor_id 8086 device_id 283f ss_vid 0 ss_did 0
[ 1.254730] Pid: 1, comm: swapper Not tainted 2.6.26 #110
[ 1.254735] [<c0544545>] pci_hp_register+0x25/0x4b0
[ 1.254744] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
[ 1.254754] [<c05462ad>] ? pciehp_probe+0xbd/0x3f0
[ 1.254763] [<c054631b>] pciehp_probe+0x12b/0x3f0
[ 1.254771] [<c04e8b58>] ? sysfs_add_one+0x18/0x50
[ 1.254780] [<c04e9a94>] ? sysfs_do_create_link+0xa4/0x140
[ 1.254789] [<c0542110>] pcie_port_probe_service+0x50/0x90
[ 1.254797] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
[ 1.254806] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
[ 1.254814] [<c059f557>] driver_probe_device+0x87/0x1a0
[ 1.254821] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
[ 1.254830] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
[ 1.254838] [<c059f6e9>] __driver_attach+0x79/0x80
[ 1.254845] [<c059ee23>] bus_for_each_dev+0x53/0x80
[ 1.254853] [<c059f3ce>] driver_attach+0x1e/0x20
[ 1.254859] [<c059f670>] ? __driver_attach+0x0/0x80
[ 1.254867] [<c059e7e7>] bus_add_driver+0x1b7/0x230
[ 1.254874] [<c059f8be>] driver_register+0x6e/0x150
[ 1.254881] [<c059f8be>] ? driver_register+0x6e/0x150
[ 1.254889] [<c054202f>] pcie_port_service_register+0x3f/0x50
[ 1.254897] [<c07a7b52>] pcied_init+0x16/0x83
[ 1.254905] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
[ 1.254914] [<c078b417>] kernel_init+0x1ad/0x2b8
[ 1.254922] [<c04ae774>] ? sys_select+0x44/0x1a0
[ 1.254930] [<c07a7b3c>] ? pcied_init+0x0/0x83
[ 1.254939] [<c042337f>] ? schedule_tail+0x1f/0x50
[ 1.254948] [<c0403e72>] ? ret_from_fork+0x6/0x1c
[ 1.254956] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.254964] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.254972] [<c0404b9b>] kernel_thread_helper+0x7/0x10
[ 1.254980] =======================
[ 1.255097] hpdriver 0000:00:1c.0:pcie02: service driver hpdriver loaded
[ 1.255900] pciehp: HPC vendor_id 8086 device_id 2841 ss_vid 0 ss_did 0
[ 1.255989] Pid: 1, comm: swapper Not tainted 2.6.26 #110
[ 1.255994] [<c0544545>] pci_hp_register+0x25/0x4b0
[ 1.256004] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
[ 1.256013] [<c05462ad>] ? pciehp_probe+0xbd/0x3f0
[ 1.256023] [<c054631b>] pciehp_probe+0x12b/0x3f0
[ 1.256030] [<c04e8b58>] ? sysfs_add_one+0x18/0x50
[ 1.256040] [<c04e9a94>] ? sysfs_do_create_link+0xa4/0x140
[ 1.256049] [<c0542110>] pcie_port_probe_service+0x50/0x90
[ 1.256057] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
[ 1.256066] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
[ 1.256074] [<c059f557>] driver_probe_device+0x87/0x1a0
[ 1.256082] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
[ 1.256092] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
[ 1.256100] [<c059f6e9>] __driver_attach+0x79/0x80
[ 1.256107] [<c059ee23>] bus_for_each_dev+0x53/0x80
[ 1.256114] [<c059f3ce>] driver_attach+0x1e/0x20
[ 1.256121] [<c059f670>] ? __driver_attach+0x0/0x80
[ 1.256129] [<c059e7e7>] bus_add_driver+0x1b7/0x230
[ 1.256136] [<c059f8be>] driver_register+0x6e/0x150
[ 1.256143] [<c059f8be>] ? driver_register+0x6e/0x150
[ 1.256151] [<c054202f>] pcie_port_service_register+0x3f/0x50
[ 1.256159] [<c07a7b52>] pcied_init+0x16/0x83
[ 1.256167] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
[ 1.256176] [<c078b417>] kernel_init+0x1ad/0x2b8
[ 1.256184] [<c04ae774>] ? sys_select+0x44/0x1a0
[ 1.256192] [<c07a7b3c>] ? pcied_init+0x0/0x83
[ 1.256201] [<c042337f>] ? schedule_tail+0x1f/0x50
[ 1.256209] [<c0403e72>] ? ret_from_fork+0x6/0x1c
[ 1.256218] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.256226] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.256234] [<c0404b9b>] kernel_thread_helper+0x7/0x10
[ 1.256242] =======================
[ 1.256355] hpdriver 0000:00:1c.1:pcie02: service driver hpdriver loaded
[ 1.257191] pciehp: HPC vendor_id 8086 device_id 2843 ss_vid 0 ss_did 0
[ 1.257273] Pid: 1, comm: swapper Not tainted 2.6.26 #110
[ 1.257278] [<c0544545>] pci_hp_register+0x25/0x4b0
[ 1.257287] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
[ 1.257297] [<c05462ad>] ? pciehp_probe+0xbd/0x3f0
[ 1.257306] [<c054631b>] pciehp_probe+0x12b/0x3f0
[ 1.257313] [<c04e8b58>] ? sysfs_add_one+0x18/0x50
[ 1.257323] [<c04e9a94>] ? sysfs_do_create_link+0xa4/0x140
[ 1.257332] [<c0542110>] pcie_port_probe_service+0x50/0x90
[ 1.257340] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
[ 1.257349] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
[ 1.257358] [<c059f557>] driver_probe_device+0x87/0x1a0
[ 1.257365] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
[ 1.257374] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
[ 1.257383] [<c059f6e9>] __driver_attach+0x79/0x80
[ 1.257390] [<c059ee23>] bus_for_each_dev+0x53/0x80
[ 1.257397] [<c059f3ce>] driver_attach+0x1e/0x20
[ 1.257403] [<c059f670>] ? __driver_attach+0x0/0x80
[ 1.257411] [<c059e7e7>] bus_add_driver+0x1b7/0x230
[ 1.257419] [<c059f8be>] driver_register+0x6e/0x150
[ 1.257426] [<c059f8be>] ? driver_register+0x6e/0x150
[ 1.257434] [<c054202f>] pcie_port_service_register+0x3f/0x50
[ 1.257442] [<c07a7b52>] pcied_init+0x16/0x83
[ 1.257450] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
[ 1.257459] [<c078b417>] kernel_init+0x1ad/0x2b8
[ 1.257467] [<c04ae774>] ? sys_select+0x44/0x1a0
[ 1.257475] [<c07a7b3c>] ? pcied_init+0x0/0x83
[ 1.257484] [<c042337f>] ? schedule_tail+0x1f/0x50
[ 1.257492] [<c0403e72>] ? ret_from_fork+0x6/0x1c
[ 1.257500] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.257509] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.257517] [<c0404b9b>] kernel_thread_helper+0x7/0x10
[ 1.257524] =======================
[ 1.257639] hpdriver 0000:00:1c.2:pcie02: service driver hpdriver loaded
[ 1.258440] pciehp: HPC vendor_id 8086 device_id 2845 ss_vid 0 ss_did 0
[ 1.258522] Pid: 1, comm: swapper Not tainted 2.6.26 #110
[ 1.258527] [<c0544545>] pci_hp_register+0x25/0x4b0
[ 1.258537] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
[ 1.258546] [<c05462ad>] ? pciehp_probe+0xbd/0x3f0
[ 1.258556] [<c054631b>] pciehp_probe+0x12b/0x3f0
[ 1.258564] [<c04e8b58>] ? sysfs_add_one+0x18/0x50
[ 1.258573] [<c04e9a94>] ? sysfs_do_create_link+0xa4/0x140
[ 1.258583] [<c0542110>] pcie_port_probe_service+0x50/0x90
[ 1.258591] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
[ 1.258600] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
[ 1.258609] [<c059f557>] driver_probe_device+0x87/0x1a0
[ 1.258616] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
[ 1.258626] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
[ 1.258634] [<c059f6e9>] __driver_attach+0x79/0x80
[ 1.258642] [<c059ee23>] bus_for_each_dev+0x53/0x80
[ 1.258649] [<c059f3ce>] driver_attach+0x1e/0x20
[ 1.258656] [<c059f670>] ? __driver_attach+0x0/0x80
[ 1.258665] [<c059e7e7>] bus_add_driver+0x1b7/0x230
[ 1.258672] [<c059f8be>] driver_register+0x6e/0x150
[ 1.258679] [<c059f8be>] ? driver_register+0x6e/0x150
[ 1.258687] [<c054202f>] pcie_port_service_register+0x3f/0x50
[ 1.258695] [<c07a7b52>] pcied_init+0x16/0x83
[ 1.258703] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
[ 1.258712] [<c078b417>] kernel_init+0x1ad/0x2b8
[ 1.258719] [<c04ae774>] ? sys_select+0x44/0x1a0
[ 1.258728] [<c07a7b3c>] ? pcied_init+0x0/0x83
[ 1.258737] [<c042337f>] ? schedule_tail+0x1f/0x50
[ 1.258745] [<c0403e72>] ? ret_from_fork+0x6/0x1c
[ 1.258753] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.258761] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.258769] [<c0404b9b>] kernel_thread_helper+0x7/0x10
[ 1.258777] =======================
[ 1.258893] hpdriver 0000:00:1c.3:pcie02: service driver hpdriver loaded
[ 1.259701] pciehp: HPC vendor_id 8086 device_id 2847 ss_vid 0 ss_did 0
[ 1.259787] Pid: 1, comm: swapper Not tainted 2.6.26 #110
[ 1.259791] [<c0544545>] pci_hp_register+0x25/0x4b0
[ 1.259801] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
[ 1.259810] [<c05462ad>] ? pciehp_probe+0xbd/0x3f0
[ 1.259819] [<c054631b>] pciehp_probe+0x12b/0x3f0
[ 1.259827] [<c04e8b58>] ? sysfs_add_one+0x18/0x50
[ 1.259836] [<c04e9a94>] ? sysfs_do_create_link+0xa4/0x140
[ 1.259845] [<c0542110>] pcie_port_probe_service+0x50/0x90
[ 1.259853] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
[ 1.259862] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
[ 1.259870] [<c059f557>] driver_probe_device+0x87/0x1a0
[ 1.259877] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
[ 1.259886] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
[ 1.259894] [<c059f6e9>] __driver_attach+0x79/0x80
[ 1.259901] [<c059ee23>] bus_for_each_dev+0x53/0x80
[ 1.259908] [<c059f3ce>] driver_attach+0x1e/0x20
[ 1.259915] [<c059f670>] ? __driver_attach+0x0/0x80
[ 1.259923] [<c059e7e7>] bus_add_driver+0x1b7/0x230
[ 1.259930] [<c059f8be>] driver_register+0x6e/0x150
[ 1.259937] [<c059f8be>] ? driver_register+0x6e/0x150
[ 1.259945] [<c054202f>] pcie_port_service_register+0x3f/0x50
[ 1.259954] [<c07a7b52>] pcied_init+0x16/0x83
[ 1.259962] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
[ 1.259971] [<c078b417>] kernel_init+0x1ad/0x2b8
[ 1.259978] [<c04ae774>] ? sys_select+0x44/0x1a0
[ 1.259987] [<c07a7b3c>] ? pcied_init+0x0/0x83
[ 1.259996] [<c042337f>] ? schedule_tail+0x1f/0x50
[ 1.260004] [<c0403e72>] ? ret_from_fork+0x6/0x1c
[ 1.260012] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.260020] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.260028] [<c0404b9b>] kernel_thread_helper+0x7/0x10
[ 1.260036] =======================
[ 1.260041] pciehp: pci_hp_register failed with error -17
[ 1.260176] pciehp: Failed to register slot because of name collision. Try 'pciehp_slot_with_bus' module option.
[ 1.260318] pciehp: pciehp: slot initialization failed
[ 1.260576] pciehp: PCI Express Hot Plug Controller Driver version: 0.4
--
-- Pierre Ossman
Linux kernel, MMC maintainer http://www.kernel.org
rdesktop, core developer http://www.rdesktop.org
WARNING: This correspondence is being monitored by the
Swedish government. Make sure your server uses encryption
for SMTP traffic and consider using PGP for end-to-end
encryption.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 197 bytes --]
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-24 22:49 ` Pierre Ossman
@ 2008-07-24 23:08 ` Alex Chiang
2008-07-24 23:29 ` Pierre Ossman
0 siblings, 1 reply; 37+ messages in thread
From: Alex Chiang @ 2008-07-24 23:08 UTC (permalink / raw)
To: Pierre Ossman; +Cc: Jesse Barnes, Kenji Kaneshige, LKML, linux-pci
* Pierre Ossman <drzeus-list@drzeus.cx>:
> On Thu, 24 Jul 2008 16:29:14 -0600
> Alex Chiang <achiang@hp.com> wrote:
>
> > * Jesse Barnes <jbarnes@virtuousgeek.org>:
> > >
> > > Theoretically only one of the other hotplug drivers could claim
> > > the slot (e.g. acpi, cpci, cpqhp, fakephp etc.). You could
> > > put a dump_stack() or something into
> > > drivers/pci/hotplug/pci_hotplug_core.c:pci_hp_register to see
> > > if we're getting multiple callers on the same slot for some
> > > reason... Maybe the pciehp driver itself is trying to register
> > > the same slot twice?
> >
> > This is a good idea.
> >
> > Any chance you could get that debug info for us, Pierre?
> >
>
> I aim to please. Following is the relevant lines from my bootup with a
> dump_stack() right at the beginning of pci_hp_register():
Sorry for one more round-trip, but could you turn on debugging
for pciehp as well?
You're building it into your kernel right? I think you need to
boot with pciehp_debug=1.
Thanks.
/ac
>
> [ 1.247459] pcieport-driver 0000:00:01.0: found MSI capability
> [ 1.247523] pci_express 0000:00:01.0:pcie00: allocate port service
> [ 1.247632] pci_express 0000:00:01.0:pcie02: allocate port service
> [ 1.247741] pci_express 0000:00:01.0:pcie03: allocate port service
> [ 1.248010] PCI: Setting latency timer of device 0000:00:1c.0 to 64
> [ 1.248158] pcieport-driver 0000:00:1c.0: found MSI capability
> [ 1.248299] pci_express 0000:00:1c.0:pcie00: allocate port service
> [ 1.248415] pci_express 0000:00:1c.0:pcie02: allocate port service
> [ 1.248524] pci_express 0000:00:1c.0:pcie03: allocate port service
> [ 1.248873] PCI: Setting latency timer of device 0000:00:1c.1 to 64
> [ 1.249020] pcieport-driver 0000:00:1c.1: found MSI capability
> [ 1.249162] pci_express 0000:00:1c.1:pcie00: allocate port service
> [ 1.249270] pci_express 0000:00:1c.1:pcie02: allocate port service
> [ 1.249379] pci_express 0000:00:1c.1:pcie03: allocate port service
> [ 1.249708] PCI: Setting latency timer of device 0000:00:1c.2 to 64
> [ 1.249855] pcieport-driver 0000:00:1c.2: found MSI capability
> [ 1.249995] pci_express 0000:00:1c.2:pcie00: allocate port service
> [ 1.250102] pci_express 0000:00:1c.2:pcie02: allocate port service
> [ 1.250211] pci_express 0000:00:1c.2:pcie03: allocate port service
> [ 1.250531] PCI: Setting latency timer of device 0000:00:1c.3 to 64
> [ 1.250679] pcieport-driver 0000:00:1c.3: found MSI capability
> [ 1.250819] pci_express 0000:00:1c.3:pcie00: allocate port service
> [ 1.250927] pci_express 0000:00:1c.3:pcie02: allocate port service
> [ 1.251035] pci_express 0000:00:1c.3:pcie03: allocate port service
> [ 1.251361] PCI: Setting latency timer of device 0000:00:1c.4 to 64
> [ 1.251508] pcieport-driver 0000:00:1c.4: found MSI capability
> [ 1.251649] pci_express 0000:00:1c.4:pcie00: allocate port service
> [ 1.251762] pci_express 0000:00:1c.4:pcie02: allocate port service
> [ 1.251894] pci_express 0000:00:1c.4:pcie03: allocate port service
> [ 1.252429] pci_hotplug: PCI Hot Plug PCI Core version: 0.5
> [ 1.253405] pciehp: HPC vendor_id 8086 device_id 2a01 ss_vid 0 ss_did 0
> [ 1.253453] Pid: 1, comm: swapper Not tainted 2.6.26 #110
> [ 1.253460] [<c0544545>] pci_hp_register+0x25/0x4b0
> [ 1.253475] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
> [ 1.253485] [<c05462ad>] ? pciehp_probe+0xbd/0x3f0
> [ 1.253494] [<c054631b>] pciehp_probe+0x12b/0x3f0
> [ 1.253502] [<c04e8b58>] ? sysfs_add_one+0x18/0x50
> [ 1.253513] [<c04e9a94>] ? sysfs_do_create_link+0xa4/0x140
> [ 1.253523] [<c0542110>] pcie_port_probe_service+0x50/0x90
> [ 1.253531] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
> [ 1.253540] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
> [ 1.253550] [<c059f557>] driver_probe_device+0x87/0x1a0
> [ 1.253557] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
> [ 1.253569] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
> [ 1.253578] [<c059f6e9>] __driver_attach+0x79/0x80
> [ 1.253585] [<c059ee23>] bus_for_each_dev+0x53/0x80
> [ 1.253593] [<c059f3ce>] driver_attach+0x1e/0x20
> [ 1.253600] [<c059f670>] ? __driver_attach+0x0/0x80
> [ 1.253608] [<c059e7e7>] bus_add_driver+0x1b7/0x230
> [ 1.253615] [<c059f8be>] driver_register+0x6e/0x150
> [ 1.253622] [<c059f8be>] ? driver_register+0x6e/0x150
> [ 1.253630] [<c054202f>] pcie_port_service_register+0x3f/0x50
> [ 1.253638] [<c07a7b52>] pcied_init+0x16/0x83
> [ 1.253648] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
> [ 1.253657] [<c078b417>] kernel_init+0x1ad/0x2b8
> [ 1.253666] [<c04ae774>] ? sys_select+0x44/0x1a0
> [ 1.253676] [<c07a7b3c>] ? pcied_init+0x0/0x83
> [ 1.253685] [<c042337f>] ? schedule_tail+0x1f/0x50
> [ 1.253695] [<c0403e72>] ? ret_from_fork+0x6/0x1c
> [ 1.253704] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.253712] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.253720] [<c0404b9b>] kernel_thread_helper+0x7/0x10
> [ 1.253728] =======================
> [ 1.253841] hpdriver 0000:00:01.0:pcie02: service driver hpdriver loaded
> [ 1.254648] pciehp: HPC vendor_id 8086 device_id 283f ss_vid 0 ss_did 0
> [ 1.254730] Pid: 1, comm: swapper Not tainted 2.6.26 #110
> [ 1.254735] [<c0544545>] pci_hp_register+0x25/0x4b0
> [ 1.254744] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
> [ 1.254754] [<c05462ad>] ? pciehp_probe+0xbd/0x3f0
> [ 1.254763] [<c054631b>] pciehp_probe+0x12b/0x3f0
> [ 1.254771] [<c04e8b58>] ? sysfs_add_one+0x18/0x50
> [ 1.254780] [<c04e9a94>] ? sysfs_do_create_link+0xa4/0x140
> [ 1.254789] [<c0542110>] pcie_port_probe_service+0x50/0x90
> [ 1.254797] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
> [ 1.254806] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
> [ 1.254814] [<c059f557>] driver_probe_device+0x87/0x1a0
> [ 1.254821] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
> [ 1.254830] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
> [ 1.254838] [<c059f6e9>] __driver_attach+0x79/0x80
> [ 1.254845] [<c059ee23>] bus_for_each_dev+0x53/0x80
> [ 1.254853] [<c059f3ce>] driver_attach+0x1e/0x20
> [ 1.254859] [<c059f670>] ? __driver_attach+0x0/0x80
> [ 1.254867] [<c059e7e7>] bus_add_driver+0x1b7/0x230
> [ 1.254874] [<c059f8be>] driver_register+0x6e/0x150
> [ 1.254881] [<c059f8be>] ? driver_register+0x6e/0x150
> [ 1.254889] [<c054202f>] pcie_port_service_register+0x3f/0x50
> [ 1.254897] [<c07a7b52>] pcied_init+0x16/0x83
> [ 1.254905] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
> [ 1.254914] [<c078b417>] kernel_init+0x1ad/0x2b8
> [ 1.254922] [<c04ae774>] ? sys_select+0x44/0x1a0
> [ 1.254930] [<c07a7b3c>] ? pcied_init+0x0/0x83
> [ 1.254939] [<c042337f>] ? schedule_tail+0x1f/0x50
> [ 1.254948] [<c0403e72>] ? ret_from_fork+0x6/0x1c
> [ 1.254956] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.254964] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.254972] [<c0404b9b>] kernel_thread_helper+0x7/0x10
> [ 1.254980] =======================
> [ 1.255097] hpdriver 0000:00:1c.0:pcie02: service driver hpdriver loaded
> [ 1.255900] pciehp: HPC vendor_id 8086 device_id 2841 ss_vid 0 ss_did 0
> [ 1.255989] Pid: 1, comm: swapper Not tainted 2.6.26 #110
> [ 1.255994] [<c0544545>] pci_hp_register+0x25/0x4b0
> [ 1.256004] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
> [ 1.256013] [<c05462ad>] ? pciehp_probe+0xbd/0x3f0
> [ 1.256023] [<c054631b>] pciehp_probe+0x12b/0x3f0
> [ 1.256030] [<c04e8b58>] ? sysfs_add_one+0x18/0x50
> [ 1.256040] [<c04e9a94>] ? sysfs_do_create_link+0xa4/0x140
> [ 1.256049] [<c0542110>] pcie_port_probe_service+0x50/0x90
> [ 1.256057] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
> [ 1.256066] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
> [ 1.256074] [<c059f557>] driver_probe_device+0x87/0x1a0
> [ 1.256082] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
> [ 1.256092] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
> [ 1.256100] [<c059f6e9>] __driver_attach+0x79/0x80
> [ 1.256107] [<c059ee23>] bus_for_each_dev+0x53/0x80
> [ 1.256114] [<c059f3ce>] driver_attach+0x1e/0x20
> [ 1.256121] [<c059f670>] ? __driver_attach+0x0/0x80
> [ 1.256129] [<c059e7e7>] bus_add_driver+0x1b7/0x230
> [ 1.256136] [<c059f8be>] driver_register+0x6e/0x150
> [ 1.256143] [<c059f8be>] ? driver_register+0x6e/0x150
> [ 1.256151] [<c054202f>] pcie_port_service_register+0x3f/0x50
> [ 1.256159] [<c07a7b52>] pcied_init+0x16/0x83
> [ 1.256167] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
> [ 1.256176] [<c078b417>] kernel_init+0x1ad/0x2b8
> [ 1.256184] [<c04ae774>] ? sys_select+0x44/0x1a0
> [ 1.256192] [<c07a7b3c>] ? pcied_init+0x0/0x83
> [ 1.256201] [<c042337f>] ? schedule_tail+0x1f/0x50
> [ 1.256209] [<c0403e72>] ? ret_from_fork+0x6/0x1c
> [ 1.256218] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.256226] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.256234] [<c0404b9b>] kernel_thread_helper+0x7/0x10
> [ 1.256242] =======================
> [ 1.256355] hpdriver 0000:00:1c.1:pcie02: service driver hpdriver loaded
> [ 1.257191] pciehp: HPC vendor_id 8086 device_id 2843 ss_vid 0 ss_did 0
> [ 1.257273] Pid: 1, comm: swapper Not tainted 2.6.26 #110
> [ 1.257278] [<c0544545>] pci_hp_register+0x25/0x4b0
> [ 1.257287] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
> [ 1.257297] [<c05462ad>] ? pciehp_probe+0xbd/0x3f0
> [ 1.257306] [<c054631b>] pciehp_probe+0x12b/0x3f0
> [ 1.257313] [<c04e8b58>] ? sysfs_add_one+0x18/0x50
> [ 1.257323] [<c04e9a94>] ? sysfs_do_create_link+0xa4/0x140
> [ 1.257332] [<c0542110>] pcie_port_probe_service+0x50/0x90
> [ 1.257340] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
> [ 1.257349] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
> [ 1.257358] [<c059f557>] driver_probe_device+0x87/0x1a0
> [ 1.257365] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
> [ 1.257374] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
> [ 1.257383] [<c059f6e9>] __driver_attach+0x79/0x80
> [ 1.257390] [<c059ee23>] bus_for_each_dev+0x53/0x80
> [ 1.257397] [<c059f3ce>] driver_attach+0x1e/0x20
> [ 1.257403] [<c059f670>] ? __driver_attach+0x0/0x80
> [ 1.257411] [<c059e7e7>] bus_add_driver+0x1b7/0x230
> [ 1.257419] [<c059f8be>] driver_register+0x6e/0x150
> [ 1.257426] [<c059f8be>] ? driver_register+0x6e/0x150
> [ 1.257434] [<c054202f>] pcie_port_service_register+0x3f/0x50
> [ 1.257442] [<c07a7b52>] pcied_init+0x16/0x83
> [ 1.257450] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
> [ 1.257459] [<c078b417>] kernel_init+0x1ad/0x2b8
> [ 1.257467] [<c04ae774>] ? sys_select+0x44/0x1a0
> [ 1.257475] [<c07a7b3c>] ? pcied_init+0x0/0x83
> [ 1.257484] [<c042337f>] ? schedule_tail+0x1f/0x50
> [ 1.257492] [<c0403e72>] ? ret_from_fork+0x6/0x1c
> [ 1.257500] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.257509] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.257517] [<c0404b9b>] kernel_thread_helper+0x7/0x10
> [ 1.257524] =======================
> [ 1.257639] hpdriver 0000:00:1c.2:pcie02: service driver hpdriver loaded
> [ 1.258440] pciehp: HPC vendor_id 8086 device_id 2845 ss_vid 0 ss_did 0
> [ 1.258522] Pid: 1, comm: swapper Not tainted 2.6.26 #110
> [ 1.258527] [<c0544545>] pci_hp_register+0x25/0x4b0
> [ 1.258537] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
> [ 1.258546] [<c05462ad>] ? pciehp_probe+0xbd/0x3f0
> [ 1.258556] [<c054631b>] pciehp_probe+0x12b/0x3f0
> [ 1.258564] [<c04e8b58>] ? sysfs_add_one+0x18/0x50
> [ 1.258573] [<c04e9a94>] ? sysfs_do_create_link+0xa4/0x140
> [ 1.258583] [<c0542110>] pcie_port_probe_service+0x50/0x90
> [ 1.258591] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
> [ 1.258600] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
> [ 1.258609] [<c059f557>] driver_probe_device+0x87/0x1a0
> [ 1.258616] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
> [ 1.258626] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
> [ 1.258634] [<c059f6e9>] __driver_attach+0x79/0x80
> [ 1.258642] [<c059ee23>] bus_for_each_dev+0x53/0x80
> [ 1.258649] [<c059f3ce>] driver_attach+0x1e/0x20
> [ 1.258656] [<c059f670>] ? __driver_attach+0x0/0x80
> [ 1.258665] [<c059e7e7>] bus_add_driver+0x1b7/0x230
> [ 1.258672] [<c059f8be>] driver_register+0x6e/0x150
> [ 1.258679] [<c059f8be>] ? driver_register+0x6e/0x150
> [ 1.258687] [<c054202f>] pcie_port_service_register+0x3f/0x50
> [ 1.258695] [<c07a7b52>] pcied_init+0x16/0x83
> [ 1.258703] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
> [ 1.258712] [<c078b417>] kernel_init+0x1ad/0x2b8
> [ 1.258719] [<c04ae774>] ? sys_select+0x44/0x1a0
> [ 1.258728] [<c07a7b3c>] ? pcied_init+0x0/0x83
> [ 1.258737] [<c042337f>] ? schedule_tail+0x1f/0x50
> [ 1.258745] [<c0403e72>] ? ret_from_fork+0x6/0x1c
> [ 1.258753] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.258761] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.258769] [<c0404b9b>] kernel_thread_helper+0x7/0x10
> [ 1.258777] =======================
> [ 1.258893] hpdriver 0000:00:1c.3:pcie02: service driver hpdriver loaded
> [ 1.259701] pciehp: HPC vendor_id 8086 device_id 2847 ss_vid 0 ss_did 0
> [ 1.259787] Pid: 1, comm: swapper Not tainted 2.6.26 #110
> [ 1.259791] [<c0544545>] pci_hp_register+0x25/0x4b0
> [ 1.259801] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
> [ 1.259810] [<c05462ad>] ? pciehp_probe+0xbd/0x3f0
> [ 1.259819] [<c054631b>] pciehp_probe+0x12b/0x3f0
> [ 1.259827] [<c04e8b58>] ? sysfs_add_one+0x18/0x50
> [ 1.259836] [<c04e9a94>] ? sysfs_do_create_link+0xa4/0x140
> [ 1.259845] [<c0542110>] pcie_port_probe_service+0x50/0x90
> [ 1.259853] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
> [ 1.259862] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
> [ 1.259870] [<c059f557>] driver_probe_device+0x87/0x1a0
> [ 1.259877] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
> [ 1.259886] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
> [ 1.259894] [<c059f6e9>] __driver_attach+0x79/0x80
> [ 1.259901] [<c059ee23>] bus_for_each_dev+0x53/0x80
> [ 1.259908] [<c059f3ce>] driver_attach+0x1e/0x20
> [ 1.259915] [<c059f670>] ? __driver_attach+0x0/0x80
> [ 1.259923] [<c059e7e7>] bus_add_driver+0x1b7/0x230
> [ 1.259930] [<c059f8be>] driver_register+0x6e/0x150
> [ 1.259937] [<c059f8be>] ? driver_register+0x6e/0x150
> [ 1.259945] [<c054202f>] pcie_port_service_register+0x3f/0x50
> [ 1.259954] [<c07a7b52>] pcied_init+0x16/0x83
> [ 1.259962] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
> [ 1.259971] [<c078b417>] kernel_init+0x1ad/0x2b8
> [ 1.259978] [<c04ae774>] ? sys_select+0x44/0x1a0
> [ 1.259987] [<c07a7b3c>] ? pcied_init+0x0/0x83
> [ 1.259996] [<c042337f>] ? schedule_tail+0x1f/0x50
> [ 1.260004] [<c0403e72>] ? ret_from_fork+0x6/0x1c
> [ 1.260012] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.260020] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.260028] [<c0404b9b>] kernel_thread_helper+0x7/0x10
> [ 1.260036] =======================
> [ 1.260041] pciehp: pci_hp_register failed with error -17
> [ 1.260176] pciehp: Failed to register slot because of name collision. Try 'pciehp_slot_with_bus' module option.
> [ 1.260318] pciehp: pciehp: slot initialization failed
> [ 1.260576] pciehp: PCI Express Hot Plug Controller Driver version: 0.4
>
>
> --
> -- Pierre Ossman
>
> Linux kernel, MMC maintainer http://www.kernel.org
> rdesktop, core developer http://www.rdesktop.org
>
> WARNING: This correspondence is being monitored by the
> Swedish government. Make sure your server uses encryption
> for SMTP traffic and consider using PGP for end-to-end
> encryption.
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-24 23:08 ` Alex Chiang
@ 2008-07-24 23:29 ` Pierre Ossman
2008-07-25 3:29 ` Matthew Wilcox
2008-07-25 4:50 ` Kenji Kaneshige
0 siblings, 2 replies; 37+ messages in thread
From: Pierre Ossman @ 2008-07-24 23:29 UTC (permalink / raw)
To: Alex Chiang; +Cc: Jesse Barnes, Kenji Kaneshige, LKML, linux-pci
[-- Attachment #1: Type: text/plain, Size: 24179 bytes --]
On Thu, 24 Jul 2008 17:08:27 -0600
Alex Chiang <achiang@hp.com> wrote:
> Sorry for one more round-trip, but could you turn on debugging
> for pciehp as well?
>
Same thing, with debugging:
[ 1.247138] pcieport-driver 0000:00:01.0: found MSI capability
[ 1.247203] pci_express 0000:00:01.0:pcie00: allocate port service
[ 1.247316] pci_express 0000:00:01.0:pcie02: allocate port service
[ 1.247425] pci_express 0000:00:01.0:pcie03: allocate port service
[ 1.247655] PCI: Setting latency timer of device 0000:00:1c.0 to 64
[ 1.247803] pcieport-driver 0000:00:1c.0: found MSI capability
[ 1.247945] pci_express 0000:00:1c.0:pcie00: allocate port service
[ 1.248058] pci_express 0000:00:1c.0:pcie02: allocate port service
[ 1.248166] pci_express 0000:00:1c.0:pcie03: allocate port service
[ 1.248488] PCI: Setting latency timer of device 0000:00:1c.1 to 64
[ 1.248635] pcieport-driver 0000:00:1c.1: found MSI capability
[ 1.248776] pci_express 0000:00:1c.1:pcie00: allocate port service
[ 1.248909] pci_express 0000:00:1c.1:pcie02: allocate port service
[ 1.249015] pci_express 0000:00:1c.1:pcie03: allocate port service
[ 1.249344] PCI: Setting latency timer of device 0000:00:1c.2 to 64
[ 1.249492] pcieport-driver 0000:00:1c.2: found MSI capability
[ 1.249633] pci_express 0000:00:1c.2:pcie00: allocate port service
[ 1.249743] pci_express 0000:00:1c.2:pcie02: allocate port service
[ 1.249852] pci_express 0000:00:1c.2:pcie03: allocate port service
[ 1.250175] PCI: Setting latency timer of device 0000:00:1c.3 to 64
[ 1.250322] pcieport-driver 0000:00:1c.3: found MSI capability
[ 1.250463] pci_express 0000:00:1c.3:pcie00: allocate port service
[ 1.250570] pci_express 0000:00:1c.3:pcie02: allocate port service
[ 1.250680] pci_express 0000:00:1c.3:pcie03: allocate port service
[ 1.251001] PCI: Setting latency timer of device 0000:00:1c.4 to 64
[ 1.251148] pcieport-driver 0000:00:1c.4: found MSI capability
[ 1.251289] pci_express 0000:00:1c.4:pcie00: allocate port service
[ 1.251397] pci_express 0000:00:1c.4:pcie02: allocate port service
[ 1.251510] pci_express 0000:00:1c.4:pcie03: allocate port service
[ 1.252030] pci_hotplug: PCI Hot Plug PCI Core version: 0.5
[ 1.252940] pciehp: Hotplug Controller:
[ 1.252946] pciehp: Seg/Bus/Dev/Func/IRQ : 0000:00:01.0 IRQ 223
[ 1.252951] pciehp: Vendor ID : 0x8086
[ 1.252955] pciehp: Device ID : 0x2a01
[ 1.252959] pciehp: Subsystem ID : 0x0000
[ 1.252962] pciehp: Subsystem Vendor ID : 0x0000
[ 1.252966] pciehp: PCIe Cap offset : 0xa0
[ 1.252972] pciehp: PCI resource [7] : 0x1000@0x2000
[ 1.252977] pciehp: PCI resource [8] : 0x3000000@0xd4000000
[ 1.252981] pciehp: PCI resource [9] : 0x10000000@0xe0000000
[ 1.252986] pciehp: Slot Capabilities : 0x000c25c0
[ 1.252990] pciehp: Physical Slot Number : 1
[ 1.252994] pciehp: Attention Button : no
[ 1.252998] pciehp: Power Controller : no
[ 1.253002] pciehp: MRL Sensor : no
[ 1.253006] pciehp: Attention Indicator : no
[ 1.253009] pciehp: Power Indicator : no
[ 1.253013] pciehp: Hot-Plug Surprise : no
[ 1.253017] pciehp: EMI Present : no
[ 1.253020] pciehp: Comamnd Completed : no
[ 1.253026] pciehp: Slot Status : 0x0048
[ 1.253031] pciehp: Slot Control : 0x01c0
[ 1.253103] pciehp: HPC vendor_id 8086 device_id 2a01 ss_vid 0 ss_did 0
[ 1.253142] pciehp: get_power_status - physical_slot = 1
[ 1.253149] pciehp: hpc_get_power_status: SLOTCTRL b8 value read 1e8
[ 1.253154] pciehp: get_attention_status - physical_slot = 1
[ 1.253161] pciehp: hpc_get_attention_status: SLOTCTRL b8, value read 1e8
[ 1.253166] pciehp: get_latch_status - physical_slot = 1
[ 1.253172] pciehp: get_adapter_status - physical_slot = 1
[ 1.253179] pciehp: Registering bus=1 dev=0 hp_slot=0 sun=1 slot_device_offset=0
[ 1.253187] Pid: 1, comm: swapper Not tainted 2.6.26 #110
[ 1.253193] [<c0544545>] pci_hp_register+0x25/0x4b0
[ 1.253208] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
[ 1.253218] [<c054631b>] pciehp_probe+0x12b/0x3f0
[ 1.253226] [<c0542110>] pcie_port_probe_service+0x50/0x90
[ 1.253235] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
[ 1.253247] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
[ 1.253256] [<c059f557>] driver_probe_device+0x87/0x1a0
[ 1.253263] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
[ 1.253274] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
[ 1.253282] [<c059f6e9>] __driver_attach+0x79/0x80
[ 1.253289] [<c059ee23>] bus_for_each_dev+0x53/0x80
[ 1.253296] [<c059f3ce>] driver_attach+0x1e/0x20
[ 1.253303] [<c059f670>] ? __driver_attach+0x0/0x80
[ 1.253310] [<c059e7e7>] bus_add_driver+0x1b7/0x230
[ 1.253318] [<c059f8be>] driver_register+0x6e/0x150
[ 1.253325] [<c059f8be>] ? driver_register+0x6e/0x150
[ 1.253332] [<c054202f>] pcie_port_service_register+0x3f/0x50
[ 1.253340] [<c07a7b52>] pcied_init+0x16/0x83
[ 1.253350] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
[ 1.253359] [<c078b417>] kernel_init+0x1ad/0x2b8
[ 1.253368] [<c04ae774>] ? sys_select+0x44/0x1a0
[ 1.253378] [<c07a7b3c>] ? pcied_init+0x0/0x83
[ 1.253387] [<c042337f>] ? schedule_tail+0x1f/0x50
[ 1.253396] [<c0403e72>] ? ret_from_fork+0x6/0x1c
[ 1.253405] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.253413] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.253421] [<c0404b9b>] kernel_thread_helper+0x7/0x10
[ 1.253429] =======================
[ 1.253543] hpdriver 0000:00:01.0:pcie02: service driver hpdriver loaded
[ 1.254331] pciehp: Hotplug Controller:
[ 1.254337] pciehp: Seg/Bus/Dev/Func/IRQ : 0000:00:1c.0 IRQ 222
[ 1.254342] pciehp: Vendor ID : 0x8086
[ 1.254346] pciehp: Device ID : 0x283f
[ 1.254350] pciehp: Subsystem ID : 0x0000
[ 1.254353] pciehp: Subsystem Vendor ID : 0x0000
[ 1.254358] pciehp: PCIe Cap offset : 0x40
[ 1.254363] pciehp: PCI resource [7] : 0x1000@0x3000
[ 1.254367] pciehp: PCI resource [8] : 0x2000000@0xfc000000
[ 1.254372] pciehp: PCI resource [9] : 0x100000@0xf8000000
[ 1.254377] pciehp: Slot Capabilities : 0x0010a0e0
[ 1.254381] pciehp: Physical Slot Number : 2
[ 1.254384] pciehp: Attention Button : no
[ 1.254389] pciehp: Power Controller : no
[ 1.254392] pciehp: MRL Sensor : no
[ 1.254396] pciehp: Attention Indicator : no
[ 1.254400] pciehp: Power Indicator : no
[ 1.254404] pciehp: Hot-Plug Surprise : yes
[ 1.254408] pciehp: EMI Present : no
[ 1.254411] pciehp: Comamnd Completed : yes
[ 1.254419] pciehp: Slot Status : 0x0000
[ 1.254428] pciehp: Slot Control : 0x0000
[ 1.254451] pciehp: HPC vendor_id 8086 device_id 283f ss_vid 0 ss_did 0
[ 1.254513] pciehp: get_power_status - physical_slot = 2
[ 1.254522] pciehp: hpc_get_power_status: SLOTCTRL 58 value read 38
[ 1.254527] pciehp: get_attention_status - physical_slot = 2
[ 1.254536] pciehp: hpc_get_attention_status: SLOTCTRL 58, value read 38
[ 1.254541] pciehp: get_latch_status - physical_slot = 2
[ 1.254550] pciehp: get_adapter_status - physical_slot = 2
[ 1.254560] pciehp: Registering bus=2 dev=0 hp_slot=0 sun=2 slot_device_offset=0
[ 1.254566] Pid: 1, comm: swapper Not tainted 2.6.26 #110
[ 1.254571] [<c0544545>] pci_hp_register+0x25/0x4b0
[ 1.254580] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
[ 1.254590] [<c054631b>] pciehp_probe+0x12b/0x3f0
[ 1.254598] [<c0542110>] pcie_port_probe_service+0x50/0x90
[ 1.254606] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
[ 1.254616] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
[ 1.254624] [<c059f557>] driver_probe_device+0x87/0x1a0
[ 1.254631] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
[ 1.254641] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
[ 1.254649] [<c059f6e9>] __driver_attach+0x79/0x80
[ 1.254656] [<c059ee23>] bus_for_each_dev+0x53/0x80
[ 1.254663] [<c059f3ce>] driver_attach+0x1e/0x20
[ 1.254670] [<c059f670>] ? __driver_attach+0x0/0x80
[ 1.254678] [<c059e7e7>] bus_add_driver+0x1b7/0x230
[ 1.254685] [<c059f8be>] driver_register+0x6e/0x150
[ 1.254692] [<c059f8be>] ? driver_register+0x6e/0x150
[ 1.254700] [<c054202f>] pcie_port_service_register+0x3f/0x50
[ 1.254709] [<c07a7b52>] pcied_init+0x16/0x83
[ 1.254717] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
[ 1.254725] [<c078b417>] kernel_init+0x1ad/0x2b8
[ 1.254733] [<c04ae774>] ? sys_select+0x44/0x1a0
[ 1.254742] [<c07a7b3c>] ? pcied_init+0x0/0x83
[ 1.254751] [<c042337f>] ? schedule_tail+0x1f/0x50
[ 1.254759] [<c0403e72>] ? ret_from_fork+0x6/0x1c
[ 1.254767] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.254776] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.254784] [<c0404b9b>] kernel_thread_helper+0x7/0x10
[ 1.254792] =======================
[ 1.254909] hpdriver 0000:00:1c.0:pcie02: service driver hpdriver loaded
[ 1.255694] pciehp: Hotplug Controller:
[ 1.255700] pciehp: Seg/Bus/Dev/Func/IRQ : 0000:00:1c.1 IRQ 221
[ 1.255704] pciehp: Vendor ID : 0x8086
[ 1.255709] pciehp: Device ID : 0x2841
[ 1.255712] pciehp: Subsystem ID : 0x0000
[ 1.255716] pciehp: Subsystem Vendor ID : 0x0000
[ 1.255720] pciehp: PCIe Cap offset : 0x40
[ 1.255725] pciehp: PCI resource [7] : 0x1000@0x4000
[ 1.255730] pciehp: PCI resource [8] : 0x3200000@0xdc100000
[ 1.255735] pciehp: PCI resource [9] : 0x100000@0xdfd00000
[ 1.255739] pciehp: Slot Capabilities : 0x0018a0e0
[ 1.255743] pciehp: Physical Slot Number : 3
[ 1.255747] pciehp: Attention Button : no
[ 1.255750] pciehp: Power Controller : no
[ 1.255754] pciehp: MRL Sensor : no
[ 1.255758] pciehp: Attention Indicator : no
[ 1.255762] pciehp: Power Indicator : no
[ 1.255765] pciehp: Hot-Plug Surprise : yes
[ 1.255769] pciehp: EMI Present : no
[ 1.255773] pciehp: Comamnd Completed : yes
[ 1.255781] pciehp: Slot Status : 0x0148
[ 1.255792] pciehp: Slot Control : 0x0000
[ 1.255817] pciehp: HPC vendor_id 8086 device_id 2841 ss_vid 0 ss_did 0
[ 1.255884] pciehp: get_power_status - physical_slot = 3
[ 1.255894] pciehp: hpc_get_power_status: SLOTCTRL 58 value read 38
[ 1.255899] pciehp: get_attention_status - physical_slot = 3
[ 1.255909] pciehp: hpc_get_attention_status: SLOTCTRL 58, value read 38
[ 1.255914] pciehp: get_latch_status - physical_slot = 3
[ 1.255922] pciehp: get_adapter_status - physical_slot = 3
[ 1.255932] pciehp: Registering bus=3 dev=0 hp_slot=0 sun=3 slot_device_offset=0
[ 1.255938] Pid: 1, comm: swapper Not tainted 2.6.26 #110
[ 1.255943] [<c0544545>] pci_hp_register+0x25/0x4b0
[ 1.255952] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
[ 1.255962] [<c054631b>] pciehp_probe+0x12b/0x3f0
[ 1.255971] [<c0542110>] pcie_port_probe_service+0x50/0x90
[ 1.255978] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
[ 1.255988] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
[ 1.255996] [<c059f557>] driver_probe_device+0x87/0x1a0
[ 1.256003] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
[ 1.256013] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
[ 1.256021] [<c059f6e9>] __driver_attach+0x79/0x80
[ 1.256028] [<c059ee23>] bus_for_each_dev+0x53/0x80
[ 1.256035] [<c059f3ce>] driver_attach+0x1e/0x20
[ 1.256042] [<c059f670>] ? __driver_attach+0x0/0x80
[ 1.256050] [<c059e7e7>] bus_add_driver+0x1b7/0x230
[ 1.256057] [<c059f8be>] driver_register+0x6e/0x150
[ 1.256064] [<c059f8be>] ? driver_register+0x6e/0x150
[ 1.256072] [<c054202f>] pcie_port_service_register+0x3f/0x50
[ 1.256081] [<c07a7b52>] pcied_init+0x16/0x83
[ 1.256089] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
[ 1.256098] [<c078b417>] kernel_init+0x1ad/0x2b8
[ 1.256105] [<c04ae774>] ? sys_select+0x44/0x1a0
[ 1.256114] [<c07a7b3c>] ? pcied_init+0x0/0x83
[ 1.256122] [<c042337f>] ? schedule_tail+0x1f/0x50
[ 1.256131] [<c0403e72>] ? ret_from_fork+0x6/0x1c
[ 1.256139] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.256147] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.256155] [<c0404b9b>] kernel_thread_helper+0x7/0x10
[ 1.256163] =======================
[ 1.256279] hpdriver 0000:00:1c.1:pcie02: service driver hpdriver loaded
[ 1.257096] pciehp: Hotplug Controller:
[ 1.257101] pciehp: Seg/Bus/Dev/Func/IRQ : 0000:00:1c.2 IRQ 220
[ 1.257106] pciehp: Vendor ID : 0x8086
[ 1.257110] pciehp: Device ID : 0x2843
[ 1.257114] pciehp: Subsystem ID : 0x0000
[ 1.257117] pciehp: Subsystem Vendor ID : 0x0000
[ 1.257121] pciehp: PCIe Cap offset : 0x40
[ 1.257126] pciehp: PCI resource [7] : 0x1000@0x5000
[ 1.257131] pciehp: PCI resource [8] : 0x2000000@0xd8000000
[ 1.257136] pciehp: PCI resource [9] : 0x100000@0xdfa00000
[ 1.257140] pciehp: Slot Capabilities : 0x0020a0e0
[ 1.257144] pciehp: Physical Slot Number : 4
[ 1.257148] pciehp: Attention Button : no
[ 1.257152] pciehp: Power Controller : no
[ 1.257155] pciehp: MRL Sensor : no
[ 1.257159] pciehp: Attention Indicator : no
[ 1.257163] pciehp: Power Indicator : no
[ 1.257166] pciehp: Hot-Plug Surprise : yes
[ 1.257170] pciehp: EMI Present : no
[ 1.257173] pciehp: Comamnd Completed : yes
[ 1.257181] pciehp: Slot Status : 0x0000
[ 1.257189] pciehp: Slot Control : 0x0000
[ 1.257213] pciehp: HPC vendor_id 8086 device_id 2843 ss_vid 0 ss_did 0
[ 1.257274] pciehp: get_power_status - physical_slot = 4
[ 1.257283] pciehp: hpc_get_power_status: SLOTCTRL 58 value read 38
[ 1.257288] pciehp: get_attention_status - physical_slot = 4
[ 1.257297] pciehp: hpc_get_attention_status: SLOTCTRL 58, value read 38
[ 1.257302] pciehp: get_latch_status - physical_slot = 4
[ 1.257311] pciehp: get_adapter_status - physical_slot = 4
[ 1.257320] pciehp: Registering bus=4 dev=0 hp_slot=0 sun=4 slot_device_offset=0
[ 1.257326] Pid: 1, comm: swapper Not tainted 2.6.26 #110
[ 1.257332] [<c0544545>] pci_hp_register+0x25/0x4b0
[ 1.257341] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
[ 1.257351] [<c054631b>] pciehp_probe+0x12b/0x3f0
[ 1.257360] [<c0542110>] pcie_port_probe_service+0x50/0x90
[ 1.257367] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
[ 1.257377] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
[ 1.257385] [<c059f557>] driver_probe_device+0x87/0x1a0
[ 1.257392] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
[ 1.257401] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
[ 1.257409] [<c059f6e9>] __driver_attach+0x79/0x80
[ 1.257417] [<c059ee23>] bus_for_each_dev+0x53/0x80
[ 1.257424] [<c059f3ce>] driver_attach+0x1e/0x20
[ 1.257430] [<c059f670>] ? __driver_attach+0x0/0x80
[ 1.257438] [<c059e7e7>] bus_add_driver+0x1b7/0x230
[ 1.257445] [<c059f8be>] driver_register+0x6e/0x150
[ 1.257452] [<c059f8be>] ? driver_register+0x6e/0x150
[ 1.257460] [<c054202f>] pcie_port_service_register+0x3f/0x50
[ 1.257469] [<c07a7b52>] pcied_init+0x16/0x83
[ 1.257477] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
[ 1.257485] [<c078b417>] kernel_init+0x1ad/0x2b8
[ 1.257493] [<c04ae774>] ? sys_select+0x44/0x1a0
[ 1.257502] [<c07a7b3c>] ? pcied_init+0x0/0x83
[ 1.257511] [<c042337f>] ? schedule_tail+0x1f/0x50
[ 1.257519] [<c0403e72>] ? ret_from_fork+0x6/0x1c
[ 1.257527] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.257535] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.257543] [<c0404b9b>] kernel_thread_helper+0x7/0x10
[ 1.257551] =======================
[ 1.257666] hpdriver 0000:00:1c.2:pcie02: service driver hpdriver loaded
[ 1.258450] pciehp: Hotplug Controller:
[ 1.258455] pciehp: Seg/Bus/Dev/Func/IRQ : 0000:00:1c.3 IRQ 219
[ 1.258460] pciehp: Vendor ID : 0x8086
[ 1.258464] pciehp: Device ID : 0x2845
[ 1.258468] pciehp: Subsystem ID : 0x0000
[ 1.258472] pciehp: Subsystem Vendor ID : 0x0000
[ 1.258476] pciehp: PCIe Cap offset : 0x40
[ 1.258480] pciehp: PCI resource [7] : 0x1000@0x6000
[ 1.258485] pciehp: PCI resource [8] : 0x2000000@0xd0000000
[ 1.258490] pciehp: PCI resource [9] : 0x100000@0xdf700000
[ 1.258495] pciehp: Slot Capabilities : 0x0028a0e0
[ 1.258499] pciehp: Physical Slot Number : 5
[ 1.258502] pciehp: Attention Button : no
[ 1.258507] pciehp: Power Controller : no
[ 1.258510] pciehp: MRL Sensor : no
[ 1.258514] pciehp: Attention Indicator : no
[ 1.258517] pciehp: Power Indicator : no
[ 1.258521] pciehp: Hot-Plug Surprise : yes
[ 1.258525] pciehp: EMI Present : no
[ 1.258528] pciehp: Comamnd Completed : yes
[ 1.258536] pciehp: Slot Status : 0x0000
[ 1.258544] pciehp: Slot Control : 0x0028
[ 1.258568] pciehp: HPC vendor_id 8086 device_id 2845 ss_vid 0 ss_did 0
[ 1.258628] pciehp: get_power_status - physical_slot = 5
[ 1.258638] pciehp: hpc_get_power_status: SLOTCTRL 58 value read 38
[ 1.258643] pciehp: get_attention_status - physical_slot = 5
[ 1.258652] pciehp: hpc_get_attention_status: SLOTCTRL 58, value read 38
[ 1.258657] pciehp: get_latch_status - physical_slot = 5
[ 1.258665] pciehp: get_adapter_status - physical_slot = 5
[ 1.258675] pciehp: Registering bus=5 dev=0 hp_slot=0 sun=5 slot_device_offset=0
[ 1.258681] Pid: 1, comm: swapper Not tainted 2.6.26 #110
[ 1.258686] [<c0544545>] pci_hp_register+0x25/0x4b0
[ 1.258696] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
[ 1.258705] [<c054631b>] pciehp_probe+0x12b/0x3f0
[ 1.258713] [<c0542110>] pcie_port_probe_service+0x50/0x90
[ 1.258721] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
[ 1.258730] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
[ 1.258739] [<c059f557>] driver_probe_device+0x87/0x1a0
[ 1.258746] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
[ 1.258756] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
[ 1.258764] [<c059f6e9>] __driver_attach+0x79/0x80
[ 1.258772] [<c059ee23>] bus_for_each_dev+0x53/0x80
[ 1.258778] [<c059f3ce>] driver_attach+0x1e/0x20
[ 1.258785] [<c059f670>] ? __driver_attach+0x0/0x80
[ 1.258793] [<c059e7e7>] bus_add_driver+0x1b7/0x230
[ 1.258801] [<c059f8be>] driver_register+0x6e/0x150
[ 1.258808] [<c059f8be>] ? driver_register+0x6e/0x150
[ 1.258816] [<c054202f>] pcie_port_service_register+0x3f/0x50
[ 1.258824] [<c07a7b52>] pcied_init+0x16/0x83
[ 1.258832] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
[ 1.258841] [<c078b417>] kernel_init+0x1ad/0x2b8
[ 1.258849] [<c04ae774>] ? sys_select+0x44/0x1a0
[ 1.258857] [<c07a7b3c>] ? pcied_init+0x0/0x83
[ 1.258866] [<c042337f>] ? schedule_tail+0x1f/0x50
[ 1.258874] [<c0403e72>] ? ret_from_fork+0x6/0x1c
[ 1.258883] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.258891] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.258899] [<c0404b9b>] kernel_thread_helper+0x7/0x10
[ 1.258907] =======================
[ 1.259022] hpdriver 0000:00:1c.3:pcie02: service driver hpdriver loaded
[ 1.259814] pciehp: Hotplug Controller:
[ 1.259820] pciehp: Seg/Bus/Dev/Func/IRQ : 0000:00:1c.4 IRQ 218
[ 1.259825] pciehp: Vendor ID : 0x8086
[ 1.259829] pciehp: Device ID : 0x2847
[ 1.259833] pciehp: Subsystem ID : 0x0000
[ 1.259836] pciehp: Subsystem Vendor ID : 0x0000
[ 1.259840] pciehp: PCIe Cap offset : 0x40
[ 1.259845] pciehp: PCI resource [7] : 0x1000@0x7000
[ 1.259850] pciehp: PCI resource [8] : 0x2000000@0xcc000000
[ 1.259855] pciehp: PCI resource [9] : 0x100000@0xdf400000
[ 1.259859] pciehp: Slot Capabilities : 0x0010a0e0
[ 1.259863] pciehp: Physical Slot Number : 2
[ 1.259867] pciehp: Attention Button : no
[ 1.259871] pciehp: Power Controller : no
[ 1.259875] pciehp: MRL Sensor : no
[ 1.259879] pciehp: Attention Indicator : no
[ 1.259883] pciehp: Power Indicator : no
[ 1.259886] pciehp: Hot-Plug Surprise : yes
[ 1.259890] pciehp: EMI Present : no
[ 1.259893] pciehp: Comamnd Completed : yes
[ 1.259901] pciehp: Slot Status : 0x0000
[ 1.259910] pciehp: Slot Control : 0x0000
[ 1.259933] pciehp: HPC vendor_id 8086 device_id 2847 ss_vid 0 ss_did 0
[ 1.259994] pciehp: get_power_status - physical_slot = 2
[ 1.260003] pciehp: hpc_get_power_status: SLOTCTRL 58 value read 38
[ 1.260008] pciehp: get_attention_status - physical_slot = 2
[ 1.260017] pciehp: hpc_get_attention_status: SLOTCTRL 58, value read 38
[ 1.260022] pciehp: get_latch_status - physical_slot = 2
[ 1.260031] pciehp: get_adapter_status - physical_slot = 2
[ 1.260041] pciehp: Registering bus=d dev=0 hp_slot=0 sun=2 slot_device_offset=0
[ 1.260047] Pid: 1, comm: swapper Not tainted 2.6.26 #110
[ 1.260052] [<c0544545>] pci_hp_register+0x25/0x4b0
[ 1.260061] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
[ 1.260071] [<c054631b>] pciehp_probe+0x12b/0x3f0
[ 1.260079] [<c0542110>] pcie_port_probe_service+0x50/0x90
[ 1.260087] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
[ 1.260096] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
[ 1.260104] [<c059f557>] driver_probe_device+0x87/0x1a0
[ 1.260111] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
[ 1.260121] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
[ 1.260129] [<c059f6e9>] __driver_attach+0x79/0x80
[ 1.260137] [<c059ee23>] bus_for_each_dev+0x53/0x80
[ 1.260144] [<c059f3ce>] driver_attach+0x1e/0x20
[ 1.260151] [<c059f670>] ? __driver_attach+0x0/0x80
[ 1.260159] [<c059e7e7>] bus_add_driver+0x1b7/0x230
[ 1.260166] [<c059f8be>] driver_register+0x6e/0x150
[ 1.260174] [<c059f8be>] ? driver_register+0x6e/0x150
[ 1.260182] [<c054202f>] pcie_port_service_register+0x3f/0x50
[ 1.260191] [<c07a7b52>] pcied_init+0x16/0x83
[ 1.260199] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
[ 1.260208] [<c078b417>] kernel_init+0x1ad/0x2b8
[ 1.260216] [<c04ae774>] ? sys_select+0x44/0x1a0
[ 1.260225] [<c07a7b3c>] ? pcied_init+0x0/0x83
[ 1.260234] [<c042337f>] ? schedule_tail+0x1f/0x50
[ 1.260242] [<c0403e72>] ? ret_from_fork+0x6/0x1c
[ 1.260250] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.260258] [<c078b26a>] ? kernel_init+0x0/0x2b8
[ 1.260266] [<c0404b9b>] kernel_thread_helper+0x7/0x10
[ 1.260274] =======================
[ 1.260278] pciehp: pci_hp_register failed with error -17
[ 1.260412] pciehp: Failed to register slot because of name collision. Try 'pciehp_slot_with_bus' module option.
[ 1.260547] pciehp: pciehp: slot initialization failed
[ 1.260817] pciehp: pcie_port_service_register = 0
[ 1.260822] pciehp: PCI Express Hot Plug Controller Driver version: 0.4
--
-- Pierre Ossman
Linux kernel, MMC maintainer http://www.kernel.org
rdesktop, core developer http://www.rdesktop.org
WARNING: This correspondence is being monitored by the
Swedish government. Make sure your server uses encryption
for SMTP traffic and consider using PGP for end-to-end
encryption.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 197 bytes --]
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-24 23:29 ` Pierre Ossman
@ 2008-07-25 3:29 ` Matthew Wilcox
2008-07-25 4:42 ` Alex Chiang
` (2 more replies)
2008-07-25 4:50 ` Kenji Kaneshige
1 sibling, 3 replies; 37+ messages in thread
From: Matthew Wilcox @ 2008-07-25 3:29 UTC (permalink / raw)
To: Pierre Ossman; +Cc: Alex Chiang, Jesse Barnes, Kenji Kaneshige, LKML, linux-pci
On Fri, Jul 25, 2008 at 01:29:16AM +0200, Pierre Ossman wrote:
> On Thu, 24 Jul 2008 17:08:27 -0600
> Alex Chiang <achiang@hp.com> wrote:
>
> > Sorry for one more round-trip, but could you turn on debugging
> > for pciehp as well?
> >
>
> Same thing, with debugging:
I have a laptop with a similar problem (though I don't have pciehp
enabled, so I didn't notice it). Obviously, we need to fix this.
There is no question in my mind that firmware has programmed the slot
numbers incorrectly. Here's the evidence from lspci -vvv:
00:1c.0 PCI bridge: Intel Corporation 82801H (ICH8 Family) PCI Express Port 1 (rev 03)
Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+
Slot # 2, PowerLimit 6.500000; Interlock- NoCompl-
00:1c.4 PCI bridge: Intel Corporation 82801H (ICH8 Family) PCI Express Port 5 (rev 03)
Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+
Slot # 2, PowerLimit 6.500000; Interlock- NoCompl-
I don't think anyone can credibly argue that this is correct. They're
both PCIe devices, they're both both indicating that they have a slot
(maybe if I get my screwdriver out, I can see if there's really a slot
...), they're on the same bus (so I don't know how the with_bus
parameter makes any difference).
I've always hated that with_bus parameter. I don't like it being a
parameter and I don't like the names it produces.
Part of the problem is the kobject API. It really hates you trying to
register a duplicate name and won't just return -EEXIST and let you try
a new name. Instead it prints an ugly warning and dumps stack. See
kobject_add_internal() in lib/kobject.c.
So we need a way to find if there's already a slot of this name. I
don't see a kobject routine to do that. Maybe we can do it internally
to the pci slot code.
Then we need to pick a new name for the kobject if it does collide.
My suggestion is that the second time we find an object named "2", we
call it "2dup1" (the third time "2dup2", etc.) Other opinions I've
seen include "2a", "2b", ... or "2-1", "2-2", ... or "2-brokenfw1",
"2-brokenfw2".
I'm at OLS this week, so no patch from me.
--
Intel are signing my paycheques ... these opinions are still mine
"Bill, look, we understand that you're interested in selling us this
operating system, but compare it to ours. We can't possibly take such
a retrograde step."
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-25 3:29 ` Matthew Wilcox
@ 2008-07-25 4:42 ` Alex Chiang
2008-07-25 5:38 ` Kenji Kaneshige
2008-07-28 18:05 ` Greg KH
2008-07-25 4:57 ` Kenji Kaneshige
2008-07-25 8:53 ` Kenji Kaneshige
2 siblings, 2 replies; 37+ messages in thread
From: Alex Chiang @ 2008-07-25 4:42 UTC (permalink / raw)
To: Matthew Wilcox
Cc: Pierre Ossman, Jesse Barnes, Kenji Kaneshige, LKML, linux-pci
* Matthew Wilcox <matthew@wil.cx>:
> On Fri, Jul 25, 2008 at 01:29:16AM +0200, Pierre Ossman wrote:
> > On Thu, 24 Jul 2008 17:08:27 -0600
> > Alex Chiang <achiang@hp.com> wrote:
> >
> > > Sorry for one more round-trip, but could you turn on debugging
> > > for pciehp as well?
> > >
> >
> > Same thing, with debugging:
>
> I have a laptop with a similar problem (though I don't have pciehp
> enabled, so I didn't notice it). Obviously, we need to fix this.
>
> There is no question in my mind that firmware has programmed the slot
> numbers incorrectly. Here's the evidence from lspci -vvv:
>
> 00:1c.0 PCI bridge: Intel Corporation 82801H (ICH8 Family) PCI Express Port 1 (rev 03)
> Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
> SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+
> Slot # 2, PowerLimit 6.500000; Interlock- NoCompl-
> 00:1c.4 PCI bridge: Intel Corporation 82801H (ICH8 Family) PCI Express Port 5 (rev 03)
> Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
> SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+
> Slot # 2, PowerLimit 6.500000; Interlock- NoCompl-
>
> I don't think anyone can credibly argue that this is correct. They're
> both PCIe devices, they're both both indicating that they have a slot
> (maybe if I get my screwdriver out, I can see if there's really a slot
> ...), they're on the same bus (so I don't know how the with_bus
> parameter makes any difference).
>
> I've always hated that with_bus parameter. I don't like it being a
> parameter and I don't like the names it produces.
>
> Part of the problem is the kobject API. It really hates you trying to
> register a duplicate name and won't just return -EEXIST and let you try
> a new name. Instead it prints an ugly warning and dumps stack. See
> kobject_add_internal() in lib/kobject.c.
Yeah, I don't really like that part of the kobject API either.
> So we need a way to find if there's already a slot of this name. I
> don't see a kobject routine to do that. Maybe we can do it internally
> to the pci slot code.
Well, we have this code in pci_hp_register:
/* Check if we have already registered a slot with the same name. */
if (get_slot_from_name(slot->name))
return -EEXIST;
> Then we need to pick a new name for the kobject if it does collide.
> My suggestion is that the second time we find an object named "2", we
> call it "2dup1" (the third time "2dup2", etc.) Other opinions I've
> seen include "2a", "2b", ... or "2-1", "2-2", ... or "2-brokenfw1",
> "2-brokenfw2".
>
> I'm at OLS this week, so no patch from me.
It should be pretty easy for pci_hp_register() to fix up the name
in the event of a collision.
The hard part is figuring out a convention that we can all agree
on. ;) I've no strong feelings here, but of the options
presented, I lean towards "2a", "2b" or "2-1", "2-2".
/ac
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-24 23:29 ` Pierre Ossman
2008-07-25 3:29 ` Matthew Wilcox
@ 2008-07-25 4:50 ` Kenji Kaneshige
2008-07-25 22:18 ` Jesse Barnes
1 sibling, 1 reply; 37+ messages in thread
From: Kenji Kaneshige @ 2008-07-25 4:50 UTC (permalink / raw)
To: Pierre Ossman; +Cc: Alex Chiang, Jesse Barnes, LKML, linux-pci, Kristen Accardi
Thank you for debug info, Pierre.
According to the debugging output, five slots are detected (five
slots on laptop!?) and two of them have the same physical slots
number '2'. This is the reason why Pierre's machine needs
'pciehp_slot_with_bus' option.
Before 2.6.26 (from 2.6.xx), pciehp did the workaround for the
problem (some platform wrongly assign the same physical slot
number to multiple slots) by default. But this was not a good
idea because of the several reasons like follows:
- Slot name should be a physical identifier of physical slot
on the system. Using bus number as a part of slot name is
not a idea because bus number is logical number and it can
be changed.
- As Jesse explained, some hotplug slot can be handled through
several type of controllers. For example, some hotplug slot
can be handled by either acpiphp or pciehp. But those drivers
must not handle the same slot at the same time. The pci
hotplug core is checking this by checking duplicate names.
This check didn't work because pciehp had started using bus
number as a part of slot name and slot names became different
between acpiphp and pciehp.
About the former, I'm ok with using bus number as a part of slot
name on the problematic platform. But it should not be used on
the normal platform.
About the latter, IIRC, thanks to Alex's pci slot framework from
2.6.26, pci hotplug core can check if multiple drivers attempts
to handle the same slot even if those drivers uses the different
names.
Based on my thought above, I have a following idea to remove
"pciehp_slot_with_bus".
- Try to use physical slot number as a slot name, first.
- If pci_hp_register() success, no problem.
- If pci_hp_register() returns -EBUSY, that means another
hotplug driver already handling the slot. So return as error.
- If pci_hp_register() returns -EEXIST, that means there is a
existing slot with the same name. In this case, retry to
register slots with logical name (bus number + physical slot
number, or other).
With this idea, slots names will become as follows on Pierre's
machine.
<Before 2.6.26>
0001_0001, 0002_0002, 0003_0003, 0004_0004, 0005_0005, 000d_0002
<Current>
1, 2, 3, 4, 5
<With my idea>
1, 2, 3, 4, 5, 000d_0002
Please give me comments.
Thanks,
Kenji Kaneshige
Pierre Ossman wrote:
> On Thu, 24 Jul 2008 17:08:27 -0600
> Alex Chiang <achiang@hp.com> wrote:
>
>> Sorry for one more round-trip, but could you turn on debugging
>> for pciehp as well?
>>
>
> Same thing, with debugging:
>
> [ 1.247138] pcieport-driver 0000:00:01.0: found MSI capability
> [ 1.247203] pci_express 0000:00:01.0:pcie00: allocate port service
> [ 1.247316] pci_express 0000:00:01.0:pcie02: allocate port service
> [ 1.247425] pci_express 0000:00:01.0:pcie03: allocate port service
> [ 1.247655] PCI: Setting latency timer of device 0000:00:1c.0 to 64
> [ 1.247803] pcieport-driver 0000:00:1c.0: found MSI capability
> [ 1.247945] pci_express 0000:00:1c.0:pcie00: allocate port service
> [ 1.248058] pci_express 0000:00:1c.0:pcie02: allocate port service
> [ 1.248166] pci_express 0000:00:1c.0:pcie03: allocate port service
> [ 1.248488] PCI: Setting latency timer of device 0000:00:1c.1 to 64
> [ 1.248635] pcieport-driver 0000:00:1c.1: found MSI capability
> [ 1.248776] pci_express 0000:00:1c.1:pcie00: allocate port service
> [ 1.248909] pci_express 0000:00:1c.1:pcie02: allocate port service
> [ 1.249015] pci_express 0000:00:1c.1:pcie03: allocate port service
> [ 1.249344] PCI: Setting latency timer of device 0000:00:1c.2 to 64
> [ 1.249492] pcieport-driver 0000:00:1c.2: found MSI capability
> [ 1.249633] pci_express 0000:00:1c.2:pcie00: allocate port service
> [ 1.249743] pci_express 0000:00:1c.2:pcie02: allocate port service
> [ 1.249852] pci_express 0000:00:1c.2:pcie03: allocate port service
> [ 1.250175] PCI: Setting latency timer of device 0000:00:1c.3 to 64
> [ 1.250322] pcieport-driver 0000:00:1c.3: found MSI capability
> [ 1.250463] pci_express 0000:00:1c.3:pcie00: allocate port service
> [ 1.250570] pci_express 0000:00:1c.3:pcie02: allocate port service
> [ 1.250680] pci_express 0000:00:1c.3:pcie03: allocate port service
> [ 1.251001] PCI: Setting latency timer of device 0000:00:1c.4 to 64
> [ 1.251148] pcieport-driver 0000:00:1c.4: found MSI capability
> [ 1.251289] pci_express 0000:00:1c.4:pcie00: allocate port service
> [ 1.251397] pci_express 0000:00:1c.4:pcie02: allocate port service
> [ 1.251510] pci_express 0000:00:1c.4:pcie03: allocate port service
> [ 1.252030] pci_hotplug: PCI Hot Plug PCI Core version: 0.5
> [ 1.252940] pciehp: Hotplug Controller:
> [ 1.252946] pciehp: Seg/Bus/Dev/Func/IRQ : 0000:00:01.0 IRQ 223
> [ 1.252951] pciehp: Vendor ID : 0x8086
> [ 1.252955] pciehp: Device ID : 0x2a01
> [ 1.252959] pciehp: Subsystem ID : 0x0000
> [ 1.252962] pciehp: Subsystem Vendor ID : 0x0000
> [ 1.252966] pciehp: PCIe Cap offset : 0xa0
> [ 1.252972] pciehp: PCI resource [7] : 0x1000@0x2000
> [ 1.252977] pciehp: PCI resource [8] : 0x3000000@0xd4000000
> [ 1.252981] pciehp: PCI resource [9] : 0x10000000@0xe0000000
> [ 1.252986] pciehp: Slot Capabilities : 0x000c25c0
> [ 1.252990] pciehp: Physical Slot Number : 1
> [ 1.252994] pciehp: Attention Button : no
> [ 1.252998] pciehp: Power Controller : no
> [ 1.253002] pciehp: MRL Sensor : no
> [ 1.253006] pciehp: Attention Indicator : no
> [ 1.253009] pciehp: Power Indicator : no
> [ 1.253013] pciehp: Hot-Plug Surprise : no
> [ 1.253017] pciehp: EMI Present : no
> [ 1.253020] pciehp: Comamnd Completed : no
> [ 1.253026] pciehp: Slot Status : 0x0048
> [ 1.253031] pciehp: Slot Control : 0x01c0
> [ 1.253103] pciehp: HPC vendor_id 8086 device_id 2a01 ss_vid 0 ss_did 0
> [ 1.253142] pciehp: get_power_status - physical_slot = 1
> [ 1.253149] pciehp: hpc_get_power_status: SLOTCTRL b8 value read 1e8
> [ 1.253154] pciehp: get_attention_status - physical_slot = 1
> [ 1.253161] pciehp: hpc_get_attention_status: SLOTCTRL b8, value read 1e8
> [ 1.253166] pciehp: get_latch_status - physical_slot = 1
> [ 1.253172] pciehp: get_adapter_status - physical_slot = 1
> [ 1.253179] pciehp: Registering bus=1 dev=0 hp_slot=0 sun=1 slot_device_offset=0
> [ 1.253187] Pid: 1, comm: swapper Not tainted 2.6.26 #110
> [ 1.253193] [<c0544545>] pci_hp_register+0x25/0x4b0
> [ 1.253208] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
> [ 1.253218] [<c054631b>] pciehp_probe+0x12b/0x3f0
> [ 1.253226] [<c0542110>] pcie_port_probe_service+0x50/0x90
> [ 1.253235] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
> [ 1.253247] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
> [ 1.253256] [<c059f557>] driver_probe_device+0x87/0x1a0
> [ 1.253263] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
> [ 1.253274] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
> [ 1.253282] [<c059f6e9>] __driver_attach+0x79/0x80
> [ 1.253289] [<c059ee23>] bus_for_each_dev+0x53/0x80
> [ 1.253296] [<c059f3ce>] driver_attach+0x1e/0x20
> [ 1.253303] [<c059f670>] ? __driver_attach+0x0/0x80
> [ 1.253310] [<c059e7e7>] bus_add_driver+0x1b7/0x230
> [ 1.253318] [<c059f8be>] driver_register+0x6e/0x150
> [ 1.253325] [<c059f8be>] ? driver_register+0x6e/0x150
> [ 1.253332] [<c054202f>] pcie_port_service_register+0x3f/0x50
> [ 1.253340] [<c07a7b52>] pcied_init+0x16/0x83
> [ 1.253350] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
> [ 1.253359] [<c078b417>] kernel_init+0x1ad/0x2b8
> [ 1.253368] [<c04ae774>] ? sys_select+0x44/0x1a0
> [ 1.253378] [<c07a7b3c>] ? pcied_init+0x0/0x83
> [ 1.253387] [<c042337f>] ? schedule_tail+0x1f/0x50
> [ 1.253396] [<c0403e72>] ? ret_from_fork+0x6/0x1c
> [ 1.253405] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.253413] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.253421] [<c0404b9b>] kernel_thread_helper+0x7/0x10
> [ 1.253429] =======================
> [ 1.253543] hpdriver 0000:00:01.0:pcie02: service driver hpdriver loaded
> [ 1.254331] pciehp: Hotplug Controller:
> [ 1.254337] pciehp: Seg/Bus/Dev/Func/IRQ : 0000:00:1c.0 IRQ 222
> [ 1.254342] pciehp: Vendor ID : 0x8086
> [ 1.254346] pciehp: Device ID : 0x283f
> [ 1.254350] pciehp: Subsystem ID : 0x0000
> [ 1.254353] pciehp: Subsystem Vendor ID : 0x0000
> [ 1.254358] pciehp: PCIe Cap offset : 0x40
> [ 1.254363] pciehp: PCI resource [7] : 0x1000@0x3000
> [ 1.254367] pciehp: PCI resource [8] : 0x2000000@0xfc000000
> [ 1.254372] pciehp: PCI resource [9] : 0x100000@0xf8000000
> [ 1.254377] pciehp: Slot Capabilities : 0x0010a0e0
> [ 1.254381] pciehp: Physical Slot Number : 2
> [ 1.254384] pciehp: Attention Button : no
> [ 1.254389] pciehp: Power Controller : no
> [ 1.254392] pciehp: MRL Sensor : no
> [ 1.254396] pciehp: Attention Indicator : no
> [ 1.254400] pciehp: Power Indicator : no
> [ 1.254404] pciehp: Hot-Plug Surprise : yes
> [ 1.254408] pciehp: EMI Present : no
> [ 1.254411] pciehp: Comamnd Completed : yes
> [ 1.254419] pciehp: Slot Status : 0x0000
> [ 1.254428] pciehp: Slot Control : 0x0000
> [ 1.254451] pciehp: HPC vendor_id 8086 device_id 283f ss_vid 0 ss_did 0
> [ 1.254513] pciehp: get_power_status - physical_slot = 2
> [ 1.254522] pciehp: hpc_get_power_status: SLOTCTRL 58 value read 38
> [ 1.254527] pciehp: get_attention_status - physical_slot = 2
> [ 1.254536] pciehp: hpc_get_attention_status: SLOTCTRL 58, value read 38
> [ 1.254541] pciehp: get_latch_status - physical_slot = 2
> [ 1.254550] pciehp: get_adapter_status - physical_slot = 2
> [ 1.254560] pciehp: Registering bus=2 dev=0 hp_slot=0 sun=2 slot_device_offset=0
> [ 1.254566] Pid: 1, comm: swapper Not tainted 2.6.26 #110
> [ 1.254571] [<c0544545>] pci_hp_register+0x25/0x4b0
> [ 1.254580] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
> [ 1.254590] [<c054631b>] pciehp_probe+0x12b/0x3f0
> [ 1.254598] [<c0542110>] pcie_port_probe_service+0x50/0x90
> [ 1.254606] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
> [ 1.254616] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
> [ 1.254624] [<c059f557>] driver_probe_device+0x87/0x1a0
> [ 1.254631] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
> [ 1.254641] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
> [ 1.254649] [<c059f6e9>] __driver_attach+0x79/0x80
> [ 1.254656] [<c059ee23>] bus_for_each_dev+0x53/0x80
> [ 1.254663] [<c059f3ce>] driver_attach+0x1e/0x20
> [ 1.254670] [<c059f670>] ? __driver_attach+0x0/0x80
> [ 1.254678] [<c059e7e7>] bus_add_driver+0x1b7/0x230
> [ 1.254685] [<c059f8be>] driver_register+0x6e/0x150
> [ 1.254692] [<c059f8be>] ? driver_register+0x6e/0x150
> [ 1.254700] [<c054202f>] pcie_port_service_register+0x3f/0x50
> [ 1.254709] [<c07a7b52>] pcied_init+0x16/0x83
> [ 1.254717] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
> [ 1.254725] [<c078b417>] kernel_init+0x1ad/0x2b8
> [ 1.254733] [<c04ae774>] ? sys_select+0x44/0x1a0
> [ 1.254742] [<c07a7b3c>] ? pcied_init+0x0/0x83
> [ 1.254751] [<c042337f>] ? schedule_tail+0x1f/0x50
> [ 1.254759] [<c0403e72>] ? ret_from_fork+0x6/0x1c
> [ 1.254767] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.254776] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.254784] [<c0404b9b>] kernel_thread_helper+0x7/0x10
> [ 1.254792] =======================
> [ 1.254909] hpdriver 0000:00:1c.0:pcie02: service driver hpdriver loaded
> [ 1.255694] pciehp: Hotplug Controller:
> [ 1.255700] pciehp: Seg/Bus/Dev/Func/IRQ : 0000:00:1c.1 IRQ 221
> [ 1.255704] pciehp: Vendor ID : 0x8086
> [ 1.255709] pciehp: Device ID : 0x2841
> [ 1.255712] pciehp: Subsystem ID : 0x0000
> [ 1.255716] pciehp: Subsystem Vendor ID : 0x0000
> [ 1.255720] pciehp: PCIe Cap offset : 0x40
> [ 1.255725] pciehp: PCI resource [7] : 0x1000@0x4000
> [ 1.255730] pciehp: PCI resource [8] : 0x3200000@0xdc100000
> [ 1.255735] pciehp: PCI resource [9] : 0x100000@0xdfd00000
> [ 1.255739] pciehp: Slot Capabilities : 0x0018a0e0
> [ 1.255743] pciehp: Physical Slot Number : 3
> [ 1.255747] pciehp: Attention Button : no
> [ 1.255750] pciehp: Power Controller : no
> [ 1.255754] pciehp: MRL Sensor : no
> [ 1.255758] pciehp: Attention Indicator : no
> [ 1.255762] pciehp: Power Indicator : no
> [ 1.255765] pciehp: Hot-Plug Surprise : yes
> [ 1.255769] pciehp: EMI Present : no
> [ 1.255773] pciehp: Comamnd Completed : yes
> [ 1.255781] pciehp: Slot Status : 0x0148
> [ 1.255792] pciehp: Slot Control : 0x0000
> [ 1.255817] pciehp: HPC vendor_id 8086 device_id 2841 ss_vid 0 ss_did 0
> [ 1.255884] pciehp: get_power_status - physical_slot = 3
> [ 1.255894] pciehp: hpc_get_power_status: SLOTCTRL 58 value read 38
> [ 1.255899] pciehp: get_attention_status - physical_slot = 3
> [ 1.255909] pciehp: hpc_get_attention_status: SLOTCTRL 58, value read 38
> [ 1.255914] pciehp: get_latch_status - physical_slot = 3
> [ 1.255922] pciehp: get_adapter_status - physical_slot = 3
> [ 1.255932] pciehp: Registering bus=3 dev=0 hp_slot=0 sun=3 slot_device_offset=0
> [ 1.255938] Pid: 1, comm: swapper Not tainted 2.6.26 #110
> [ 1.255943] [<c0544545>] pci_hp_register+0x25/0x4b0
> [ 1.255952] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
> [ 1.255962] [<c054631b>] pciehp_probe+0x12b/0x3f0
> [ 1.255971] [<c0542110>] pcie_port_probe_service+0x50/0x90
> [ 1.255978] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
> [ 1.255988] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
> [ 1.255996] [<c059f557>] driver_probe_device+0x87/0x1a0
> [ 1.256003] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
> [ 1.256013] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
> [ 1.256021] [<c059f6e9>] __driver_attach+0x79/0x80
> [ 1.256028] [<c059ee23>] bus_for_each_dev+0x53/0x80
> [ 1.256035] [<c059f3ce>] driver_attach+0x1e/0x20
> [ 1.256042] [<c059f670>] ? __driver_attach+0x0/0x80
> [ 1.256050] [<c059e7e7>] bus_add_driver+0x1b7/0x230
> [ 1.256057] [<c059f8be>] driver_register+0x6e/0x150
> [ 1.256064] [<c059f8be>] ? driver_register+0x6e/0x150
> [ 1.256072] [<c054202f>] pcie_port_service_register+0x3f/0x50
> [ 1.256081] [<c07a7b52>] pcied_init+0x16/0x83
> [ 1.256089] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
> [ 1.256098] [<c078b417>] kernel_init+0x1ad/0x2b8
> [ 1.256105] [<c04ae774>] ? sys_select+0x44/0x1a0
> [ 1.256114] [<c07a7b3c>] ? pcied_init+0x0/0x83
> [ 1.256122] [<c042337f>] ? schedule_tail+0x1f/0x50
> [ 1.256131] [<c0403e72>] ? ret_from_fork+0x6/0x1c
> [ 1.256139] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.256147] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.256155] [<c0404b9b>] kernel_thread_helper+0x7/0x10
> [ 1.256163] =======================
> [ 1.256279] hpdriver 0000:00:1c.1:pcie02: service driver hpdriver loaded
> [ 1.257096] pciehp: Hotplug Controller:
> [ 1.257101] pciehp: Seg/Bus/Dev/Func/IRQ : 0000:00:1c.2 IRQ 220
> [ 1.257106] pciehp: Vendor ID : 0x8086
> [ 1.257110] pciehp: Device ID : 0x2843
> [ 1.257114] pciehp: Subsystem ID : 0x0000
> [ 1.257117] pciehp: Subsystem Vendor ID : 0x0000
> [ 1.257121] pciehp: PCIe Cap offset : 0x40
> [ 1.257126] pciehp: PCI resource [7] : 0x1000@0x5000
> [ 1.257131] pciehp: PCI resource [8] : 0x2000000@0xd8000000
> [ 1.257136] pciehp: PCI resource [9] : 0x100000@0xdfa00000
> [ 1.257140] pciehp: Slot Capabilities : 0x0020a0e0
> [ 1.257144] pciehp: Physical Slot Number : 4
> [ 1.257148] pciehp: Attention Button : no
> [ 1.257152] pciehp: Power Controller : no
> [ 1.257155] pciehp: MRL Sensor : no
> [ 1.257159] pciehp: Attention Indicator : no
> [ 1.257163] pciehp: Power Indicator : no
> [ 1.257166] pciehp: Hot-Plug Surprise : yes
> [ 1.257170] pciehp: EMI Present : no
> [ 1.257173] pciehp: Comamnd Completed : yes
> [ 1.257181] pciehp: Slot Status : 0x0000
> [ 1.257189] pciehp: Slot Control : 0x0000
> [ 1.257213] pciehp: HPC vendor_id 8086 device_id 2843 ss_vid 0 ss_did 0
> [ 1.257274] pciehp: get_power_status - physical_slot = 4
> [ 1.257283] pciehp: hpc_get_power_status: SLOTCTRL 58 value read 38
> [ 1.257288] pciehp: get_attention_status - physical_slot = 4
> [ 1.257297] pciehp: hpc_get_attention_status: SLOTCTRL 58, value read 38
> [ 1.257302] pciehp: get_latch_status - physical_slot = 4
> [ 1.257311] pciehp: get_adapter_status - physical_slot = 4
> [ 1.257320] pciehp: Registering bus=4 dev=0 hp_slot=0 sun=4 slot_device_offset=0
> [ 1.257326] Pid: 1, comm: swapper Not tainted 2.6.26 #110
> [ 1.257332] [<c0544545>] pci_hp_register+0x25/0x4b0
> [ 1.257341] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
> [ 1.257351] [<c054631b>] pciehp_probe+0x12b/0x3f0
> [ 1.257360] [<c0542110>] pcie_port_probe_service+0x50/0x90
> [ 1.257367] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
> [ 1.257377] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
> [ 1.257385] [<c059f557>] driver_probe_device+0x87/0x1a0
> [ 1.257392] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
> [ 1.257401] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
> [ 1.257409] [<c059f6e9>] __driver_attach+0x79/0x80
> [ 1.257417] [<c059ee23>] bus_for_each_dev+0x53/0x80
> [ 1.257424] [<c059f3ce>] driver_attach+0x1e/0x20
> [ 1.257430] [<c059f670>] ? __driver_attach+0x0/0x80
> [ 1.257438] [<c059e7e7>] bus_add_driver+0x1b7/0x230
> [ 1.257445] [<c059f8be>] driver_register+0x6e/0x150
> [ 1.257452] [<c059f8be>] ? driver_register+0x6e/0x150
> [ 1.257460] [<c054202f>] pcie_port_service_register+0x3f/0x50
> [ 1.257469] [<c07a7b52>] pcied_init+0x16/0x83
> [ 1.257477] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
> [ 1.257485] [<c078b417>] kernel_init+0x1ad/0x2b8
> [ 1.257493] [<c04ae774>] ? sys_select+0x44/0x1a0
> [ 1.257502] [<c07a7b3c>] ? pcied_init+0x0/0x83
> [ 1.257511] [<c042337f>] ? schedule_tail+0x1f/0x50
> [ 1.257519] [<c0403e72>] ? ret_from_fork+0x6/0x1c
> [ 1.257527] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.257535] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.257543] [<c0404b9b>] kernel_thread_helper+0x7/0x10
> [ 1.257551] =======================
> [ 1.257666] hpdriver 0000:00:1c.2:pcie02: service driver hpdriver loaded
> [ 1.258450] pciehp: Hotplug Controller:
> [ 1.258455] pciehp: Seg/Bus/Dev/Func/IRQ : 0000:00:1c.3 IRQ 219
> [ 1.258460] pciehp: Vendor ID : 0x8086
> [ 1.258464] pciehp: Device ID : 0x2845
> [ 1.258468] pciehp: Subsystem ID : 0x0000
> [ 1.258472] pciehp: Subsystem Vendor ID : 0x0000
> [ 1.258476] pciehp: PCIe Cap offset : 0x40
> [ 1.258480] pciehp: PCI resource [7] : 0x1000@0x6000
> [ 1.258485] pciehp: PCI resource [8] : 0x2000000@0xd0000000
> [ 1.258490] pciehp: PCI resource [9] : 0x100000@0xdf700000
> [ 1.258495] pciehp: Slot Capabilities : 0x0028a0e0
> [ 1.258499] pciehp: Physical Slot Number : 5
> [ 1.258502] pciehp: Attention Button : no
> [ 1.258507] pciehp: Power Controller : no
> [ 1.258510] pciehp: MRL Sensor : no
> [ 1.258514] pciehp: Attention Indicator : no
> [ 1.258517] pciehp: Power Indicator : no
> [ 1.258521] pciehp: Hot-Plug Surprise : yes
> [ 1.258525] pciehp: EMI Present : no
> [ 1.258528] pciehp: Comamnd Completed : yes
> [ 1.258536] pciehp: Slot Status : 0x0000
> [ 1.258544] pciehp: Slot Control : 0x0028
> [ 1.258568] pciehp: HPC vendor_id 8086 device_id 2845 ss_vid 0 ss_did 0
> [ 1.258628] pciehp: get_power_status - physical_slot = 5
> [ 1.258638] pciehp: hpc_get_power_status: SLOTCTRL 58 value read 38
> [ 1.258643] pciehp: get_attention_status - physical_slot = 5
> [ 1.258652] pciehp: hpc_get_attention_status: SLOTCTRL 58, value read 38
> [ 1.258657] pciehp: get_latch_status - physical_slot = 5
> [ 1.258665] pciehp: get_adapter_status - physical_slot = 5
> [ 1.258675] pciehp: Registering bus=5 dev=0 hp_slot=0 sun=5 slot_device_offset=0
> [ 1.258681] Pid: 1, comm: swapper Not tainted 2.6.26 #110
> [ 1.258686] [<c0544545>] pci_hp_register+0x25/0x4b0
> [ 1.258696] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
> [ 1.258705] [<c054631b>] pciehp_probe+0x12b/0x3f0
> [ 1.258713] [<c0542110>] pcie_port_probe_service+0x50/0x90
> [ 1.258721] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
> [ 1.258730] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
> [ 1.258739] [<c059f557>] driver_probe_device+0x87/0x1a0
> [ 1.258746] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
> [ 1.258756] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
> [ 1.258764] [<c059f6e9>] __driver_attach+0x79/0x80
> [ 1.258772] [<c059ee23>] bus_for_each_dev+0x53/0x80
> [ 1.258778] [<c059f3ce>] driver_attach+0x1e/0x20
> [ 1.258785] [<c059f670>] ? __driver_attach+0x0/0x80
> [ 1.258793] [<c059e7e7>] bus_add_driver+0x1b7/0x230
> [ 1.258801] [<c059f8be>] driver_register+0x6e/0x150
> [ 1.258808] [<c059f8be>] ? driver_register+0x6e/0x150
> [ 1.258816] [<c054202f>] pcie_port_service_register+0x3f/0x50
> [ 1.258824] [<c07a7b52>] pcied_init+0x16/0x83
> [ 1.258832] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
> [ 1.258841] [<c078b417>] kernel_init+0x1ad/0x2b8
> [ 1.258849] [<c04ae774>] ? sys_select+0x44/0x1a0
> [ 1.258857] [<c07a7b3c>] ? pcied_init+0x0/0x83
> [ 1.258866] [<c042337f>] ? schedule_tail+0x1f/0x50
> [ 1.258874] [<c0403e72>] ? ret_from_fork+0x6/0x1c
> [ 1.258883] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.258891] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.258899] [<c0404b9b>] kernel_thread_helper+0x7/0x10
> [ 1.258907] =======================
> [ 1.259022] hpdriver 0000:00:1c.3:pcie02: service driver hpdriver loaded
> [ 1.259814] pciehp: Hotplug Controller:
> [ 1.259820] pciehp: Seg/Bus/Dev/Func/IRQ : 0000:00:1c.4 IRQ 218
> [ 1.259825] pciehp: Vendor ID : 0x8086
> [ 1.259829] pciehp: Device ID : 0x2847
> [ 1.259833] pciehp: Subsystem ID : 0x0000
> [ 1.259836] pciehp: Subsystem Vendor ID : 0x0000
> [ 1.259840] pciehp: PCIe Cap offset : 0x40
> [ 1.259845] pciehp: PCI resource [7] : 0x1000@0x7000
> [ 1.259850] pciehp: PCI resource [8] : 0x2000000@0xcc000000
> [ 1.259855] pciehp: PCI resource [9] : 0x100000@0xdf400000
> [ 1.259859] pciehp: Slot Capabilities : 0x0010a0e0
> [ 1.259863] pciehp: Physical Slot Number : 2
> [ 1.259867] pciehp: Attention Button : no
> [ 1.259871] pciehp: Power Controller : no
> [ 1.259875] pciehp: MRL Sensor : no
> [ 1.259879] pciehp: Attention Indicator : no
> [ 1.259883] pciehp: Power Indicator : no
> [ 1.259886] pciehp: Hot-Plug Surprise : yes
> [ 1.259890] pciehp: EMI Present : no
> [ 1.259893] pciehp: Comamnd Completed : yes
> [ 1.259901] pciehp: Slot Status : 0x0000
> [ 1.259910] pciehp: Slot Control : 0x0000
> [ 1.259933] pciehp: HPC vendor_id 8086 device_id 2847 ss_vid 0 ss_did 0
> [ 1.259994] pciehp: get_power_status - physical_slot = 2
> [ 1.260003] pciehp: hpc_get_power_status: SLOTCTRL 58 value read 38
> [ 1.260008] pciehp: get_attention_status - physical_slot = 2
> [ 1.260017] pciehp: hpc_get_attention_status: SLOTCTRL 58, value read 38
> [ 1.260022] pciehp: get_latch_status - physical_slot = 2
> [ 1.260031] pciehp: get_adapter_status - physical_slot = 2
> [ 1.260041] pciehp: Registering bus=d dev=0 hp_slot=0 sun=2 slot_device_offset=0
> [ 1.260047] Pid: 1, comm: swapper Not tainted 2.6.26 #110
> [ 1.260052] [<c0544545>] pci_hp_register+0x25/0x4b0
> [ 1.260061] [<c0545e3e>] ? get_adapter_status+0x2e/0x70
> [ 1.260071] [<c054631b>] pciehp_probe+0x12b/0x3f0
> [ 1.260079] [<c0542110>] pcie_port_probe_service+0x50/0x90
> [ 1.260087] [<c04e9b67>] ? sysfs_create_link+0x17/0x20
> [ 1.260096] [<c059f42d>] ? driver_sysfs_add+0x5d/0x90
> [ 1.260104] [<c059f557>] driver_probe_device+0x87/0x1a0
> [ 1.260111] [<c066f841>] ? _spin_lock_irqsave+0x21/0x40
> [ 1.260121] [<c066fb66>] ? _spin_unlock_irqrestore+0x16/0x40
> [ 1.260129] [<c059f6e9>] __driver_attach+0x79/0x80
> [ 1.260137] [<c059ee23>] bus_for_each_dev+0x53/0x80
> [ 1.260144] [<c059f3ce>] driver_attach+0x1e/0x20
> [ 1.260151] [<c059f670>] ? __driver_attach+0x0/0x80
> [ 1.260159] [<c059e7e7>] bus_add_driver+0x1b7/0x230
> [ 1.260166] [<c059f8be>] driver_register+0x6e/0x150
> [ 1.260174] [<c059f8be>] ? driver_register+0x6e/0x150
> [ 1.260182] [<c054202f>] pcie_port_service_register+0x3f/0x50
> [ 1.260191] [<c07a7b52>] pcied_init+0x16/0x83
> [ 1.260199] [<c07a7b38>] ? pci_hotplug_init+0x1f/0x23
> [ 1.260208] [<c078b417>] kernel_init+0x1ad/0x2b8
> [ 1.260216] [<c04ae774>] ? sys_select+0x44/0x1a0
> [ 1.260225] [<c07a7b3c>] ? pcied_init+0x0/0x83
> [ 1.260234] [<c042337f>] ? schedule_tail+0x1f/0x50
> [ 1.260242] [<c0403e72>] ? ret_from_fork+0x6/0x1c
> [ 1.260250] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.260258] [<c078b26a>] ? kernel_init+0x0/0x2b8
> [ 1.260266] [<c0404b9b>] kernel_thread_helper+0x7/0x10
> [ 1.260274] =======================
> [ 1.260278] pciehp: pci_hp_register failed with error -17
> [ 1.260412] pciehp: Failed to register slot because of name collision. Try 'pciehp_slot_with_bus' module option.
> [ 1.260547] pciehp: pciehp: slot initialization failed
> [ 1.260817] pciehp: pcie_port_service_register = 0
> [ 1.260822] pciehp: PCI Express Hot Plug Controller Driver version: 0.4
>
>
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-25 3:29 ` Matthew Wilcox
2008-07-25 4:42 ` Alex Chiang
@ 2008-07-25 4:57 ` Kenji Kaneshige
2008-07-30 2:38 ` Alex Chiang
2008-07-25 8:53 ` Kenji Kaneshige
2 siblings, 1 reply; 37+ messages in thread
From: Kenji Kaneshige @ 2008-07-25 4:57 UTC (permalink / raw)
To: Matthew Wilcox; +Cc: Pierre Ossman, Alex Chiang, Jesse Barnes, LKML, linux-pci
Matthew Wilcox wrote:
> On Fri, Jul 25, 2008 at 01:29:16AM +0200, Pierre Ossman wrote:
>> On Thu, 24 Jul 2008 17:08:27 -0600
>> Alex Chiang <achiang@hp.com> wrote:
>>
>>> Sorry for one more round-trip, but could you turn on debugging
>>> for pciehp as well?
>>>
>> Same thing, with debugging:
>
> I have a laptop with a similar problem (though I don't have pciehp
> enabled, so I didn't notice it). Obviously, we need to fix this.
>
> There is no question in my mind that firmware has programmed the slot
> numbers incorrectly. Here's the evidence from lspci -vvv:
>
> 00:1c.0 PCI bridge: Intel Corporation 82801H (ICH8 Family) PCI Express Port 1 (rev 03)
> Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
> SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+
> Slot # 2, PowerLimit 6.500000; Interlock- NoCompl-
> 00:1c.4 PCI bridge: Intel Corporation 82801H (ICH8 Family) PCI Express Port 5 (rev 03)
> Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
> SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+
> Slot # 2, PowerLimit 6.500000; Interlock- NoCompl-
>
> I don't think anyone can credibly argue that this is correct. They're
> both PCIe devices, they're both both indicating that they have a slot
> (maybe if I get my screwdriver out, I can see if there's really a slot
> ...), they're on the same bus (so I don't know how the with_bus
> parameter makes any difference).
>
> I've always hated that with_bus parameter. I don't like it being a
> parameter and I don't like the names it produces.
>
> Part of the problem is the kobject API. It really hates you trying to
> register a duplicate name and won't just return -EEXIST and let you try
> a new name. Instead it prints an ugly warning and dumps stack. See
> kobject_add_internal() in lib/kobject.c.
>
I'm thinking the same idea.
(I just sent that before reading this mail)
> So we need a way to find if there's already a slot of this name. I
> don't see a kobject routine to do that. Maybe we can do it internally
> to the pci slot code.
>
> Then we need to pick a new name for the kobject if it does collide.
> My suggestion is that the second time we find an object named "2", we
> call it "2dup1" (the third time "2dup2", etc.) Other opinions I've
> seen include "2a", "2b", ... or "2-1", "2-2", ... or "2-brokenfw1",
> "2-brokenfw2".
>
That looks quite better than using bus number.
Thanks,
Kenji Kaneshige
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-25 4:42 ` Alex Chiang
@ 2008-07-25 5:38 ` Kenji Kaneshige
2008-07-25 11:18 ` Matthew Wilcox
2008-07-28 18:05 ` Greg KH
1 sibling, 1 reply; 37+ messages in thread
From: Kenji Kaneshige @ 2008-07-25 5:38 UTC (permalink / raw)
To: Alex Chiang, Matthew Wilcox, Pierre Ossman, Jesse Barnes,
Kenji Kaneshige, LKML, linux-pci
Alex Chiang wrote:
> * Matthew Wilcox <matthew@wil.cx>:
>> On Fri, Jul 25, 2008 at 01:29:16AM +0200, Pierre Ossman wrote:
>>> On Thu, 24 Jul 2008 17:08:27 -0600
>>> Alex Chiang <achiang@hp.com> wrote:
>>>
>>>> Sorry for one more round-trip, but could you turn on debugging
>>>> for pciehp as well?
>>>>
>>> Same thing, with debugging:
>> I have a laptop with a similar problem (though I don't have pciehp
>> enabled, so I didn't notice it). Obviously, we need to fix this.
>>
>> There is no question in my mind that firmware has programmed the slot
>> numbers incorrectly. Here's the evidence from lspci -vvv:
>>
>> 00:1c.0 PCI bridge: Intel Corporation 82801H (ICH8 Family) PCI Express Port 1 (rev 03)
>> Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
>> SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+
>> Slot # 2, PowerLimit 6.500000; Interlock- NoCompl-
>> 00:1c.4 PCI bridge: Intel Corporation 82801H (ICH8 Family) PCI Express Port 5 (rev 03)
>> Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
>> SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+
>> Slot # 2, PowerLimit 6.500000; Interlock- NoCompl-
>>
>> I don't think anyone can credibly argue that this is correct. They're
>> both PCIe devices, they're both both indicating that they have a slot
>> (maybe if I get my screwdriver out, I can see if there's really a slot
>> ...), they're on the same bus (so I don't know how the with_bus
>> parameter makes any difference).
>>
>> I've always hated that with_bus parameter. I don't like it being a
>> parameter and I don't like the names it produces.
>>
>> Part of the problem is the kobject API. It really hates you trying to
>> register a duplicate name and won't just return -EEXIST and let you try
>> a new name. Instead it prints an ugly warning and dumps stack. See
>> kobject_add_internal() in lib/kobject.c.
>
> Yeah, I don't really like that part of the kobject API either.
>
>> So we need a way to find if there's already a slot of this name. I
>> don't see a kobject routine to do that. Maybe we can do it internally
>> to the pci slot code.
>
> Well, we have this code in pci_hp_register:
>
> /* Check if we have already registered a slot with the same name. */
> if (get_slot_from_name(slot->name))
> return -EEXIST;
>
>> Then we need to pick a new name for the kobject if it does collide.
>> My suggestion is that the second time we find an object named "2", we
>> call it "2dup1" (the third time "2dup2", etc.) Other opinions I've
>> seen include "2a", "2b", ... or "2-1", "2-2", ... or "2-brokenfw1",
>> "2-brokenfw2".
>>
>> I'm at OLS this week, so no patch from me.
>
> It should be pretty easy for pci_hp_register() to fix up the name
> in the event of a collision.
>
> The hard part is figuring out a convention that we can all agree
> on. ;) I've no strong feelings here, but of the options
> presented, I lean towards "2a", "2b" or "2-1", "2-2".
>
Only my hope is I don't want to look "2a" or "2-1" on normal platform.
It should be "2" on normal platform.
I'd like to try to make a patch, but it will be middle of next week
because of other jobs. Is that ok?
Thanks,
Kenji Kaneshige
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-25 3:29 ` Matthew Wilcox
2008-07-25 4:42 ` Alex Chiang
2008-07-25 4:57 ` Kenji Kaneshige
@ 2008-07-25 8:53 ` Kenji Kaneshige
2008-07-25 11:40 ` Matthew Wilcox
2 siblings, 1 reply; 37+ messages in thread
From: Kenji Kaneshige @ 2008-07-25 8:53 UTC (permalink / raw)
To: Matthew Wilcox; +Cc: Pierre Ossman, Alex Chiang, Jesse Barnes, LKML, linux-pci
Matthew Wilcox wrote:
> On Fri, Jul 25, 2008 at 01:29:16AM +0200, Pierre Ossman wrote:
>> On Thu, 24 Jul 2008 17:08:27 -0600
>> Alex Chiang <achiang@hp.com> wrote:
>>
>>> Sorry for one more round-trip, but could you turn on debugging
>>> for pciehp as well?
>>>
>> Same thing, with debugging:
>
> I have a laptop with a similar problem (though I don't have pciehp
> enabled, so I didn't notice it). Obviously, we need to fix this.
>
> There is no question in my mind that firmware has programmed the slot
> numbers incorrectly. Here's the evidence from lspci -vvv:
>
> 00:1c.0 PCI bridge: Intel Corporation 82801H (ICH8 Family) PCI Express Port 1 (rev 03)
> Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
> SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+
> Slot # 2, PowerLimit 6.500000; Interlock- NoCompl-
> 00:1c.4 PCI bridge: Intel Corporation 82801H (ICH8 Family) PCI Express Port 5 (rev 03)
> Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
> SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+
> Slot # 2, PowerLimit 6.500000; Interlock- NoCompl-
>
> I don't think anyone can credibly argue that this is correct. They're
> both PCIe devices, they're both both indicating that they have a slot
> (maybe if I get my screwdriver out, I can see if there's really a slot
> ...), they're on the same bus (so I don't know how the with_bus
> parameter makes any difference).
>
FYI:
IIRC, pciehp uses bridge's secondary bus number for slot name, and
PCI express downstream port can have only one hotplug slot. I think
this is why with_bus prameter makes difference. But it doesn't work
on the system that has multiple pci segments. In addition, shpchp
also has with_bus option, but it doesn't work because shpc controller
can have multiple slots on the bridge's secondary bus. Anyway, as
you mentioned, using bus number for slot name is obviously not good
idea, and your idea (e.g. "2-1", "2-2") looks much better.
Thanks,
Kenji Kaneshige
> I've always hated that with_bus parameter. I don't like it being a
> parameter and I don't like the names it produces.
>
> Part of the problem is the kobject API. It really hates you trying to
> register a duplicate name and won't just return -EEXIST and let you try
> a new name. Instead it prints an ugly warning and dumps stack. See
> kobject_add_internal() in lib/kobject.c.
>
> So we need a way to find if there's already a slot of this name. I
> don't see a kobject routine to do that. Maybe we can do it internally
> to the pci slot code.
>
> Then we need to pick a new name for the kobject if it does collide.
> My suggestion is that the second time we find an object named "2", we
> call it "2dup1" (the third time "2dup2", etc.) Other opinions I've
> seen include "2a", "2b", ... or "2-1", "2-2", ... or "2-brokenfw1",
> "2-brokenfw2".
>
> I'm at OLS this week, so no patch from me.
>
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-25 5:38 ` Kenji Kaneshige
@ 2008-07-25 11:18 ` Matthew Wilcox
0 siblings, 0 replies; 37+ messages in thread
From: Matthew Wilcox @ 2008-07-25 11:18 UTC (permalink / raw)
To: Kenji Kaneshige; +Cc: Alex Chiang, Pierre Ossman, Jesse Barnes, LKML, linux-pci
On Fri, Jul 25, 2008 at 02:38:38PM +0900, Kenji Kaneshige wrote:
> >The hard part is figuring out a convention that we can all agree
> >on. ;) I've no strong feelings here, but of the options
> >presented, I lean towards "2a", "2b" or "2-1", "2-2".
> >
>
> Only my hope is I don't want to look "2a" or "2-1" on normal platform.
> It should be "2" on normal platform.
Yes, the first slot will be "2", the second slot "2a" or "2-1" or
whatever we decide. I don't have a strong feeling about the name.
--
Intel are signing my paycheques ... these opinions are still mine
"Bill, look, we understand that you're interested in selling us this
operating system, but compare it to ours. We can't possibly take such
a retrograde step."
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-25 8:53 ` Kenji Kaneshige
@ 2008-07-25 11:40 ` Matthew Wilcox
2008-07-28 7:21 ` Kenji Kaneshige
0 siblings, 1 reply; 37+ messages in thread
From: Matthew Wilcox @ 2008-07-25 11:40 UTC (permalink / raw)
To: Kenji Kaneshige; +Cc: Pierre Ossman, Alex Chiang, Jesse Barnes, LKML, linux-pci
On Fri, Jul 25, 2008 at 05:53:33PM +0900, Kenji Kaneshige wrote:
> IIRC, pciehp uses bridge's secondary bus number for slot name, and
> PCI express downstream port can have only one hotplug slot. I think
> this is why with_bus prameter makes difference.
Ahh, I overlooked that last night.
> But it doesn't work on the system that has multiple pci segments.
Yes, we still have the problem that pciehp does not include the 'chassis
number' as part of the name. I no longer have easy access to any
systems with multiple chassis. Do your systems have devices which
implement the PCI_CAP_ID_SLOTID capcbility? (as root) lspci -vvv will
report it:
printf("Slot ID: %d slots, First%c, chassis %02x\n",
esr & PCI_SID_ESR_NSLOTS,
FLAG(esr, PCI_SID_ESR_FIC),
chs);
> In addition, shpchp
> also has with_bus option, but it doesn't work because shpc controller
> can have multiple slots on the bridge's secondary bus. Anyway, as
> you mentioned, using bus number for slot name is obviously not good
> idea, and your idea (e.g. "2-1", "2-2") looks much better.
Thanks!
--
Intel are signing my paycheques ... these opinions are still mine
"Bill, look, we understand that you're interested in selling us this
operating system, but compare it to ours. We can't possibly take such
a retrograde step."
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-25 4:50 ` Kenji Kaneshige
@ 2008-07-25 22:18 ` Jesse Barnes
2008-07-26 1:16 ` Matthew Wilcox
2008-07-28 8:44 ` Kenji Kaneshige
0 siblings, 2 replies; 37+ messages in thread
From: Jesse Barnes @ 2008-07-25 22:18 UTC (permalink / raw)
To: Kenji Kaneshige
Cc: Pierre Ossman, Alex Chiang, LKML, linux-pci, Kristen Accardi
[-- Attachment #1: Type: text/plain, Size: 3589 bytes --]
On Thursday, July 24, 2008 9:50 pm Kenji Kaneshige wrote:
> Thank you for debug info, Pierre.
>
> According to the debugging output, five slots are detected (five
> slots on laptop!?) and two of them have the same physical slots
> number '2'. This is the reason why Pierre's machine needs
> 'pciehp_slot_with_bus' option.
>
> Before 2.6.26 (from 2.6.xx), pciehp did the workaround for the
> problem (some platform wrongly assign the same physical slot
> number to multiple slots) by default. But this was not a good
> idea because of the several reasons like follows:
>
> - Slot name should be a physical identifier of physical slot
> on the system. Using bus number as a part of slot name is
> not a idea because bus number is logical number and it can
> be changed.
>
> - As Jesse explained, some hotplug slot can be handled through
> several type of controllers. For example, some hotplug slot
> can be handled by either acpiphp or pciehp. But those drivers
> must not handle the same slot at the same time. The pci
> hotplug core is checking this by checking duplicate names.
> This check didn't work because pciehp had started using bus
> number as a part of slot name and slot names became different
> between acpiphp and pciehp.
>
> About the former, I'm ok with using bus number as a part of slot
> name on the problematic platform. But it should not be used on
> the normal platform.
>
> About the latter, IIRC, thanks to Alex's pci slot framework from
> 2.6.26, pci hotplug core can check if multiple drivers attempts
> to handle the same slot even if those drivers uses the different
> names.
>
> Based on my thought above, I have a following idea to remove
> "pciehp_slot_with_bus".
>
> - Try to use physical slot number as a slot name, first.
>
> - If pci_hp_register() success, no problem.
>
> - If pci_hp_register() returns -EBUSY, that means another
> hotplug driver already handling the slot. So return as error.
>
> - If pci_hp_register() returns -EEXIST, that means there is a
> existing slot with the same name. In this case, retry to
> register slots with logical name (bus number + physical slot
> number, or other).
>
> With this idea, slots names will become as follows on Pierre's
> machine.
>
> <Before 2.6.26>
> 0001_0001, 0002_0002, 0003_0003, 0004_0004, 0005_0005, 000d_0002
>
> <Current>
> 1, 2, 3, 4, 5
>
> <With my idea>
> 1, 2, 3, 4, 5, 000d_0002
>
>
> Please give me comments.
I think that's fine (automatically creating duplicate devices with names to
differentiate them), but I think we should also try harder to avoid adding
duplicates.
In Pierre's case, and on my T61, there's only one actual hotplug slot
available, but the firmware creates duplicate physical slot numbers and sets
the HP_CAP bit on everything, both of which are obviously wrong (well I
suppose you could pop these chips off the board, but it's not very
practical). However, afaict that "other" OS uses the _RMV method to
determine whether a given slot is actually hot pluggable. On my T61 at
least, this seems to be accurate: only one of my EXP* objects has a _RMV
method.
So maybe the PCIe hotplug driver should be checking for that method when ACPI
is available? We already try to use _OSC etc., so checking for _RMV first
would make sense...
I tried and failed to do this (naive patch attached), I think somehow I've got
to traverse child devices too... (and of course add the appropriate #ifdef
ACPI etc stuff).
Kenji-san and Alex, maybe you can take a look and clue me in?
Thanks,
Jesse
[-- Attachment #2: pciehp-detect-fixes.patch --]
[-- Type: text/x-diff, Size: 3971 bytes --]
diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h
index e3a1e7e..6ab29d8 100644
--- a/drivers/pci/hotplug/pciehp.h
+++ b/drivers/pci/hotplug/pciehp.h
@@ -136,6 +136,7 @@ struct controller {
#define ATTN_LED_PRSN 0x00000008
#define PWR_LED_PRSN 0x00000010
#define HP_SUPR_RM_SUP 0x00000020
+#define HP_CAP_SUP 0x00000040
#define EMI_PRSN 0x00020000
#define NO_CMD_CMPL_SUP 0x00040000
@@ -145,6 +146,7 @@ struct controller {
#define ATTN_LED(ctrl) ((ctrl)->slot_cap & ATTN_LED_PRSN)
#define PWR_LED(ctrl) ((ctrl)->slot_cap & PWR_LED_PRSN)
#define HP_SUPR_RM(ctrl) ((ctrl)->slot_cap & HP_SUPR_RM_SUP)
+#define HP_CAP(ctrl) ((ctrl)->slot_cap & HP_CAP_SUP)
#define EMI(ctrl) ((ctrl)->slot_cap & EMI_PRSN)
#define NO_CMD_CMPL(ctrl) ((ctrl)->slot_cap & NO_CMD_CMPL_SUP)
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
index 3677495..896ca5f 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -386,6 +386,17 @@ static int get_cur_bus_speed(struct hotplug_slot *hotplug_slot, enum pci_bus_spe
return 0;
}
+static bool acpi_rmv_present(struct pci_dev *pdev)
+{
+ struct acpi_device *acpi_dev = to_acpi_device(&pdev->dev);
+
+ if (acpi_dev && acpi_dev->flags.removable)
+ return true;
+
+ dbg("%s: no ACPI device (%p) or not removable\n", pci_name(pdev), acpi_dev);
+ return false;
+}
+
static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_id *id)
{
int rc;
@@ -397,8 +408,15 @@ static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_
if (pciehp_force)
dbg("Bypassing BIOS check for pciehp use on %s\n",
pci_name(pdev));
- else if (pciehp_get_hp_hw_control_from_firmware(pdev))
- goto err_out_none;
+ else {
+ if (!acpi_rmv_present(pdev))
+ goto err_out_none;
+ if (pciehp_get_hp_hw_control_from_firmware(pdev)) {
+ dbg("Failed to get control from firmware for %s\n",
+ pci_name(pdev));
+ goto err_out_none;
+ }
+ }
ctrl = pcie_init(dev);
if (!ctrl) {
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 1323a43..445b0b1 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -149,7 +149,7 @@ static inline int pciehp_writel(struct controller *ctrl, int reg, u32 value)
#define ATTN_LED_PRSN 0x00000008
#define PWR_LED_PRSN 0x00000010
#define HP_SUPR_RM_SUP 0x00000020
-#define HP_CAP 0x00000040
+#define HP_CAP_SUP 0x00000040
#define SLOT_PWR_VALUE 0x000003F8
#define SLOT_PWR_LIMIT 0x00000C00
#define PSN 0xFFF80000 /* PSN: Physical Slot Number */
@@ -1102,6 +1102,7 @@ static inline void dbg_ctrl(struct controller *ctrl)
dbg(" Attention Indicator : %3s\n", ATTN_LED(ctrl) ? "yes" : "no");
dbg(" Power Indicator : %3s\n", PWR_LED(ctrl) ? "yes" : "no");
dbg(" Hot-Plug Surprise : %3s\n", HP_SUPR_RM(ctrl) ? "yes" : "no");
+ dbg(" Hot-Plug Capable : %3s\n", HP_CAP(ctrl) ? "yes" : "no");
dbg(" EMI Present : %3s\n", EMI(ctrl) ? "yes" : "no");
dbg(" Comamnd Completed : %3s\n", NO_CMD_CMPL(ctrl)? "no" : "yes");
pciehp_readw(ctrl, SLOTSTATUS, ®16);
@@ -1127,18 +1128,25 @@ struct controller *pcie_init(struct pcie_device *dev)
ctrl->cap_base = pci_find_capability(pdev, PCI_CAP_ID_EXP);
if (!ctrl->cap_base) {
err("%s: Cannot find PCI Express capability\n", __func__);
- goto abort;
+ goto abort_ctrl;
}
if (pciehp_readl(ctrl, SLOTCAP, &slot_cap)) {
err("%s: Cannot read SLOTCAP register\n", __func__);
- goto abort;
+ goto abort_ctrl;
}
+
ctrl->slot_cap = slot_cap;
ctrl->first_slot = slot_cap >> 19;
ctrl->slot_device_offset = 0;
ctrl->num_slots = 1;
ctrl->hpc_ops = &pciehp_hpc_ops;
+
+ if (!HP_CAP(ctrl)) {
+ dbg("%s: not hotplug capable, skipping\n", pci_name(pdev));
+ goto abort_ctrl;
+ }
+
mutex_init(&ctrl->crit_sect);
mutex_init(&ctrl->ctrl_lock);
init_waitqueue_head(&ctrl->queue);
^ permalink raw reply related [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-25 22:18 ` Jesse Barnes
@ 2008-07-26 1:16 ` Matthew Wilcox
2008-07-28 8:58 ` Kenji Kaneshige
2008-07-28 8:44 ` Kenji Kaneshige
1 sibling, 1 reply; 37+ messages in thread
From: Matthew Wilcox @ 2008-07-26 1:16 UTC (permalink / raw)
To: Jesse Barnes
Cc: Kenji Kaneshige, Pierre Ossman, Alex Chiang, LKML, linux-pci,
Kristen Accardi
On Fri, Jul 25, 2008 at 03:18:53PM -0700, Jesse Barnes wrote:
> I think that's fine (automatically creating duplicate devices with names to
> differentiate them), but I think we should also try harder to avoid adding
> duplicates.
>
> In Pierre's case, and on my T61, there's only one actual hotplug slot
> available, but the firmware creates duplicate physical slot numbers and sets
> the HP_CAP bit on everything, both of which are obviously wrong (well I
> suppose you could pop these chips off the board, but it's not very
> practical). However, afaict that "other" OS uses the _RMV method to
> determine whether a given slot is actually hot pluggable. On my T61 at
> least, this seems to be accurate: only one of my EXP* objects has a _RMV
> method.
I think you're getting distracted from the real problem we're trying to
solve here, the reason for introducing the pci_slot driver in the first
place: we want to have information on all slots, not just hotplug ones.
So while this is growing out of the hotplug system, we need to register
all slots, even ones without _RMV.
--
Intel are signing my paycheques ... these opinions are still mine
"Bill, look, we understand that you're interested in selling us this
operating system, but compare it to ours. We can't possibly take such
a retrograde step."
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-25 11:40 ` Matthew Wilcox
@ 2008-07-28 7:21 ` Kenji Kaneshige
0 siblings, 0 replies; 37+ messages in thread
From: Kenji Kaneshige @ 2008-07-28 7:21 UTC (permalink / raw)
To: Matthew Wilcox; +Cc: Pierre Ossman, Alex Chiang, Jesse Barnes, LKML, linux-pci
Matthew Wilcox wrote:
> On Fri, Jul 25, 2008 at 05:53:33PM +0900, Kenji Kaneshige wrote:
>> IIRC, pciehp uses bridge's secondary bus number for slot name, and
>> PCI express downstream port can have only one hotplug slot. I think
>> this is why with_bus prameter makes difference.
>
> Ahh, I overlooked that last night.
>
>> But it doesn't work on the system that has multiple pci segments.
>
> Yes, we still have the problem that pciehp does not include the 'chassis
> number' as part of the name. I no longer have easy access to any
> systems with multiple chassis. Do your systems have devices which
> implement the PCI_CAP_ID_SLOTID capcbility? (as root) lspci -vvv will
> report it:
>
> printf("Slot ID: %d slots, First%c, chassis %02x\n",
> esr & PCI_SID_ESR_NSLOTS,
> FLAG(esr, PCI_SID_ESR_FIC),
> chs);
>
Unfortunately, I don't have any systems that implement the
PCI_CAP_ID_SLOTID capability...
Thanks,
Kenji Kaneshige
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-25 22:18 ` Jesse Barnes
2008-07-26 1:16 ` Matthew Wilcox
@ 2008-07-28 8:44 ` Kenji Kaneshige
2008-07-28 16:16 ` Jesse Barnes
2008-07-28 16:57 ` Matthew Wilcox
1 sibling, 2 replies; 37+ messages in thread
From: Kenji Kaneshige @ 2008-07-28 8:44 UTC (permalink / raw)
To: Jesse Barnes; +Cc: Pierre Ossman, Alex Chiang, LKML, linux-pci, Kristen Accardi
Jesse Barnes wrote:
> On Thursday, July 24, 2008 9:50 pm Kenji Kaneshige wrote:
>> Thank you for debug info, Pierre.
>>
>> According to the debugging output, five slots are detected (five
>> slots on laptop!?) and two of them have the same physical slots
>> number '2'. This is the reason why Pierre's machine needs
>> 'pciehp_slot_with_bus' option.
>>
>> Before 2.6.26 (from 2.6.xx), pciehp did the workaround for the
>> problem (some platform wrongly assign the same physical slot
>> number to multiple slots) by default. But this was not a good
>> idea because of the several reasons like follows:
>>
>> - Slot name should be a physical identifier of physical slot
>> on the system. Using bus number as a part of slot name is
>> not a idea because bus number is logical number and it can
>> be changed.
>>
>> - As Jesse explained, some hotplug slot can be handled through
>> several type of controllers. For example, some hotplug slot
>> can be handled by either acpiphp or pciehp. But those drivers
>> must not handle the same slot at the same time. The pci
>> hotplug core is checking this by checking duplicate names.
>> This check didn't work because pciehp had started using bus
>> number as a part of slot name and slot names became different
>> between acpiphp and pciehp.
>>
>> About the former, I'm ok with using bus number as a part of slot
>> name on the problematic platform. But it should not be used on
>> the normal platform.
>>
>> About the latter, IIRC, thanks to Alex's pci slot framework from
>> 2.6.26, pci hotplug core can check if multiple drivers attempts
>> to handle the same slot even if those drivers uses the different
>> names.
>>
>> Based on my thought above, I have a following idea to remove
>> "pciehp_slot_with_bus".
>>
>> - Try to use physical slot number as a slot name, first.
>>
>> - If pci_hp_register() success, no problem.
>>
>> - If pci_hp_register() returns -EBUSY, that means another
>> hotplug driver already handling the slot. So return as error.
>>
>> - If pci_hp_register() returns -EEXIST, that means there is a
>> existing slot with the same name. In this case, retry to
>> register slots with logical name (bus number + physical slot
>> number, or other).
>>
>> With this idea, slots names will become as follows on Pierre's
>> machine.
>>
>> <Before 2.6.26>
>> 0001_0001, 0002_0002, 0003_0003, 0004_0004, 0005_0005, 000d_0002
>>
>> <Current>
>> 1, 2, 3, 4, 5
>>
>> <With my idea>
>> 1, 2, 3, 4, 5, 000d_0002
>>
>>
>> Please give me comments.
>
> I think that's fine (automatically creating duplicate devices with names to
> differentiate them), but I think we should also try harder to avoid adding
> duplicates.
>
> In Pierre's case, and on my T61, there's only one actual hotplug slot
> available, but the firmware creates duplicate physical slot numbers and sets
> the HP_CAP bit on everything, both of which are obviously wrong (well I
> suppose you could pop these chips off the board, but it's not very
> practical). However, afaict that "other" OS uses the _RMV method to
> determine whether a given slot is actually hot pluggable. On my T61 at
> least, this seems to be accurate: only one of my EXP* objects has a _RMV
> method.
>
> So maybe the PCIe hotplug driver should be checking for that method when ACPI
> is available? We already try to use _OSC etc., so checking for _RMV first
> would make sense...
>
As you pointed out, the root cause might not a problem of slot naming,
but a problem of slots detection, because pciehp driver detects multiple
PCIe hotplug slots even thought your and Pierre's system seems to have
only one hotplug slot. So I think we should also consider the problem
from this view point (slot detection).
But, I think simply checking for _RMV method first is dangerous because
I think there are many systems that doesn't implement _RMV for PCIe
hotplug slots (at least, my system doesn't implement that. Anyway,
I would like to look at the documents/specifications that mention _RMV
method for determining whether a given slot is hot pluggable. Do you
have any information about that? I think PCI Local Bus, PCI Express and
PCI Firmware specification don't mention that. I think hot pluggable slots
on your, Pierre's and Matthew's system are ExpressCard slots. So I guess
ExpressCard specification might define something about this. But
unfortunately, I don't have ExpressCard specification. Can anyone access
ExpressCard spec?
Thanks,
Kenji Kaneshige
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-26 1:16 ` Matthew Wilcox
@ 2008-07-28 8:58 ` Kenji Kaneshige
0 siblings, 0 replies; 37+ messages in thread
From: Kenji Kaneshige @ 2008-07-28 8:58 UTC (permalink / raw)
To: Matthew Wilcox
Cc: Jesse Barnes, Pierre Ossman, Alex Chiang, LKML, linux-pci,
Kristen Accardi
Matthew Wilcox wrote:
> On Fri, Jul 25, 2008 at 03:18:53PM -0700, Jesse Barnes wrote:
>> I think that's fine (automatically creating duplicate devices with names to
>> differentiate them), but I think we should also try harder to avoid adding
>> duplicates.
>>
>> In Pierre's case, and on my T61, there's only one actual hotplug slot
>> available, but the firmware creates duplicate physical slot numbers and sets
>> the HP_CAP bit on everything, both of which are obviously wrong (well I
>> suppose you could pop these chips off the board, but it's not very
>> practical). However, afaict that "other" OS uses the _RMV method to
>> determine whether a given slot is actually hot pluggable. On my T61 at
>> least, this seems to be accurate: only one of my EXP* objects has a _RMV
>> method.
>
> I think you're getting distracted from the real problem we're trying to
> solve here, the reason for introducing the pci_slot driver in the first
> place: we want to have information on all slots, not just hotplug ones.
>
> So while this is growing out of the hotplug system, we need to register
> all slots, even ones without _RMV.
>
I think Jesse's idea is not for breaking pci_slot driver. I think even
with his idea pci_slot driver will detect all slots, but hotplug driver
(e.g. pciehp) will not be registered on some of those slots.
By the way, how is pci_slot driver on your system that has a problem with
pciehp? Does duplicate slot problem happen also with pci_slot driver?
Thanks,
Kenji Kaneshige
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-28 8:44 ` Kenji Kaneshige
@ 2008-07-28 16:16 ` Jesse Barnes
2008-07-29 2:43 ` Kenji Kaneshige
2008-07-28 16:57 ` Matthew Wilcox
1 sibling, 1 reply; 37+ messages in thread
From: Jesse Barnes @ 2008-07-28 16:16 UTC (permalink / raw)
To: Kenji Kaneshige
Cc: Pierre Ossman, Alex Chiang, LKML, linux-pci, Kristen Accardi
On Monday, July 28, 2008 1:44 am Kenji Kaneshige wrote:
> Jesse Barnes wrote:
> > I think that's fine (automatically creating duplicate devices with names
> > to differentiate them), but I think we should also try harder to avoid
> > adding duplicates.
> >
> > In Pierre's case, and on my T61, there's only one actual hotplug slot
> > available, but the firmware creates duplicate physical slot numbers and
> > sets the HP_CAP bit on everything, both of which are obviously wrong
> > (well I suppose you could pop these chips off the board, but it's not
> > very practical). However, afaict that "other" OS uses the _RMV method to
> > determine whether a given slot is actually hot pluggable. On my T61 at
> > least, this seems to be accurate: only one of my EXP* objects has a _RMV
> > method.
> >
> > So maybe the PCIe hotplug driver should be checking for that method when
> > ACPI is available? We already try to use _OSC etc., so checking for _RMV
> > first would make sense...
>
> As you pointed out, the root cause might not a problem of slot naming,
> but a problem of slots detection, because pciehp driver detects multiple
> PCIe hotplug slots even thought your and Pierre's system seems to have
> only one hotplug slot. So I think we should also consider the problem
> from this view point (slot detection).
>
> But, I think simply checking for _RMV method first is dangerous because
> I think there are many systems that doesn't implement _RMV for PCIe
> hotplug slots (at least, my system doesn't implement that. Anyway,
> I would like to look at the documents/specifications that mention _RMV
> method for determining whether a given slot is hot pluggable. Do you
> have any information about that? I think PCI Local Bus, PCI Express and
> PCI Firmware specification don't mention that. I think hot pluggable slots
> on your, Pierre's and Matthew's system are ExpressCard slots. So I guess
> ExpressCard specification might define something about this. But
> unfortunately, I don't have ExpressCard specification. Can anyone access
> ExpressCard spec?
Your systems don't have _RMV methods for the hotpluggable PCIe slots in the
DSDT? That's a shame; the Windows docs I found on PCIe hotplug seemed to
indicate that _RMV and _OSC (under Vista) were used to detect whether a given
slot was hot pluggable (I just googled for "windows pcie hotplug" or
something) so I was hoping that would be a reliable method... Any other
ideas? I'll go see if I can dig up some ExpressCard info.
Thanks,
Jesse
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-28 8:44 ` Kenji Kaneshige
2008-07-28 16:16 ` Jesse Barnes
@ 2008-07-28 16:57 ` Matthew Wilcox
1 sibling, 0 replies; 37+ messages in thread
From: Matthew Wilcox @ 2008-07-28 16:57 UTC (permalink / raw)
To: Kenji Kaneshige
Cc: Jesse Barnes, Pierre Ossman, Alex Chiang, LKML, linux-pci,
Kristen Accardi
On Mon, Jul 28, 2008 at 05:44:28PM +0900, Kenji Kaneshige wrote:
> But, I think simply checking for _RMV method first is dangerous because
> I think there are many systems that doesn't implement _RMV for PCIe
> hotplug slots (at least, my system doesn't implement that. Anyway,
> I would like to look at the documents/specifications that mention _RMV
> method for determining whether a given slot is hot pluggable. Do you
> have any information about that? I think PCI Local Bus, PCI Express and
> PCI Firmware specification don't mention that. I think hot pluggable slots
> on your, Pierre's and Matthew's system are ExpressCard slots. So I guess
> ExpressCard specification might define something about this. But
> unfortunately, I don't have ExpressCard specification. Can anyone access
> ExpressCard spec?
My only externally visible slot is CardBus, not ExpressCard. It's this
laptop:
http://store.shopfujitsu.com/ca/EcomCA/buildseriesbean.do?series=P8010
full lspci:
00:00.0 Host bridge: Intel Corporation Mobile PM965/GM965/GL960 Memory Controller Hub (rev 03)
Subsystem: Fujitsu Limited. Device 13f2
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx-
Latency: 0
Capabilities: [e0] Vendor Specific Information <?>
Kernel driver in use: agpgart-intel
00:02.0 VGA compatible controller: Intel Corporation Mobile GM965/GL960 Integrated Graphics Controller (rev 03)
Subsystem: Fujitsu Limited. Device 13fe
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 16
Region 0: Memory at fc000000 (64-bit, non-prefetchable) [size=1M]
Region 2: Memory at e0000000 (64-bit, prefetchable) [size=256M]
Region 4: I/O ports at 1800 [size=8]
Capabilities: [90] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable-
Address: 00000000 Data: 0000
Capabilities: [d0] Power Management version 3
Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Bridge: PM- B3+
00:02.1 Display controller: Intel Corporation Mobile GM965/GL960 Integrated Graphics Controller (rev 03)
Subsystem: Fujitsu Limited. Device 13fe
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Region 0: Memory at fc100000 (64-bit, non-prefetchable) [size=1M]
Capabilities: [d0] Power Management version 3
Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Bridge: PM- B3+
00:1a.0 USB Controller: Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #4 (rev 03)
Subsystem: Fujitsu Limited. Device 1414
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 22
Region 4: I/O ports at 1820 [size=32]
Kernel driver in use: uhci_hcd
00:1a.1 USB Controller: Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #5 (rev 03)
Subsystem: Fujitsu Limited. Device 1414
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 22
Region 4: I/O ports at 1840 [size=32]
Kernel driver in use: uhci_hcd
00:1a.7 USB Controller: Intel Corporation 82801H (ICH8 Family) USB2 EHCI Controller #2 (rev 03) (prog-if 20)
Subsystem: Fujitsu Limited. Device 1415
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin B routed to IRQ 23
Region 0: Memory at fc704800 (32-bit, non-prefetchable) [size=1K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Debug port: BAR=1 offset=00a0
Kernel driver in use: ehci_hcd
00:1b.0 Audio device: Intel Corporation 82801H (ICH8 Family) HD Audio Controller (rev 03)
Subsystem: Fujitsu Limited. Device 142d
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 21
Region 0: Memory at fc700000 (64-bit, non-prefetchable) [size=16K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable-
Address: 0000000000000000 Data: 0000
Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE- FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us
ClockPM- Suprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
Capabilities: [100] Virtual Channel <?>
Capabilities: [130] Root Complex Link <?>
Kernel driver in use: HDA Intel
00:1c.0 PCI bridge: Intel Corporation 82801H (ICH8 Family) PCI Express Port 1 (rev 03)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=04, subordinate=07, sec-latency=0
I/O behind bridge: 00002000-00002fff
Memory behind bridge: fc200000-fc2fffff
Prefetchable memory behind bridge: 00000000a8000000-00000000a80fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM- Suprise- LLActRep+ BwNot-
LnkCtl: ASPM L0s Enabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+
Slot # 2, PowerLimit 6.500000; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet- LinkState-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable-
Address: fee0100c Data: 41b1
Capabilities: [90] Subsystem: Fujitsu Limited. Device 1416
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100] Virtual Channel <?>
Capabilities: [180] Root Complex Link <?>
Kernel driver in use: pcieport-driver
00:1c.4 PCI bridge: Intel Corporation 82801H (ICH8 Family) PCI Express Port 5 (rev 03)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=14, subordinate=1b, sec-latency=0
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fc300000-fc3fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #5, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM- Suprise- LLActRep+ BwNot-
LnkCtl: ASPM L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+
Slot # 2, PowerLimit 6.500000; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet- LinkState-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable-
Address: fee0100c Data: 41b9
Capabilities: [90] Subsystem: Fujitsu Limited. Device 1416
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100] Virtual Channel <?>
Capabilities: [180] Root Complex Link <?>
Kernel driver in use: pcieport-driver
00:1d.0 USB Controller: Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #1 (rev 03)
Subsystem: Fujitsu Limited. Device 1414
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 22
Region 4: I/O ports at 1860 [size=32]
Kernel driver in use: uhci_hcd
00:1d.1 USB Controller: Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #2 (rev 03)
Subsystem: Fujitsu Limited. Device 1414
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 22
Region 4: I/O ports at 1880 [size=32]
Kernel driver in use: uhci_hcd
00:1d.7 USB Controller: Intel Corporation 82801H (ICH8 Family) USB2 EHCI Controller #1 (rev 03) (prog-if 20)
Subsystem: Fujitsu Limited. Device 1415
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin B routed to IRQ 23
Region 0: Memory at fc704c00 (32-bit, non-prefetchable) [size=1K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME+
Capabilities: [58] Debug port: BAR=1 offset=00a0
Kernel driver in use: ehci_hcd
00:1e.0 PCI bridge: Intel Corporation 82801 Mobile PCI Bridge (rev f3) (prog-if 01)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Bus: primary=00, secondary=1c, subordinate=20, sec-latency=32
I/O behind bridge: 00003000-00003fff
Memory behind bridge: fc400000-fc4fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR+
BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [50] Subsystem: Fujitsu Limited. Device 140c
00:1f.0 ISA bridge: Intel Corporation 82801HEM (ICH8M) LPC Interface Controller (rev 03)
Subsystem: Fujitsu Limited. Device 140e
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Capabilities: [e0] Vendor Specific Information <?>
00:1f.1 IDE interface: Intel Corporation 82801HBM/HEM (ICH8M/ICH8M-E) IDE Controller (rev 03) (prog-if 8a [Master SecP PriP])
Subsystem: Fujitsu Limited. Device 140f
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 20
Region 0: I/O ports at 01f0 [size=8]
Region 1: I/O ports at 03f4 [size=1]
Region 2: I/O ports at 0170 [size=8]
Region 3: I/O ports at 0374 [size=1]
Region 4: I/O ports at 1810 [size=16]
Kernel driver in use: ata_piix
00:1f.2 SATA controller: Intel Corporation 82801HBM/HEM (ICH8M/ICH8M-E) SATA AHCI Controller (rev 03) (prog-if 01)
Subsystem: Fujitsu Limited. Device 1411
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 220
Region 0: I/O ports at 18e0 [size=8]
Region 1: I/O ports at 18b4 [size=4]
Region 2: I/O ports at 18b8 [size=8]
Region 3: I/O ports at 18b0 [size=4]
Region 4: I/O ports at 18c0 [size=32]
Region 5: Memory at fc704000 (32-bit, non-prefetchable) [size=2K]
Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/2 Enable+
Address: fee0100c Data: 41d1
Capabilities: [70] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [a8] SATA HBA <?>
Kernel driver in use: ahci
00:1f.3 SMBus: Intel Corporation 82801H (ICH8 Family) SMBus Controller (rev 03)
Subsystem: Fujitsu Limited. Device 1413
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin B routed to IRQ 21
Region 0: Memory at a8100000 (32-bit, non-prefetchable) [size=256]
Region 4: I/O ports at 1c00 [size=32]
Kernel driver in use: i801_smbus
04:00.0 Ethernet controller: Marvell Technology Group Ltd. 88E8055 PCI-E Gigabit Ethernet Controller (rev 14)
Subsystem: Fujitsu Limited. Device 139a
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 221
Region 0: Memory at fc200000 (64-bit, non-prefetchable) [size=16K]
Region 2: I/O ports at 2000 [size=256]
[virtual] Expansion ROM at a8000000 [disabled] [size=128K]
Capabilities: [48] Power Management version 3
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] Vital Product Data <?>
Capabilities: [5c] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable+
Address: 00000000fee0100c Data: 41c1
Capabilities: [e0] Express (v1) Legacy Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr+ UncorrErr+ FatalErr- UnsuppReq+ AuxPwr+ TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 unlimited
ClockPM+ Suprise- LLActRep- BwNot-
LnkCtl: ASPM L0s Enabled; RCB 128 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
Capabilities: [100] Advanced Error Reporting <?>
Kernel driver in use: sky2
14:00.0 Network controller: Intel Corporation PRO/Wireless 4965 AG or AGN Network Connection (rev 61)
Subsystem: Intel Corporation Device 1100
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 219
Region 0: Memory at fc300000 (64-bit, non-prefetchable) [size=8K]
Capabilities: [c8] Power Management version 3
Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [d0] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable+
Address: 00000000fee0300c Data: 4138
Capabilities: [e0] Express (v1) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 unlimited
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <128ns, L1 <64us
ClockPM+ Suprise- LLActRep- BwNot-
LnkCtl: ASPM L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
Capabilities: [100] Advanced Error Reporting <?>
Capabilities: [140] Device Serial Number 97-62-84-ff-ff-3b-1f-00
Kernel driver in use: iwl4965
1c:03.0 CardBus bridge: O2 Micro, Inc. OZ711SP1 Memory CardBus Controller (rev 01)
Subsystem: Fujitsu Limited. Device 143d
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 168
Interrupt: pin A routed to IRQ 16
Region 0: Memory at fc402000 (32-bit, non-prefetchable) [size=4K]
Bus: primary=1c, secondary=1d, subordinate=20, sec-latency=176
Memory window 0: a8400000-a87ff000 (prefetchable)
Memory window 1: ac000000-affff000
I/O window 0: 00003000-000030ff
I/O window 1: 00003400-000034ff
BridgeCtl: Parity- SERR- ISA- VGA- MAbort- >Reset+ 16bInt+ PostWrite+
16-bit legacy interface ports at 0001
Kernel driver in use: yenta_cardbus
1c:03.2 SD Host controller: O2 Micro, Inc. Integrated MMC/SD Controller (rev 02) (prog-if 01)
Subsystem: Fujitsu Limited. Device 143d
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 32, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 16
Region 0: Memory at fc401800 (32-bit, non-prefetchable) [size=256]
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: sdhci-pci
Kernel modules: sdhci-pci
1c:03.4 FireWire (IEEE 1394): O2 Micro, Inc. Firewire (IEEE 1394) (rev 02) (prog-if 10)
Subsystem: Fujitsu Limited. Device 143e
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx+
Latency: 32, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 16
Region 0: Memory at fc400000 (32-bit, non-prefetchable) [size=4K]
Region 1: Memory at fc401000 (32-bit, non-prefetchable) [size=2K]
Capabilities: [60] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME+
Kernel driver in use: ohci1394
--
Intel are signing my paycheques ... these opinions are still mine
"Bill, look, we understand that you're interested in selling us this
operating system, but compare it to ours. We can't possibly take such
a retrograde step."
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-25 4:42 ` Alex Chiang
2008-07-25 5:38 ` Kenji Kaneshige
@ 2008-07-28 18:05 ` Greg KH
1 sibling, 0 replies; 37+ messages in thread
From: Greg KH @ 2008-07-28 18:05 UTC (permalink / raw)
To: Alex Chiang, Matthew Wilcox, Pierre Ossman, Jesse Barnes,
Kenji Kaneshige, LKML, linux-pci
On Thu, Jul 24, 2008 at 10:42:34PM -0600, Alex Chiang wrote:
> * Matthew Wilcox <matthew@wil.cx>:
> > On Fri, Jul 25, 2008 at 01:29:16AM +0200, Pierre Ossman wrote:
> > > On Thu, 24 Jul 2008 17:08:27 -0600
> > > Alex Chiang <achiang@hp.com> wrote:
> > >
> > > > Sorry for one more round-trip, but could you turn on debugging
> > > > for pciehp as well?
> > > >
> > >
> > > Same thing, with debugging:
> >
> > I have a laptop with a similar problem (though I don't have pciehp
> > enabled, so I didn't notice it). Obviously, we need to fix this.
> >
> > There is no question in my mind that firmware has programmed the slot
> > numbers incorrectly. Here's the evidence from lspci -vvv:
> >
> > 00:1c.0 PCI bridge: Intel Corporation 82801H (ICH8 Family) PCI Express Port 1 (rev 03)
> > Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
> > SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+
> > Slot # 2, PowerLimit 6.500000; Interlock- NoCompl-
> > 00:1c.4 PCI bridge: Intel Corporation 82801H (ICH8 Family) PCI Express Port 5 (rev 03)
> > Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
> > SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+
> > Slot # 2, PowerLimit 6.500000; Interlock- NoCompl-
> >
> > I don't think anyone can credibly argue that this is correct. They're
> > both PCIe devices, they're both both indicating that they have a slot
> > (maybe if I get my screwdriver out, I can see if there's really a slot
> > ...), they're on the same bus (so I don't know how the with_bus
> > parameter makes any difference).
> >
> > I've always hated that with_bus parameter. I don't like it being a
> > parameter and I don't like the names it produces.
> >
> > Part of the problem is the kobject API. It really hates you trying to
> > register a duplicate name and won't just return -EEXIST and let you try
> > a new name. Instead it prints an ugly warning and dumps stack. See
> > kobject_add_internal() in lib/kobject.c.
>
> Yeah, I don't really like that part of the kobject API either.
Then don't register kobjects with the same name of an already existing
one :)
It's pretty simple, you already have a list of all kobjects associated
with this parent kobject (or driver or class), so search them all before
registering them if you think you might end up with a duplicate.
thanks,
greg k-h
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-28 16:16 ` Jesse Barnes
@ 2008-07-29 2:43 ` Kenji Kaneshige
2008-07-29 15:14 ` Jesse Barnes
0 siblings, 1 reply; 37+ messages in thread
From: Kenji Kaneshige @ 2008-07-29 2:43 UTC (permalink / raw)
To: Jesse Barnes; +Cc: Pierre Ossman, Alex Chiang, LKML, linux-pci, Kristen Accardi
Jesse Barnes wrote:
> On Monday, July 28, 2008 1:44 am Kenji Kaneshige wrote:
>> Jesse Barnes wrote:
>>> I think that's fine (automatically creating duplicate devices with names
>>> to differentiate them), but I think we should also try harder to avoid
>>> adding duplicates.
>>>
>>> In Pierre's case, and on my T61, there's only one actual hotplug slot
>>> available, but the firmware creates duplicate physical slot numbers and
>>> sets the HP_CAP bit on everything, both of which are obviously wrong
>>> (well I suppose you could pop these chips off the board, but it's not
>>> very practical). However, afaict that "other" OS uses the _RMV method to
>>> determine whether a given slot is actually hot pluggable. On my T61 at
>>> least, this seems to be accurate: only one of my EXP* objects has a _RMV
>>> method.
>>>
>>> So maybe the PCIe hotplug driver should be checking for that method when
>>> ACPI is available? We already try to use _OSC etc., so checking for _RMV
>>> first would make sense...
>> As you pointed out, the root cause might not a problem of slot naming,
>> but a problem of slots detection, because pciehp driver detects multiple
>> PCIe hotplug slots even thought your and Pierre's system seems to have
>> only one hotplug slot. So I think we should also consider the problem
>> from this view point (slot detection).
>>
>> But, I think simply checking for _RMV method first is dangerous because
>> I think there are many systems that doesn't implement _RMV for PCIe
>> hotplug slots (at least, my system doesn't implement that. Anyway,
>> I would like to look at the documents/specifications that mention _RMV
>> method for determining whether a given slot is hot pluggable. Do you
>> have any information about that? I think PCI Local Bus, PCI Express and
>> PCI Firmware specification don't mention that. I think hot pluggable slots
>> on your, Pierre's and Matthew's system are ExpressCard slots. So I guess
>> ExpressCard specification might define something about this. But
>> unfortunately, I don't have ExpressCard specification. Can anyone access
>> ExpressCard spec?
>
> Your systems don't have _RMV methods for the hotpluggable PCIe slots in the
> DSDT? That's a shame; the Windows docs I found on PCIe hotplug seemed to
> indicate that _RMV and _OSC (under Vista) were used to detect whether a given
> slot was hot pluggable (I just googled for "windows pcie hotplug" or
> something) so I was hoping that would be a reliable method... Any other
> ideas? I'll go see if I can dig up some ExpressCard info.
>
My systems don't have _RMV methods for the hot pluggable PCIe slots in the
DSDT, but I don't think that's a shame. I suppose that the document you are
referring describes how Windows handles ExpressCard slots. In my
understanding, Hot Plug Surprise bit in the Slot Capabilities register is
set to 1b on ExpressCard slots, and I believe that ACPI _RVM method is for
the device that only supports surprise-style removal. I think this is why
your system implements _RMV method for slots.
On the other hand, hot pluggable slots on my servers are *not* ExpressCard
slots, and all of them have Power Controller instead of surprise-style
removal (Hot Plug Surprise bit in the Slot Capabilities register is set to
0b). So I believe there is no reason to implement _RMV methods for the hot
pluggable PCIe slots on my systems.
Here is an idea. How about using _RMV method to determine whether a given
slot is actually hot pluggable when Hot Plug Surprise bit in the Slot
Capabilities register is set to 1b on the slot? This is based on a little
rough assumption that all PCIe slots that support surprise-style removal
have _RMV method, though. Does this work for you?
Thanks,
Kenji Kaneshige
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-29 2:43 ` Kenji Kaneshige
@ 2008-07-29 15:14 ` Jesse Barnes
2008-07-30 2:44 ` Kenji Kaneshige
0 siblings, 1 reply; 37+ messages in thread
From: Jesse Barnes @ 2008-07-29 15:14 UTC (permalink / raw)
To: Kenji Kaneshige
Cc: Pierre Ossman, Alex Chiang, LKML, linux-pci, Kristen Accardi
On Monday, July 28, 2008 7:43 pm Kenji Kaneshige wrote:
> > Your systems don't have _RMV methods for the hotpluggable PCIe slots in
> > the DSDT? That's a shame; the Windows docs I found on PCIe hotplug
> > seemed to indicate that _RMV and _OSC (under Vista) were used to detect
> > whether a given slot was hot pluggable (I just googled for "windows pcie
> > hotplug" or something) so I was hoping that would be a reliable method...
> > Any other ideas? I'll go see if I can dig up some ExpressCard info.
>
> My systems don't have _RMV methods for the hot pluggable PCIe slots in the
> DSDT, but I don't think that's a shame. I suppose that the document you are
> referring describes how Windows handles ExpressCard slots. In my
> understanding, Hot Plug Surprise bit in the Slot Capabilities register is
> set to 1b on ExpressCard slots, and I believe that ACPI _RVM method is for
> the device that only supports surprise-style removal. I think this is why
> your system implements _RMV method for slots.
Yeah, that may be. The document wasn't very clear; I was hoping that
something simple would be available.
> On the other hand, hot pluggable slots on my servers are *not* ExpressCard
> slots, and all of them have Power Controller instead of surprise-style
> removal (Hot Plug Surprise bit in the Slot Capabilities register is set to
> 0b). So I believe there is no reason to implement _RMV methods for the hot
> pluggable PCIe slots on my systems.
>
> Here is an idea. How about using _RMV method to determine whether a given
> slot is actually hot pluggable when Hot Plug Surprise bit in the Slot
> Capabilities register is set to 1b on the slot? This is based on a little
> rough assumption that all PCIe slots that support surprise-style removal
> have _RMV method, though. Does this work for you?
It's worth a try. We need *some* sort of better method to detect hot
pluggable slots...
Thanks,
Jesse
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-25 4:57 ` Kenji Kaneshige
@ 2008-07-30 2:38 ` Alex Chiang
2008-07-30 2:42 ` [PATCH 1/2] pciehp: Rename duplicate slot name N as N-1, N-2, N-M Alex Chiang
` (2 more replies)
0 siblings, 3 replies; 37+ messages in thread
From: Alex Chiang @ 2008-07-30 2:38 UTC (permalink / raw)
To: Kenji Kaneshige
Cc: Matthew Wilcox, Pierre Ossman, Jesse Barnes, LKML, linux-pci
* Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>:
> Matthew Wilcox wrote:
>> So we need a way to find if there's already a slot of this
>> name. I don't see a kobject routine to do that. Maybe we can
>> do it internally to the pci slot code.
pci_hp_register already does this with get_slot_from_name().
>> Then we need to pick a new name for the kobject if it does
>> collide. My suggestion is that the second time we find an
>> object named "2", we call it "2dup1" (the third time "2dup2",
>> etc.) Other opinions I've seen include "2a", "2b", ... or
>> "2-1", "2-2", ... or "2-brokenfw1", "2-brokenfw2".
>
> That looks quite better than using bus number.
I went with:
- first slot to register gets "2"
- second slot to register gets "2-1"
- Mth slot to register gets "2-M"
At first, I thought it would have been better to put this logic
inside of pci_hp_register, since it knows about the collision,
and could just fix stuff up for the caller.
However, the problem is that each hotplug driver can have a
different length for "name", and it got messy quickly.
So, I just patched the two drivers that are known to be
problematic.
Two patches follow, against 2.6.27-rc1.
Compile tested only -- I don't have hardware to replicate this.
I'd say they're somewhere between RFC and requested for
inclusion. I'm certainly not tied to them, just trying to show
some code to implement the approach described above. If we decide
that looking at _RMV + other bits is the way to go, then I'm fine
with that.
It would be great if Pierre and Kenji-san could try them out.
Thanks.
/ac
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH 1/2] pciehp: Rename duplicate slot name N as N-1, N-2, N-M...
2008-07-30 2:38 ` Alex Chiang
@ 2008-07-30 2:42 ` Alex Chiang
2008-07-31 10:32 ` Kenji Kaneshige
2008-07-30 2:44 ` [PATCH 2/2] shpchp: " Alex Chiang
2008-07-31 10:31 ` post 2.6.26 requires pciehp_slot_with_bus Kenji Kaneshige
2 siblings, 1 reply; 37+ messages in thread
From: Alex Chiang @ 2008-07-30 2:42 UTC (permalink / raw)
To: Kenji Kaneshige, Matthew Wilcox, Pierre Ossman, Jesse Barnes,
LKML, linux-pci
Commit 3800345f723fd130d50434d4717b99d4a9f383c8 introduces the
pciehp_slot_with_bus module parameter, which was intended to help
work around broken firmware that assigns the same name to multiple
slots.
Commit 9e4f2e8d4ddb04ad16a3828cd9a369a5a5287009 tells the user to
use the above parameter in the event of a name collision.
This approach is sub-optimal because it requires too much work from
the user.
Instead, let's rename the slot on behalf of the user. If firmware
assigns the name N to multiple slots, then:
The first registered slot is assigned N
The second registered slot is assigned N-1
The third registered slot is assigned N-2
The Mth registered slot becomes N-M
In the event we overflow the slot->name parameter, we report an
error to the user.
Signed-off-by: Alex Chiang <achiang@hp.com>
---
drivers/pci/hotplug/pciehp.h | 1 -
drivers/pci/hotplug/pciehp_core.c | 21 ++++++++++++++-------
drivers/pci/hotplug/pciehp_hpc.c | 11 +----------
3 files changed, 15 insertions(+), 18 deletions(-)
diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h
index e3a1e7e..9e6cec6 100644
--- a/drivers/pci/hotplug/pciehp.h
+++ b/drivers/pci/hotplug/pciehp.h
@@ -43,7 +43,6 @@ extern int pciehp_poll_mode;
extern int pciehp_poll_time;
extern int pciehp_debug;
extern int pciehp_force;
-extern int pciehp_slot_with_bus;
extern struct workqueue_struct *pciehp_wq;
#define dbg(format, arg...) \
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
index 3677495..4fd5355 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -41,7 +41,6 @@ int pciehp_debug;
int pciehp_poll_mode;
int pciehp_poll_time;
int pciehp_force;
-int pciehp_slot_with_bus;
struct workqueue_struct *pciehp_wq;
#define DRIVER_VERSION "0.4"
@@ -56,12 +55,10 @@ module_param(pciehp_debug, bool, 0644);
module_param(pciehp_poll_mode, bool, 0644);
module_param(pciehp_poll_time, int, 0644);
module_param(pciehp_force, bool, 0644);
-module_param(pciehp_slot_with_bus, bool, 0644);
MODULE_PARM_DESC(pciehp_debug, "Debugging mode enabled or not");
MODULE_PARM_DESC(pciehp_poll_mode, "Using polling mechanism for hot-plug events or not");
MODULE_PARM_DESC(pciehp_poll_time, "Polling mechanism frequency, in seconds");
MODULE_PARM_DESC(pciehp_force, "Force pciehp, even if _OSC and OSHP are missing");
-MODULE_PARM_DESC(pciehp_slot_with_bus, "Use bus number in the slot name");
#define PCIE_MODULE_NAME "pciehp"
@@ -194,6 +191,7 @@ static int init_slots(struct controller *ctrl)
struct slot *slot;
struct hotplug_slot *hotplug_slot;
struct hotplug_slot_info *info;
+ int len, dup = 1;
int retval = -ENOMEM;
list_for_each_entry(slot, &ctrl->slot_list, slot_list) {
@@ -220,15 +218,24 @@ static int init_slots(struct controller *ctrl)
dbg("Registering bus=%x dev=%x hp_slot=%x sun=%x "
"slot_device_offset=%x\n", slot->bus, slot->device,
slot->hp_slot, slot->number, ctrl->slot_device_offset);
+duplicate_name:
retval = pci_hp_register(hotplug_slot,
ctrl->pci_dev->subordinate,
slot->device);
if (retval) {
+ /*
+ * If slot N already exists, we'll try to create
+ * slot N-1, N-2 ... N-M, until we overflow.
+ */
+ if (retval == -EEXIST) {
+ len = snprintf(slot->name, SLOT_NAME_SIZE,
+ "%d-%d", slot->number, dup++);
+ if (len < SLOT_NAME_SIZE)
+ goto duplicate_name;
+ else
+ err("duplicate slot name overflow\n");
+ }
err("pci_hp_register failed with error %d\n", retval);
- if (retval == -EEXIST)
- err("Failed to register slot because of name "
- "collision. Try \'pciehp_slot_with_bus\' "
- "module option.\n");
goto error_info;
}
/* create additional sysfs entries */
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index ad27e9e..ab31f5b 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -1030,15 +1030,6 @@ static void pcie_shutdown_notification(struct controller *ctrl)
pciehp_free_irq(ctrl);
}
-static void make_slot_name(struct slot *slot)
-{
- if (pciehp_slot_with_bus)
- snprintf(slot->name, SLOT_NAME_SIZE, "%04d_%04d",
- slot->bus, slot->number);
- else
- snprintf(slot->name, SLOT_NAME_SIZE, "%d", slot->number);
-}
-
static int pcie_init_slot(struct controller *ctrl)
{
struct slot *slot;
@@ -1053,7 +1044,7 @@ static int pcie_init_slot(struct controller *ctrl)
slot->device = ctrl->slot_device_offset + slot->hp_slot;
slot->hpc_ops = ctrl->hpc_ops;
slot->number = ctrl->first_slot;
- make_slot_name(slot);
+ snprintf(slot->name, SLOT_NAME_SIZE, "%d", slot->number);
mutex_init(&slot->lock);
INIT_DELAYED_WORK(&slot->work, pciehp_queue_pushbutton_work);
list_add(&slot->slot_list, &ctrl->slot_list);
--
1.6.0.rc0.g95f8
^ permalink raw reply related [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-29 15:14 ` Jesse Barnes
@ 2008-07-30 2:44 ` Kenji Kaneshige
0 siblings, 0 replies; 37+ messages in thread
From: Kenji Kaneshige @ 2008-07-30 2:44 UTC (permalink / raw)
To: Jesse Barnes; +Cc: Pierre Ossman, Alex Chiang, LKML, linux-pci, Kristen Accardi
Jesse Barnes wrote:
> On Monday, July 28, 2008 7:43 pm Kenji Kaneshige wrote:
>>> Your systems don't have _RMV methods for the hotpluggable PCIe slots in
>>> the DSDT? That's a shame; the Windows docs I found on PCIe hotplug
>>> seemed to indicate that _RMV and _OSC (under Vista) were used to detect
>>> whether a given slot was hot pluggable (I just googled for "windows pcie
>>> hotplug" or something) so I was hoping that would be a reliable method...
>>> Any other ideas? I'll go see if I can dig up some ExpressCard info.
>> My systems don't have _RMV methods for the hot pluggable PCIe slots in the
>> DSDT, but I don't think that's a shame. I suppose that the document you are
>> referring describes how Windows handles ExpressCard slots. In my
>> understanding, Hot Plug Surprise bit in the Slot Capabilities register is
>> set to 1b on ExpressCard slots, and I believe that ACPI _RVM method is for
>> the device that only supports surprise-style removal. I think this is why
>> your system implements _RMV method for slots.
>
> Yeah, that may be. The document wasn't very clear; I was hoping that
> something simple would be available.
>
>> On the other hand, hot pluggable slots on my servers are *not* ExpressCard
>> slots, and all of them have Power Controller instead of surprise-style
>> removal (Hot Plug Surprise bit in the Slot Capabilities register is set to
>> 0b). So I believe there is no reason to implement _RMV methods for the hot
>> pluggable PCIe slots on my systems.
>>
>> Here is an idea. How about using _RMV method to determine whether a given
>> slot is actually hot pluggable when Hot Plug Surprise bit in the Slot
>> Capabilities register is set to 1b on the slot? This is based on a little
>> rough assumption that all PCIe slots that support surprise-style removal
>> have _RMV method, though. Does this work for you?
>
> It's worth a try. We need *some* sort of better method to detect hot
> pluggable slots...
OK. I'll try to make a patch.
According to PCI Express and PCI firmware spec, I think Hot Plug Capable
bit in the Slot Capabilities register and ACPI _OSC are enough to detect
hot pluggable slots. But I might be missing something especially about
ExpressCard, or BIOS is just broken...
Thanks,
Kenji Kaneshige
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH 2/2] shpchp: Rename duplicate slot name N as N-1, N-2, N-M...
2008-07-30 2:38 ` Alex Chiang
2008-07-30 2:42 ` [PATCH 1/2] pciehp: Rename duplicate slot name N as N-1, N-2, N-M Alex Chiang
@ 2008-07-30 2:44 ` Alex Chiang
2008-07-31 10:32 ` Kenji Kaneshige
2008-07-31 10:31 ` post 2.6.26 requires pciehp_slot_with_bus Kenji Kaneshige
2 siblings, 1 reply; 37+ messages in thread
From: Alex Chiang @ 2008-07-30 2:44 UTC (permalink / raw)
To: Kenji Kaneshige, Matthew Wilcox, Pierre Ossman, Jesse Barnes,
LKML, linux-pci
Commit ef0ff95f136f0f2d035667af5d18b824609de320 introduces the
shpchp_slot_with_bus module parameter, which was intended to help
work around broken firmware that assigns the same name to multiple
slots.
Commit b3bd307c628af2f0a581c42d5d7e4bcdbbf64b6a tells the user to
use the above parameter in the event of a name collision.
This approach is sub-optimal because it requires too much work from
the user.
Instead, let's rename the slot on behalf of the user. If firmware
assigns the name N to multiple slots, then:
The first registered slot is assigned N
The second registered slot is assigned N-1
The third registered slot is assigned N-2
The Mth registered slot becomes N-M
In the event we overflow the slot->name parameter, we report an
error to the user.
Signed-off-by: Alex Chiang <achiang@hp.com>
---
drivers/pci/hotplug/shpchp_core.c | 34 +++++++++++++++-------------------
1 files changed, 15 insertions(+), 19 deletions(-)
diff --git a/drivers/pci/hotplug/shpchp_core.c b/drivers/pci/hotplug/shpchp_core.c
index a8cbd03..cc38615 100644
--- a/drivers/pci/hotplug/shpchp_core.c
+++ b/drivers/pci/hotplug/shpchp_core.c
@@ -39,7 +39,6 @@
int shpchp_debug;
int shpchp_poll_mode;
int shpchp_poll_time;
-static int shpchp_slot_with_bus;
struct workqueue_struct *shpchp_wq;
#define DRIVER_VERSION "0.4"
@@ -53,11 +52,9 @@ MODULE_LICENSE("GPL");
module_param(shpchp_debug, bool, 0644);
module_param(shpchp_poll_mode, bool, 0644);
module_param(shpchp_poll_time, int, 0644);
-module_param(shpchp_slot_with_bus, bool, 0644);
MODULE_PARM_DESC(shpchp_debug, "Debugging mode enabled or not");
MODULE_PARM_DESC(shpchp_poll_mode, "Using polling mechanism for hot-plug events or not");
MODULE_PARM_DESC(shpchp_poll_time, "Polling mechanism frequency, in seconds");
-MODULE_PARM_DESC(shpchp_slot_with_bus, "Use bus number in the slot name");
#define SHPC_MODULE_NAME "shpchp"
@@ -99,23 +96,13 @@ static void release_slot(struct hotplug_slot *hotplug_slot)
kfree(slot);
}
-static void make_slot_name(struct slot *slot)
-{
- if (shpchp_slot_with_bus)
- snprintf(slot->hotplug_slot->name, SLOT_NAME_SIZE, "%04d_%04d",
- slot->bus, slot->number);
- else
- snprintf(slot->hotplug_slot->name, SLOT_NAME_SIZE, "%d",
- slot->number);
-}
-
static int init_slots(struct controller *ctrl)
{
struct slot *slot;
struct hotplug_slot *hotplug_slot;
struct hotplug_slot_info *info;
int retval = -ENOMEM;
- int i;
+ int i, len, dup = 1;
for (i = 0; i < ctrl->num_slots; i++) {
slot = kzalloc(sizeof(*slot), GFP_KERNEL);
@@ -146,7 +133,7 @@ static int init_slots(struct controller *ctrl)
/* register this slot with the hotplug pci core */
hotplug_slot->private = slot;
hotplug_slot->release = &release_slot;
- make_slot_name(slot);
+ snprintf(slot->name, SLOT_NAME_SIZE, "%d", slot->number);
hotplug_slot->ops = &shpchp_hotplug_slot_ops;
get_power_status(hotplug_slot, &info->power_status);
@@ -157,14 +144,23 @@ static int init_slots(struct controller *ctrl)
dbg("Registering bus=%x dev=%x hp_slot=%x sun=%x "
"slot_device_offset=%x\n", slot->bus, slot->device,
slot->hp_slot, slot->number, ctrl->slot_device_offset);
+duplicate_name:
retval = pci_hp_register(slot->hotplug_slot,
ctrl->pci_dev->subordinate, slot->device);
if (retval) {
+ /*
+ * If slot N already exists, we'll try to create
+ * slot N-1, N-2 ... N-M, until we overflow.
+ */
+ if (retval == -EEXIST) {
+ len = snprintf(slot->name, SLOT_NAME_SIZE,
+ "%d-%d", slot->number, dup++);
+ if (len < SLOT_NAME_SIZE)
+ goto duplicate_name;
+ else
+ err("duplicate slot name overflow\n");
+ }
err("pci_hp_register failed with error %d\n", retval);
- if (retval == -EEXIST)
- err("Failed to register slot because of name "
- "collision. Try \'shpchp_slot_with_bus\' "
- "module option.\n");
goto error_info;
}
--
1.6.0.rc0.g95f8
^ permalink raw reply related [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-30 2:38 ` Alex Chiang
2008-07-30 2:42 ` [PATCH 1/2] pciehp: Rename duplicate slot name N as N-1, N-2, N-M Alex Chiang
2008-07-30 2:44 ` [PATCH 2/2] shpchp: " Alex Chiang
@ 2008-07-31 10:31 ` Kenji Kaneshige
2008-07-31 15:47 ` Alex Chiang
2 siblings, 1 reply; 37+ messages in thread
From: Kenji Kaneshige @ 2008-07-31 10:31 UTC (permalink / raw)
To: Alex Chiang, Kenji Kaneshige, Matthew Wilcox, Pierre Ossman,
Jesse Barnes, LKML, linux-pci
Alex Chiang wrote:
> * Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>:
>> Matthew Wilcox wrote:
>>> So we need a way to find if there's already a slot of this
>>> name. I don't see a kobject routine to do that. Maybe we can
>>> do it internally to the pci slot code.
>
> pci_hp_register already does this with get_slot_from_name().
>
>>> Then we need to pick a new name for the kobject if it does
>>> collide. My suggestion is that the second time we find an
>>> object named "2", we call it "2dup1" (the third time "2dup2",
>>> etc.) Other opinions I've seen include "2a", "2b", ... or
>>> "2-1", "2-2", ... or "2-brokenfw1", "2-brokenfw2".
>> That looks quite better than using bus number.
>
> I went with:
>
> - first slot to register gets "2"
> - second slot to register gets "2-1"
> - Mth slot to register gets "2-M"
>
> At first, I thought it would have been better to put this logic
> inside of pci_hp_register, since it knows about the collision,
> and could just fix stuff up for the caller.
>
> However, the problem is that each hotplug driver can have a
> different length for "name", and it got messy quickly.
>
> So, I just patched the two drivers that are known to be
> problematic.
>
> Two patches follow, against 2.6.27-rc1.
>
> Compile tested only -- I don't have hardware to replicate this.
>
> I'd say they're somewhere between RFC and requested for
> inclusion. I'm certainly not tied to them, just trying to show
> some code to implement the approach described above. If we decide
> that looking at _RMV + other bits is the way to go, then I'm fine
> with that.
>
> It would be great if Pierre and Kenji-san could try them out.
Thank you for patches, Alex-san!
I've reviewed those patches and tested them on my ia64 machine
that have both shpc and pcie hotplug slots. Your patch looks
good.
As you mentioned, we are considering the problem also from the
view point of slot detection. But I think your patch is needed
regardless of that because there might be platforms whose slots
are detected properly but firmware assigns the physical slot
number wrongly. I think Alex's patch should go to mainline.
P.S.: I found a possible improvement, though it is not a big
problem and we don't not need to fix it soon. I'd like to tell
you about it just in case. Current pci_hp_register() checks if
name is duplicated first, before checking if another hotplug
driver is already registered to the slot. So, if shpchp/pciehp
driver tries to register hotplug slot that is already registered
by the other hotplug driver (e.g. acpiphp) with the same name,
shpchp/pciehp driver will do as follows:
(1) shpchp/pciehp call pci_hp_register()
(2) pci_hp_register() returns -EEXIST
(3) shpchp/pciehp call pci_hp_register() with other name ("M-1")
(4) pci_hp_register() returns -EBUSY
if pci_hp_register() checked if another hotplug driver is already
registered first, step (2) and (3) could be removed.
Thanks,
Kenji Kaneshige
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 1/2] pciehp: Rename duplicate slot name N as N-1, N-2, N-M...
2008-07-30 2:42 ` [PATCH 1/2] pciehp: Rename duplicate slot name N as N-1, N-2, N-M Alex Chiang
@ 2008-07-31 10:32 ` Kenji Kaneshige
0 siblings, 0 replies; 37+ messages in thread
From: Kenji Kaneshige @ 2008-07-31 10:32 UTC (permalink / raw)
To: Alex Chiang, Kenji Kaneshige, Matthew Wilcox, Pierre Ossman,
Jesse Barnes, LKML, linux-pci
Tested-by & Acked-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Thnaks,
Kenji Kaneshige
Alex Chiang wrote:
> Commit 3800345f723fd130d50434d4717b99d4a9f383c8 introduces the
> pciehp_slot_with_bus module parameter, which was intended to help
> work around broken firmware that assigns the same name to multiple
> slots.
>
> Commit 9e4f2e8d4ddb04ad16a3828cd9a369a5a5287009 tells the user to
> use the above parameter in the event of a name collision.
>
> This approach is sub-optimal because it requires too much work from
> the user.
>
> Instead, let's rename the slot on behalf of the user. If firmware
> assigns the name N to multiple slots, then:
>
> The first registered slot is assigned N
> The second registered slot is assigned N-1
> The third registered slot is assigned N-2
> The Mth registered slot becomes N-M
>
> In the event we overflow the slot->name parameter, we report an
> error to the user.
>
> Signed-off-by: Alex Chiang <achiang@hp.com>
> ---
> drivers/pci/hotplug/pciehp.h | 1 -
> drivers/pci/hotplug/pciehp_core.c | 21 ++++++++++++++-------
> drivers/pci/hotplug/pciehp_hpc.c | 11 +----------
> 3 files changed, 15 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h
> index e3a1e7e..9e6cec6 100644
> --- a/drivers/pci/hotplug/pciehp.h
> +++ b/drivers/pci/hotplug/pciehp.h
> @@ -43,7 +43,6 @@ extern int pciehp_poll_mode;
> extern int pciehp_poll_time;
> extern int pciehp_debug;
> extern int pciehp_force;
> -extern int pciehp_slot_with_bus;
> extern struct workqueue_struct *pciehp_wq;
>
> #define dbg(format, arg...) \
> diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
> index 3677495..4fd5355 100644
> --- a/drivers/pci/hotplug/pciehp_core.c
> +++ b/drivers/pci/hotplug/pciehp_core.c
> @@ -41,7 +41,6 @@ int pciehp_debug;
> int pciehp_poll_mode;
> int pciehp_poll_time;
> int pciehp_force;
> -int pciehp_slot_with_bus;
> struct workqueue_struct *pciehp_wq;
>
> #define DRIVER_VERSION "0.4"
> @@ -56,12 +55,10 @@ module_param(pciehp_debug, bool, 0644);
> module_param(pciehp_poll_mode, bool, 0644);
> module_param(pciehp_poll_time, int, 0644);
> module_param(pciehp_force, bool, 0644);
> -module_param(pciehp_slot_with_bus, bool, 0644);
> MODULE_PARM_DESC(pciehp_debug, "Debugging mode enabled or not");
> MODULE_PARM_DESC(pciehp_poll_mode, "Using polling mechanism for hot-plug events or not");
> MODULE_PARM_DESC(pciehp_poll_time, "Polling mechanism frequency, in seconds");
> MODULE_PARM_DESC(pciehp_force, "Force pciehp, even if _OSC and OSHP are missing");
> -MODULE_PARM_DESC(pciehp_slot_with_bus, "Use bus number in the slot name");
>
> #define PCIE_MODULE_NAME "pciehp"
>
> @@ -194,6 +191,7 @@ static int init_slots(struct controller *ctrl)
> struct slot *slot;
> struct hotplug_slot *hotplug_slot;
> struct hotplug_slot_info *info;
> + int len, dup = 1;
> int retval = -ENOMEM;
>
> list_for_each_entry(slot, &ctrl->slot_list, slot_list) {
> @@ -220,15 +218,24 @@ static int init_slots(struct controller *ctrl)
> dbg("Registering bus=%x dev=%x hp_slot=%x sun=%x "
> "slot_device_offset=%x\n", slot->bus, slot->device,
> slot->hp_slot, slot->number, ctrl->slot_device_offset);
> +duplicate_name:
> retval = pci_hp_register(hotplug_slot,
> ctrl->pci_dev->subordinate,
> slot->device);
> if (retval) {
> + /*
> + * If slot N already exists, we'll try to create
> + * slot N-1, N-2 ... N-M, until we overflow.
> + */
> + if (retval == -EEXIST) {
> + len = snprintf(slot->name, SLOT_NAME_SIZE,
> + "%d-%d", slot->number, dup++);
> + if (len < SLOT_NAME_SIZE)
> + goto duplicate_name;
> + else
> + err("duplicate slot name overflow\n");
> + }
> err("pci_hp_register failed with error %d\n", retval);
> - if (retval == -EEXIST)
> - err("Failed to register slot because of name "
> - "collision. Try \'pciehp_slot_with_bus\' "
> - "module option.\n");
> goto error_info;
> }
> /* create additional sysfs entries */
> diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
> index ad27e9e..ab31f5b 100644
> --- a/drivers/pci/hotplug/pciehp_hpc.c
> +++ b/drivers/pci/hotplug/pciehp_hpc.c
> @@ -1030,15 +1030,6 @@ static void pcie_shutdown_notification(struct controller *ctrl)
> pciehp_free_irq(ctrl);
> }
>
> -static void make_slot_name(struct slot *slot)
> -{
> - if (pciehp_slot_with_bus)
> - snprintf(slot->name, SLOT_NAME_SIZE, "%04d_%04d",
> - slot->bus, slot->number);
> - else
> - snprintf(slot->name, SLOT_NAME_SIZE, "%d", slot->number);
> -}
> -
> static int pcie_init_slot(struct controller *ctrl)
> {
> struct slot *slot;
> @@ -1053,7 +1044,7 @@ static int pcie_init_slot(struct controller *ctrl)
> slot->device = ctrl->slot_device_offset + slot->hp_slot;
> slot->hpc_ops = ctrl->hpc_ops;
> slot->number = ctrl->first_slot;
> - make_slot_name(slot);
> + snprintf(slot->name, SLOT_NAME_SIZE, "%d", slot->number);
> mutex_init(&slot->lock);
> INIT_DELAYED_WORK(&slot->work, pciehp_queue_pushbutton_work);
> list_add(&slot->slot_list, &ctrl->slot_list);
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 2/2] shpchp: Rename duplicate slot name N as N-1, N-2, N-M...
2008-07-30 2:44 ` [PATCH 2/2] shpchp: " Alex Chiang
@ 2008-07-31 10:32 ` Kenji Kaneshige
0 siblings, 0 replies; 37+ messages in thread
From: Kenji Kaneshige @ 2008-07-31 10:32 UTC (permalink / raw)
To: Alex Chiang, Kenji Kaneshige, Matthew Wilcox, Pierre Ossman,
Jesse Barnes, LKML, linux-pci
Tested-by & Acked-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Thnaks,
Kenji Kaneshige
Alex Chiang wrote:
> Commit ef0ff95f136f0f2d035667af5d18b824609de320 introduces the
> shpchp_slot_with_bus module parameter, which was intended to help
> work around broken firmware that assigns the same name to multiple
> slots.
>
> Commit b3bd307c628af2f0a581c42d5d7e4bcdbbf64b6a tells the user to
> use the above parameter in the event of a name collision.
>
> This approach is sub-optimal because it requires too much work from
> the user.
>
> Instead, let's rename the slot on behalf of the user. If firmware
> assigns the name N to multiple slots, then:
>
> The first registered slot is assigned N
> The second registered slot is assigned N-1
> The third registered slot is assigned N-2
> The Mth registered slot becomes N-M
>
> In the event we overflow the slot->name parameter, we report an
> error to the user.
>
> Signed-off-by: Alex Chiang <achiang@hp.com>
> ---
> drivers/pci/hotplug/shpchp_core.c | 34 +++++++++++++++-------------------
> 1 files changed, 15 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/pci/hotplug/shpchp_core.c b/drivers/pci/hotplug/shpchp_core.c
> index a8cbd03..cc38615 100644
> --- a/drivers/pci/hotplug/shpchp_core.c
> +++ b/drivers/pci/hotplug/shpchp_core.c
> @@ -39,7 +39,6 @@
> int shpchp_debug;
> int shpchp_poll_mode;
> int shpchp_poll_time;
> -static int shpchp_slot_with_bus;
> struct workqueue_struct *shpchp_wq;
>
> #define DRIVER_VERSION "0.4"
> @@ -53,11 +52,9 @@ MODULE_LICENSE("GPL");
> module_param(shpchp_debug, bool, 0644);
> module_param(shpchp_poll_mode, bool, 0644);
> module_param(shpchp_poll_time, int, 0644);
> -module_param(shpchp_slot_with_bus, bool, 0644);
> MODULE_PARM_DESC(shpchp_debug, "Debugging mode enabled or not");
> MODULE_PARM_DESC(shpchp_poll_mode, "Using polling mechanism for hot-plug events or not");
> MODULE_PARM_DESC(shpchp_poll_time, "Polling mechanism frequency, in seconds");
> -MODULE_PARM_DESC(shpchp_slot_with_bus, "Use bus number in the slot name");
>
> #define SHPC_MODULE_NAME "shpchp"
>
> @@ -99,23 +96,13 @@ static void release_slot(struct hotplug_slot *hotplug_slot)
> kfree(slot);
> }
>
> -static void make_slot_name(struct slot *slot)
> -{
> - if (shpchp_slot_with_bus)
> - snprintf(slot->hotplug_slot->name, SLOT_NAME_SIZE, "%04d_%04d",
> - slot->bus, slot->number);
> - else
> - snprintf(slot->hotplug_slot->name, SLOT_NAME_SIZE, "%d",
> - slot->number);
> -}
> -
> static int init_slots(struct controller *ctrl)
> {
> struct slot *slot;
> struct hotplug_slot *hotplug_slot;
> struct hotplug_slot_info *info;
> int retval = -ENOMEM;
> - int i;
> + int i, len, dup = 1;
>
> for (i = 0; i < ctrl->num_slots; i++) {
> slot = kzalloc(sizeof(*slot), GFP_KERNEL);
> @@ -146,7 +133,7 @@ static int init_slots(struct controller *ctrl)
> /* register this slot with the hotplug pci core */
> hotplug_slot->private = slot;
> hotplug_slot->release = &release_slot;
> - make_slot_name(slot);
> + snprintf(slot->name, SLOT_NAME_SIZE, "%d", slot->number);
> hotplug_slot->ops = &shpchp_hotplug_slot_ops;
>
> get_power_status(hotplug_slot, &info->power_status);
> @@ -157,14 +144,23 @@ static int init_slots(struct controller *ctrl)
> dbg("Registering bus=%x dev=%x hp_slot=%x sun=%x "
> "slot_device_offset=%x\n", slot->bus, slot->device,
> slot->hp_slot, slot->number, ctrl->slot_device_offset);
> +duplicate_name:
> retval = pci_hp_register(slot->hotplug_slot,
> ctrl->pci_dev->subordinate, slot->device);
> if (retval) {
> + /*
> + * If slot N already exists, we'll try to create
> + * slot N-1, N-2 ... N-M, until we overflow.
> + */
> + if (retval == -EEXIST) {
> + len = snprintf(slot->name, SLOT_NAME_SIZE,
> + "%d-%d", slot->number, dup++);
> + if (len < SLOT_NAME_SIZE)
> + goto duplicate_name;
> + else
> + err("duplicate slot name overflow\n");
> + }
> err("pci_hp_register failed with error %d\n", retval);
> - if (retval == -EEXIST)
> - err("Failed to register slot because of name "
> - "collision. Try \'shpchp_slot_with_bus\' "
> - "module option.\n");
> goto error_info;
> }
>
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-31 10:31 ` post 2.6.26 requires pciehp_slot_with_bus Kenji Kaneshige
@ 2008-07-31 15:47 ` Alex Chiang
2008-08-01 8:43 ` Kenji Kaneshige
0 siblings, 1 reply; 37+ messages in thread
From: Alex Chiang @ 2008-07-31 15:47 UTC (permalink / raw)
To: Kenji Kaneshige
Cc: Matthew Wilcox, Pierre Ossman, Jesse Barnes, LKML, linux-pci
* Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>:
> Thank you for patches, Alex-san!
>
> I've reviewed those patches and tested them on my ia64 machine
> that have both shpc and pcie hotplug slots. Your patch looks
> good.
Thank you for reviewing and testing.
> As you mentioned, we are considering the problem also from the
> view point of slot detection. But I think your patch is needed
> regardless of that because there might be platforms whose slots
> are detected properly but firmware assigns the physical slot
> number wrongly. I think Alex's patch should go to mainline.
That is a good point.
> P.S.: I found a possible improvement, though it is not a big
> problem and we don't not need to fix it soon. I'd like to tell
> you about it just in case. Current pci_hp_register() checks if
> name is duplicated first, before checking if another hotplug
> driver is already registered to the slot. So, if shpchp/pciehp
> driver tries to register hotplug slot that is already registered
> by the other hotplug driver (e.g. acpiphp) with the same name,
> shpchp/pciehp driver will do as follows:
>
> (1) shpchp/pciehp call pci_hp_register()
> (2) pci_hp_register() returns -EEXIST
> (3) shpchp/pciehp call pci_hp_register() with other name ("M-1")
> (4) pci_hp_register() returns -EBUSY
>
> if pci_hp_register() checked if another hotplug driver is already
> registered first, step (2) and (3) could be removed.
Thanks, that seems pretty easy to do.
Would you mind testing this patch as well? You should probably
apply it on top of the other two patches to see how all three
patches interact.
Thanks!
/ac
From: Alex Chiang <achiang@dl580g5.kio>
Subject: [PATCH] PCI hotplug: check for claimed slot before duplicate named slot
Kenji Kaneshige observes that:
If shpchp/pciehp driver tries to register hotplug slot that is
already registered by the other hotplug driver (e.g. acpiphp) with
the same name, shpchp/pciehp driver will do as follows:
(1) shpchp/pciehp call pci_hp_register()
(2) pci_hp_register() returns -EEXIST
(3) shpchp/pciehp call pci_hp_register() with other name ("M-1")
(4) pci_hp_register() returns -EBUSY
If pci_hp_register() checked if another hotplug driver is already
registered first, step (2) and (3) could be removed.
This patch does not prevent the *same* driver from attempting
to register multiple slots with the same name (on systems with
broken firmware). For that situation, we still need to detect
a name collision and return -EEXIST if so.
Signed-off-by: Alex Chiang <achiang@hp.com>
---
drivers/pci/hotplug/pci_hotplug_core.c | 11 ++++++-----
1 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/pci/hotplug/pci_hotplug_core.c b/drivers/pci/hotplug/pci_hotplug_core.c
index 5f85b1b..9c379b6 100644
--- a/drivers/pci/hotplug/pci_hotplug_core.c
+++ b/drivers/pci/hotplug/pci_hotplug_core.c
@@ -568,10 +568,6 @@ int pci_hp_register(struct hotplug_slot *slot, struct pci_bus *bus, int slot_nr)
return -EINVAL;
}
- /* Check if we have already registered a slot with the same name. */
- if (get_slot_from_name(slot->name))
- return -EEXIST;
-
/*
* No problems if we call this interface from both ACPI_PCI_SLOT
* driver and call it here again. If we've already created the
@@ -587,6 +583,12 @@ int pci_hp_register(struct hotplug_slot *slot, struct pci_bus *bus, int slot_nr)
return -EBUSY;
}
+ /* Check if we have already registered a slot with the same name. */
+ if (get_slot_from_name(slot->name)) {
+ pci_destroy_slot(pci_slot);
+ return -EEXIST;
+ }
+
slot->pci_slot = pci_slot;
pci_slot->hotplug = slot;
@@ -609,7 +611,6 @@ int pci_hp_register(struct hotplug_slot *slot, struct pci_bus *bus, int slot_nr)
kobject_uevent(&pci_slot->kobj, KOBJ_ADD);
dbg("Added slot %s to the list\n", slot->name);
-
return result;
}
--
1.6.0.rc0.g95f8
^ permalink raw reply related [flat|nested] 37+ messages in thread
* Re: post 2.6.26 requires pciehp_slot_with_bus
2008-07-31 15:47 ` Alex Chiang
@ 2008-08-01 8:43 ` Kenji Kaneshige
0 siblings, 0 replies; 37+ messages in thread
From: Kenji Kaneshige @ 2008-08-01 8:43 UTC (permalink / raw)
To: Alex Chiang, Kenji Kaneshige, Matthew Wilcox, Pierre Ossman,
Jesse Barnes, LKML, linux-pci
Alex Chiang wrote:
> * Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>:
>> Thank you for patches, Alex-san!
>>
>> I've reviewed those patches and tested them on my ia64 machine
>> that have both shpc and pcie hotplug slots. Your patch looks
>> good.
>
> Thank you for reviewing and testing.
>
>> As you mentioned, we are considering the problem also from the
>> view point of slot detection. But I think your patch is needed
>> regardless of that because there might be platforms whose slots
>> are detected properly but firmware assigns the physical slot
>> number wrongly. I think Alex's patch should go to mainline.
>
> That is a good point.
>
>> P.S.: I found a possible improvement, though it is not a big
>> problem and we don't not need to fix it soon. I'd like to tell
>> you about it just in case. Current pci_hp_register() checks if
>> name is duplicated first, before checking if another hotplug
>> driver is already registered to the slot. So, if shpchp/pciehp
>> driver tries to register hotplug slot that is already registered
>> by the other hotplug driver (e.g. acpiphp) with the same name,
>> shpchp/pciehp driver will do as follows:
>>
>> (1) shpchp/pciehp call pci_hp_register()
>> (2) pci_hp_register() returns -EEXIST
>> (3) shpchp/pciehp call pci_hp_register() with other name ("M-1")
>> (4) pci_hp_register() returns -EBUSY
>>
>> if pci_hp_register() checked if another hotplug driver is already
>> registered first, step (2) and (3) could be removed.
>
> Thanks, that seems pretty easy to do.
>
> Would you mind testing this patch as well? You should probably
> apply it on top of the other two patches to see how all three
> patches interact.
>
> Thanks!
>
> /ac
>
>
> From: Alex Chiang <achiang@dl580g5.kio>
> Subject: [PATCH] PCI hotplug: check for claimed slot before duplicate named slot
>
> Kenji Kaneshige observes that:
>
> If shpchp/pciehp driver tries to register hotplug slot that is
> already registered by the other hotplug driver (e.g. acpiphp) with
> the same name, shpchp/pciehp driver will do as follows:
>
> (1) shpchp/pciehp call pci_hp_register()
> (2) pci_hp_register() returns -EEXIST
> (3) shpchp/pciehp call pci_hp_register() with other name ("M-1")
> (4) pci_hp_register() returns -EBUSY
>
> If pci_hp_register() checked if another hotplug driver is already
> registered first, step (2) and (3) could be removed.
>
> This patch does not prevent the *same* driver from attempting
> to register multiple slots with the same name (on systems with
> broken firmware). For that situation, we still need to detect
> a name collision and return -EEXIST if so.
>
> Signed-off-by: Alex Chiang <achiang@hp.com>
> ---
> drivers/pci/hotplug/pci_hotplug_core.c | 11 ++++++-----
> 1 files changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/pci/hotplug/pci_hotplug_core.c b/drivers/pci/hotplug/pci_hotplug_core.c
> index 5f85b1b..9c379b6 100644
> --- a/drivers/pci/hotplug/pci_hotplug_core.c
> +++ b/drivers/pci/hotplug/pci_hotplug_core.c
> @@ -568,10 +568,6 @@ int pci_hp_register(struct hotplug_slot *slot, struct pci_bus *bus, int slot_nr)
> return -EINVAL;
> }
>
> - /* Check if we have already registered a slot with the same name. */
> - if (get_slot_from_name(slot->name))
> - return -EEXIST;
> -
> /*
> * No problems if we call this interface from both ACPI_PCI_SLOT
> * driver and call it here again. If we've already created the
> @@ -587,6 +583,12 @@ int pci_hp_register(struct hotplug_slot *slot, struct pci_bus *bus, int slot_nr)
> return -EBUSY;
> }
>
> + /* Check if we have already registered a slot with the same name. */
> + if (get_slot_from_name(slot->name)) {
> + pci_destroy_slot(pci_slot);
> + return -EEXIST;
> + }
> +
> slot->pci_slot = pci_slot;
> pci_slot->hotplug = slot;
>
> @@ -609,7 +611,6 @@ int pci_hp_register(struct hotplug_slot *slot, struct pci_bus *bus, int slot_nr)
> kobject_uevent(&pci_slot->kobj, KOBJ_ADD);
> dbg("Added slot %s to the list\n", slot->name);
>
> -
> return result;
> }
>
Unfortunately, we can't simply move the following check after pci_create_slot().
> - /* Check if we have already registered a slot with the same name. */
> - if (get_slot_from_name(slot->name))
> - return -EEXIST;
> -
With this change, kobject_init_and_add() called in pci_create_slot() will
show stack trace if a hotplug driver attempts to register multiple slot with
the same name. That is, stack trace will be shown on the platform that wrongly
assing the physical slot number to multiple slots. I'm very sorry, but I don't
have enough time to consider how to fix it today.
Thanks,
Kenji Kaneshige
^ permalink raw reply [flat|nested] 37+ messages in thread
end of thread, other threads:[~2008-08-01 8:45 UTC | newest]
Thread overview: 37+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2008-07-24 11:47 post 2.6.26 requires pciehp_slot_with_bus Pierre Ossman
2008-07-24 12:38 ` Kenji Kaneshige
2008-07-24 20:39 ` Pierre Ossman
2008-07-24 21:07 ` Jesse Barnes
2008-07-24 21:51 ` Pierre Ossman
2008-07-24 22:06 ` Jesse Barnes
2008-07-24 22:29 ` Alex Chiang
2008-07-24 22:49 ` Pierre Ossman
2008-07-24 23:08 ` Alex Chiang
2008-07-24 23:29 ` Pierre Ossman
2008-07-25 3:29 ` Matthew Wilcox
2008-07-25 4:42 ` Alex Chiang
2008-07-25 5:38 ` Kenji Kaneshige
2008-07-25 11:18 ` Matthew Wilcox
2008-07-28 18:05 ` Greg KH
2008-07-25 4:57 ` Kenji Kaneshige
2008-07-30 2:38 ` Alex Chiang
2008-07-30 2:42 ` [PATCH 1/2] pciehp: Rename duplicate slot name N as N-1, N-2, N-M Alex Chiang
2008-07-31 10:32 ` Kenji Kaneshige
2008-07-30 2:44 ` [PATCH 2/2] shpchp: " Alex Chiang
2008-07-31 10:32 ` Kenji Kaneshige
2008-07-31 10:31 ` post 2.6.26 requires pciehp_slot_with_bus Kenji Kaneshige
2008-07-31 15:47 ` Alex Chiang
2008-08-01 8:43 ` Kenji Kaneshige
2008-07-25 8:53 ` Kenji Kaneshige
2008-07-25 11:40 ` Matthew Wilcox
2008-07-28 7:21 ` Kenji Kaneshige
2008-07-25 4:50 ` Kenji Kaneshige
2008-07-25 22:18 ` Jesse Barnes
2008-07-26 1:16 ` Matthew Wilcox
2008-07-28 8:58 ` Kenji Kaneshige
2008-07-28 8:44 ` Kenji Kaneshige
2008-07-28 16:16 ` Jesse Barnes
2008-07-29 2:43 ` Kenji Kaneshige
2008-07-29 15:14 ` Jesse Barnes
2008-07-30 2:44 ` Kenji Kaneshige
2008-07-28 16:57 ` Matthew Wilcox
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