* linux-next: manual merge of the irqdomain tree with the arm tree
@ 2012-03-19 6:22 Stephen Rothwell
0 siblings, 0 replies; 5+ messages in thread
From: Stephen Rothwell @ 2012-03-19 6:22 UTC (permalink / raw)
To: Grant Likely
Cc: linux-next, linux-kernel, Mircea Gherzan, Russell King, Rob Herring
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Hi Grant,
Today's linux-next merge of the irqdomain tree got a conflict in
arch/arm/Kconfig between commit 4755ccad6d53 ("ARM: 7259/3: net: JIT
compiler for packet filters") from the arm tree and commit 2378b56c3747
("ARM: kconfig: always select IRQ_DOMAIN") from the irqdomain tree.
Just context changes. I fixed it up (see below) and can carry the fix as
necessary.
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
diff --cc arch/arm/Kconfig
index 3795400,c857283..0000000
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@@ -33,7 -31,8 +33,8 @@@ config AR
select GENERIC_IRQ_SHOW
select CPU_PM if (SUSPEND || CPU_IDLE)
select GENERIC_PCI_IOMAP
+ select HAVE_BPF_JIT
+ select IRQ_DOMAIN
help
The ARM series is a line of low-power-consumption RISC chip designs
licensed by ARM Ltd and targeted at embedded applications and
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^ permalink raw reply [flat|nested] 5+ messages in thread
* linux-next: manual merge of the irqdomain tree with the arm tree
@ 2012-02-17 4:37 Stephen Rothwell
0 siblings, 0 replies; 5+ messages in thread
From: Stephen Rothwell @ 2012-02-17 4:37 UTC (permalink / raw)
To: Grant Likely
Cc: linux-next, linux-kernel, Rob Herring, Russell King, Mark Salter
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Hi Grant,
Today's linux-next merge of the irqdomain tree got a conflict in
arch/c6x/Kconfig between commit 2ed86b16eabe ("irq: make SPARSE_IRQ an
optionally hidden option") from the arm tree and commit 0bd761e1b6d9
("irq_domain/c6x: Convert c6x to use generic irq_domain support") from
the irqdomain tree.
Just context changes. I fixed it up (see below) and can carry the fix as
necessary.
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
diff --cc arch/c6x/Kconfig
index 2f58c61,3c64b28..0000000
--- a/arch/c6x/Kconfig
+++ b/arch/c6x/Kconfig
@@@ -11,7 -11,8 +11,8 @@@ config TMS320C6
select HAVE_DMA_API_DEBUG
select HAVE_GENERIC_HARDIRQS
select HAVE_MEMBLOCK
- select HAVE_SPARSE_IRQ
+ select SPARSE_IRQ
+ select IRQ_DOMAIN
select OF
select OF_EARLY_FLATTREE
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: linux-next: manual merge of the irqdomain tree with the arm tree
2012-02-09 6:29 ` Grant Likely
@ 2012-02-09 22:25 ` Will Deacon
0 siblings, 0 replies; 5+ messages in thread
From: Will Deacon @ 2012-02-09 22:25 UTC (permalink / raw)
To: Grant Likely; +Cc: Stephen Rothwell, linux-next, linux-kernel, Russell King
On Thu, Feb 09, 2012 at 06:29:10AM +0000, Grant Likely wrote:
> The context fixup looks correct to me. I'll test the current
> linux-next tree when I get a chance (I'm at a conference at the
> moment).
Likewise - today's next looks fine but I don't have any platforms to hand
for testing.
Will
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: linux-next: manual merge of the irqdomain tree with the arm tree
2012-02-09 4:14 Stephen Rothwell
@ 2012-02-09 6:29 ` Grant Likely
2012-02-09 22:25 ` Will Deacon
0 siblings, 1 reply; 5+ messages in thread
From: Grant Likely @ 2012-02-09 6:29 UTC (permalink / raw)
To: Stephen Rothwell; +Cc: linux-next, linux-kernel, Russell King, Will Deacon
On Wed, Feb 8, 2012 at 8:14 PM, Stephen Rothwell <sfr@canb.auug.org.au> wrote:
> Hi Grant,
>
> Today's linux-next merge of the irqdomain tree got a conflict in
> arch/arm/common/gic.c between commit c11907f588d6 ("ARM: 7318/1: gic:
> refactor irq_start assignment") from the arm tree and commit 7da5a66bbf1f
> ("irq_domain: Remove 'new' irq_domain in favour of the ppc one") from the
> irqdomain tree.
>
> I fixed it up (see below) and can carry the fix as necessary.
Thanks Stephen.
The context fixup looks correct to me. I'll test the current
linux-next tree when I get a chance (I'm at a conference at the
moment).
g.
> --
> Cheers,
> Stephen Rothwell sfr@canb.auug.org.au
>
> diff --cc arch/arm/common/gic.c
> index ca6b5dd,8cf934c..0000000
> --- a/arch/arm/common/gic.c
> +++ b/arch/arm/common/gic.c
> @@@ -348,12 -344,15 +345,11 @@@ void __init gic_cascade_irq(unsigned in
>
> static void __init gic_dist_init(struct gic_chip_data *gic)
> {
> - unsigned int i, irq;
> + unsigned int i;
> u32 cpumask;
> unsigned int gic_irqs = gic->gic_irqs;
> - struct irq_domain *domain = &gic->domain;
> void __iomem *base = gic_data_dist_base(gic);
> - u32 cpu = 0;
> -
> -#ifdef CONFIG_SMP
> - cpu = cpu_logical_map(smp_processor_id());
> -#endif
> + u32 cpu = cpu_logical_map(smp_processor_id());
>
> cpumask = 1 << cpu;
> cpumask |= cpumask << 8;
> @@@ -694,12 -689,13 +686,12 @@@ void __init gic_init_bases(unsigned in
> * For primary GICs, skip over SGIs.
> * For secondary GICs, skip over PPIs, too.
> */
> - hwirq_base = 32;
> - if (gic_nr == 0) {
> - if ((irq_start & 31) > 0) {
> - hwirq_base = 16;
> - if (irq_start != -1)
> - irq_start = (irq_start & ~31) + 16;
> - }
> + if (gic_nr == 0 && (irq_start & 31) > 0) {
> - domain->hwirq_base = 16;
> ++ hwirq_base = 16;
> + if (irq_start != -1)
> + irq_start = (irq_start & ~31) + 16;
> + } else {
> - domain->hwirq_base = 32;
> ++ hwirq_base = 32;
> }
>
> /*
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply [flat|nested] 5+ messages in thread
* linux-next: manual merge of the irqdomain tree with the arm tree
@ 2012-02-09 4:14 Stephen Rothwell
2012-02-09 6:29 ` Grant Likely
0 siblings, 1 reply; 5+ messages in thread
From: Stephen Rothwell @ 2012-02-09 4:14 UTC (permalink / raw)
To: Grant Likely; +Cc: linux-next, linux-kernel, Russell King, Will Deacon
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Hi Grant,
Today's linux-next merge of the irqdomain tree got a conflict in
arch/arm/common/gic.c between commit c11907f588d6 ("ARM: 7318/1: gic:
refactor irq_start assignment") from the arm tree and commit 7da5a66bbf1f
("irq_domain: Remove 'new' irq_domain in favour of the ppc one") from the
irqdomain tree.
I fixed it up (see below) and can carry the fix as necessary.
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
diff --cc arch/arm/common/gic.c
index ca6b5dd,8cf934c..0000000
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@@ -348,12 -344,15 +345,11 @@@ void __init gic_cascade_irq(unsigned in
static void __init gic_dist_init(struct gic_chip_data *gic)
{
- unsigned int i, irq;
+ unsigned int i;
u32 cpumask;
unsigned int gic_irqs = gic->gic_irqs;
- struct irq_domain *domain = &gic->domain;
void __iomem *base = gic_data_dist_base(gic);
- u32 cpu = 0;
-
-#ifdef CONFIG_SMP
- cpu = cpu_logical_map(smp_processor_id());
-#endif
+ u32 cpu = cpu_logical_map(smp_processor_id());
cpumask = 1 << cpu;
cpumask |= cpumask << 8;
@@@ -694,12 -689,13 +686,12 @@@ void __init gic_init_bases(unsigned in
* For primary GICs, skip over SGIs.
* For secondary GICs, skip over PPIs, too.
*/
- hwirq_base = 32;
- if (gic_nr == 0) {
- if ((irq_start & 31) > 0) {
- hwirq_base = 16;
- if (irq_start != -1)
- irq_start = (irq_start & ~31) + 16;
- }
+ if (gic_nr == 0 && (irq_start & 31) > 0) {
- domain->hwirq_base = 16;
++ hwirq_base = 16;
+ if (irq_start != -1)
+ irq_start = (irq_start & ~31) + 16;
+ } else {
- domain->hwirq_base = 32;
++ hwirq_base = 32;
}
/*
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