* [PATCH] PCI: save/restore max Latency Value for device LTR
@ 2012-05-06 15:11 Xudong Hao
2012-05-07 16:27 ` Bjorn Helgaas
0 siblings, 1 reply; 4+ messages in thread
From: Xudong Hao @ 2012-05-06 15:11 UTC (permalink / raw)
To: bhelgaas; +Cc: linux-pci, linux-kernel, kvm, xiantao.zhang, xudong.hao
LTR: Save Max snoop/no-snoop Latency Value in pci_save_pcie_state, and restore them in pci_restore_pcie_state.
Signed-off-by: Xudong Hao <xudong.hao@intel.com>
---
drivers/pci/pci.c | 12 ++++++++++++
1 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 111569c..c8573c3 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -875,6 +875,12 @@ static int pci_save_pcie_state(struct pci_dev *dev)
pci_read_config_word(dev, pos + PCI_EXP_LNKCTL2, &cap[i++]);
if (pcie_cap_has_sltctl2(dev->pcie_type, flags))
pci_read_config_word(dev, pos + PCI_EXP_SLTCTL2, &cap[i++]);
+ if (pci_ltr_supported(dev)) {
+ pci_read_config_word(dev, pos + PCI_LTR_MAX_SNOOP_LAT,
+ &cap[i++]);
+ pci_read_config_word(dev, pos + PCI_LTR_MAX_NOSNOOP_LAT,
+ &cap[i++]);
+ }
return 0;
}
@@ -908,6 +914,12 @@ static void pci_restore_pcie_state(struct pci_dev *dev)
pci_write_config_word(dev, pos + PCI_EXP_LNKCTL2, cap[i++]);
if (pcie_cap_has_sltctl2(dev->pcie_type, flags))
pci_write_config_word(dev, pos + PCI_EXP_SLTCTL2, cap[i++]);
+ if (pci_ltr_supported(dev)) {
+ pci_write_config_word(dev, pos + PCI_LTR_MAX_SNOOP_LAT,
+ cap[i++]);
+ pci_write_config_word(dev, pos + PCI_LTR_MAX_NOSNOOP_LAT,
+ cap[i++]);
+ }
}
--
1.6.0.rc1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] PCI: save/restore max Latency Value for device LTR
2012-05-06 15:11 [PATCH] PCI: save/restore max Latency Value for device LTR Xudong Hao
@ 2012-05-07 16:27 ` Bjorn Helgaas
2012-05-08 9:09 ` Hao, Xudong
0 siblings, 1 reply; 4+ messages in thread
From: Bjorn Helgaas @ 2012-05-07 16:27 UTC (permalink / raw)
To: Xudong Hao; +Cc: linux-pci, linux-kernel, kvm, xiantao.zhang, xudong.hao
On Sun, May 6, 2012 at 8:11 AM, Xudong Hao <xudong.hao@linux.intel.com> wrote:
> LTR: Save Max snoop/no-snoop Latency Value in pci_save_pcie_state, and restore them in pci_restore_pcie_state.
>
> Signed-off-by: Xudong Hao <xudong.hao@intel.com>
>
> ---
> drivers/pci/pci.c | 12 ++++++++++++
> 1 files changed, 12 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index 111569c..c8573c3 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -875,6 +875,12 @@ static int pci_save_pcie_state(struct pci_dev *dev)
> pci_read_config_word(dev, pos + PCI_EXP_LNKCTL2, &cap[i++]);
> if (pcie_cap_has_sltctl2(dev->pcie_type, flags))
> pci_read_config_word(dev, pos + PCI_EXP_SLTCTL2, &cap[i++]);
> + if (pci_ltr_supported(dev)) {
> + pci_read_config_word(dev, pos + PCI_LTR_MAX_SNOOP_LAT,
> + &cap[i++]);
> + pci_read_config_word(dev, pos + PCI_LTR_MAX_NOSNOOP_LAT,
> + &cap[i++]);
> + }
>
> return 0;
> }
> @@ -908,6 +914,12 @@ static void pci_restore_pcie_state(struct pci_dev *dev)
> pci_write_config_word(dev, pos + PCI_EXP_LNKCTL2, cap[i++]);
> if (pcie_cap_has_sltctl2(dev->pcie_type, flags))
> pci_write_config_word(dev, pos + PCI_EXP_SLTCTL2, cap[i++]);
> + if (pci_ltr_supported(dev)) {
> + pci_write_config_word(dev, pos + PCI_LTR_MAX_SNOOP_LAT,
> + cap[i++]);
> + pci_write_config_word(dev, pos + PCI_LTR_MAX_NOSNOOP_LAT,
> + cap[i++]);
> + }
> }
>
This doesn't make any sense to me. "pos" is the offset of the PCI
Express Capability (identifier 10h). LTR is a separate extended
capability (identifier 18h), so you at least have to look up its
offset.
Bjorn
^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: [PATCH] PCI: save/restore max Latency Value for device LTR
2012-05-07 16:27 ` Bjorn Helgaas
@ 2012-05-08 9:09 ` Hao, Xudong
2012-05-19 0:27 ` Bjorn Helgaas
0 siblings, 1 reply; 4+ messages in thread
From: Hao, Xudong @ 2012-05-08 9:09 UTC (permalink / raw)
To: Bjorn Helgaas, Xudong Hao; +Cc: linux-pci, linux-kernel, kvm, Zhang, Xiantao
> -----Original Message-----
> From: Bjorn Helgaas [mailto:bhelgaas@google.com]
> > }
> >
>
> This doesn't make any sense to me. "pos" is the offset of the PCI
> Express Capability (identifier 10h). LTR is a separate extended
> capability (identifier 18h), so you at least have to look up its
> offset.
>
Sorry paste a wrong patch...
How about this patch, not a formal patch.
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 111569c..eced407 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -910,6 +910,45 @@ static void pci_restore_pcie_state(struct pci_dev *dev)
pci_write_config_word(dev, pos + PCI_EXP_SLTCTL2, cap[i++]);
}
+static int pci_save_ltr_value(struct pci_dev *dev)
+{
+ int i = 0, pos;
+ struct pci_cap_saved_state *save_state;
+ u16 *cap;
+
+ pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR);
+ if (!pos)
+ return -ENOTSUPP;
+
+ save_state = pci_find_saved_cap(dev, PCI_EXT_CAP_ID_LTR);
+ if (!save_state) {
+ dev_err(&dev->dev, "buffer not found in %s\n", __func__);
+ return -ENOMEM;
+ }
+ cap = (u16 *)&save_state->cap.ltr_data[0];
+
+ pci_read_config_word(dev, pos + PCI_LTR_MAX_SNOOP_LAT, &cap[i++]);
+ pci_read_config_word(dev, pos + PCI_LTR_MAX_NOSNOOP_LAT, &cap[i++]);
+}
+
+static void pci_restore_ltr_value(struct pci_dev *dev)
+{
+ int i = 0, pos;
+ struct pci_cap_saved_state *save_state;
+ u16 *cap;
+
+ if (!pci_ltr_supported(dev))
+ return;
+
+ save_state = pci_find_saved_cap(dev, PCI_EXT_CAP_ID_LTR);
+ pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR);
+ if (!save_state || !pos)
+ return;
+ cap = (u16 *)&save_state->cap.ltr_data[0];
+
+ pci_write_config_word(dev, pos + PCI_LTR_MAX_SNOOP_LAT, cap[i++]);
+ pci_write_config_word(dev, pos + PCI_LTR_MAX_NOSNOOP_LAT, cap[i++]);
+}
static int pci_save_pcix_state(struct pci_dev *dev)
{
@@ -964,6 +1003,10 @@ pci_save_state(struct pci_dev *dev)
return i;
if ((i = pci_save_pcix_state(dev)) != 0)
return i;
+
+ if (pci_ltr_supported(dev))
+ return pci_save_ltr_value(dev);
+
return 0;
}
@@ -1032,6 +1075,7 @@ void pci_restore_state(struct pci_dev *dev)
pci_restore_pcix_state(dev);
pci_restore_msi_state(dev);
pci_restore_iov_state(dev);
+ pci_restore_ltr_value(dev);
dev->state_saved = false;
}
diff --git a/include/linux/pci.h b/include/linux/pci.h
index e444f5b..6343aeb 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -220,6 +220,7 @@ struct pci_cap_saved_data {
char cap_nr;
unsigned int size;
u32 data[0];
+ u32 ltr_data[0];
};
struct pci_cap_saved_state {
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] PCI: save/restore max Latency Value for device LTR
2012-05-08 9:09 ` Hao, Xudong
@ 2012-05-19 0:27 ` Bjorn Helgaas
0 siblings, 0 replies; 4+ messages in thread
From: Bjorn Helgaas @ 2012-05-19 0:27 UTC (permalink / raw)
To: Hao, Xudong; +Cc: Xudong Hao, linux-pci, linux-kernel, kvm, Zhang, Xiantao
On Tue, May 8, 2012 at 3:09 AM, Hao, Xudong <xudong.hao@intel.com> wrote:
>> -----Original Message-----
>> From: Bjorn Helgaas [mailto:bhelgaas@google.com]
>> > }
>> >
>>
>> This doesn't make any sense to me. "pos" is the offset of the PCI
>> Express Capability (identifier 10h). LTR is a separate extended
>> capability (identifier 18h), so you at least have to look up its
>> offset.
>>
> Sorry paste a wrong patch...
>
> How about this patch, not a formal patch.
>
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index 111569c..eced407 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -910,6 +910,45 @@ static void pci_restore_pcie_state(struct pci_dev *dev)
> pci_write_config_word(dev, pos + PCI_EXP_SLTCTL2, cap[i++]);
> }
>
> +static int pci_save_ltr_value(struct pci_dev *dev)
> +{
> + int i = 0, pos;
> + struct pci_cap_saved_state *save_state;
> + u16 *cap;
> +
> + pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR);
> + if (!pos)
> + return -ENOTSUPP;
> +
> + save_state = pci_find_saved_cap(dev, PCI_EXT_CAP_ID_LTR);
> + if (!save_state) {
> + dev_err(&dev->dev, "buffer not found in %s\n", __func__);
> + return -ENOMEM;
> + }
> + cap = (u16 *)&save_state->cap.ltr_data[0];
> +
> + pci_read_config_word(dev, pos + PCI_LTR_MAX_SNOOP_LAT, &cap[i++]);
> + pci_read_config_word(dev, pos + PCI_LTR_MAX_NOSNOOP_LAT, &cap[i++]);
> +}
> +
> +static void pci_restore_ltr_value(struct pci_dev *dev)
> +{
> + int i = 0, pos;
> + struct pci_cap_saved_state *save_state;
> + u16 *cap;
> +
> + if (!pci_ltr_supported(dev))
> + return;
> +
> + save_state = pci_find_saved_cap(dev, PCI_EXT_CAP_ID_LTR);
> + pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR);
> + if (!save_state || !pos)
> + return;
> + cap = (u16 *)&save_state->cap.ltr_data[0];
> +
> + pci_write_config_word(dev, pos + PCI_LTR_MAX_SNOOP_LAT, cap[i++]);
> + pci_write_config_word(dev, pos + PCI_LTR_MAX_NOSNOOP_LAT, cap[i++]);
> +}
>
> static int pci_save_pcix_state(struct pci_dev *dev)
> {
> @@ -964,6 +1003,10 @@ pci_save_state(struct pci_dev *dev)
> return i;
> if ((i = pci_save_pcix_state(dev)) != 0)
> return i;
> +
> + if (pci_ltr_supported(dev))
> + return pci_save_ltr_value(dev);
> +
> return 0;
> }
>
> @@ -1032,6 +1075,7 @@ void pci_restore_state(struct pci_dev *dev)
> pci_restore_pcix_state(dev);
> pci_restore_msi_state(dev);
> pci_restore_iov_state(dev);
> + pci_restore_ltr_value(dev);
>
> dev->state_saved = false;
> }
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index e444f5b..6343aeb 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -220,6 +220,7 @@ struct pci_cap_saved_data {
> char cap_nr;
> unsigned int size;
> u32 data[0];
> + u32 ltr_data[0];
> };
>
> struct pci_cap_saved_state {
Did you test this?
I can't believe this works at all. You're calling
"pci_find_saved_cap(dev, PCI_EXT_CAP_ID_LTR)", which searches the
pci_dev->saved_cap_space list, but you never add a PCI_EXT_CAP_ID_LTR
buffer to that list.
Bjorn
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2012-05-19 0:27 UTC | newest]
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2012-05-06 15:11 [PATCH] PCI: save/restore max Latency Value for device LTR Xudong Hao
2012-05-07 16:27 ` Bjorn Helgaas
2012-05-08 9:09 ` Hao, Xudong
2012-05-19 0:27 ` Bjorn Helgaas
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