Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Ивайло Димитров]

   
They look similar, but they are not equivalent :). The first major difference is here (code taken from omap-smc.S)

> ENTRY(omap_smc2)
>          stmfd   sp!, {r4-r12, lr}
>          mov     r3, r2
>          mov     r2, r1
>          mov     r1, #0x0        @ Process ID
>          mov     r6, #0xff
>          mov     r12, #0x00      @ Secure Service ID

Always zero, while RX51 PPA expects a real value. I wonder if it is a bug, but anyway I don't see the id parameter (R0) used.

>          mov     r7, #0
>          mcr     p15, 0, r7, c7, c5, 6

According to ARM TRM, this is "Invalidate entire branch predictor array"(IIUC). NFC why it is needed here, but this will not work on RX-51 until IBE bit in ACR is set. 

>          dsb
>          dmb
>          smc     #0

RX-51 needs smc #1 ;)

>          ldmfd   sp!, {r4-r12, pc}


The next major difference is that RX-51 expects parameter count passed in R3[0] to be the count of the remaining parameters +1, but omap_secure_dispatcher (in omap-secure.c) is passing the exact count of the remaining parameters.

I guess all of the above problems can be fixed/workarounded, but I wonder does it worth. Not to say that I don't have BB around to test if the code still works if I make changes to omap2-secure.c/omap-smc.S :)


 >-------- Оригинално писмо --------
 >От:  Nishanth Menon 
 >Относно: Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround
 >До: Pali Rohár 
 >Изпратено на: Четвъртък, 2013, Февруари 28 16:40:05 EET
 >
 >
 >On 10:42-20130228, Pali Rohár wrote:
 >> Signed-off-by: Ivaylo Dimitrov 
 >> Signed-off-by: Pali Rohár 
 >> ---
 >>  arch/arm/mach-omap2/Makefile            |    1 +
 >>  arch/arm/mach-omap2/board-rx51-secure.c |   66 +++++++++++++++++++++++++++++++
 >>  arch/arm/mach-omap2/board-rx51-secure.h |   36 +++++++++++++++++
 >>  arch/arm/mach-omap2/board-rx51-smc.S    |   34 ++++++++++++++++
 >>  arch/arm/mach-omap2/board-rx51.c        |    7 ++++
 >
 >Wondering if we can integrate these into 
 >arch/arm/mach-omap2/omap-smc.S
 >and
 >arch/arm/mach-omap2/omap-secure.c
 >on a quick look, it does seem there are commonalities.
 >
 >>  5 files changed, 144 insertions(+)
 >>  create mode 100644 arch/arm/mach-omap2/board-rx51-secure.c
 >>  create mode 100644 arch/arm/mach-omap2/board-rx51-secure.h
 >>  create mode 100644 arch/arm/mach-omap2/board-rx51-smc.S
 >> 
 >> diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
 >> index 0ebbdd50..8eb4fb4 100644
 >> --- a/arch/arm/mach-omap2/Makefile
 >> +++ b/arch/arm/mach-omap2/Makefile
 >> @@ -241,6 +241,7 @@ obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51.o sdram-nokia.o
 >>  obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51-peripherals.o
 >>  obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51-video.o
 >>  obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51-camera.o
 >> +obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51-smc.o board-rx51-secure.o
 >>  obj-$(CONFIG_MACH_OMAP_ZOOM2)		+= board-zoom.o board-zoom-peripherals.o
 >>  obj-$(CONFIG_MACH_OMAP_ZOOM2)		+= board-zoom-display.o
 >>  obj-$(CONFIG_MACH_OMAP_ZOOM2)		+= board-zoom-debugboard.o
 >> diff --git a/arch/arm/mach-omap2/board-rx51-secure.c b/arch/arm/mach-omap2/board-rx51-secure.c
 >> new file mode 100644
 >> index 0000000..361dc78
 >> --- /dev/null
 >> +++ b/arch/arm/mach-omap2/board-rx51-secure.c
 >> @@ -0,0 +1,66 @@
 >> +/*
 >> + * RX51 Secure PPA API.
 >> + *
 >> + * Copyright (C) 2012 Ivaylo Dimitrov 
 >> + *
 >> + *
 >> + * This program is free software,you can redistribute it and/or modify
 >> + * it under the terms of the GNU General Public License version 2 as
 >> + * published by the Free Software Foundation.
 >> + */
 >> +#include 
 >> +
 >> +#include "board-rx51-secure.h"
 >> +
 >> +/**
 >> + * rx51_secure_dispatcher: Routine to dispatch secure PPA API calls
 >> + * @idx: The PPA API index
 >> + * @flag: The flag indicating criticality of operation
 >> + * @nargs: Number of valid arguments out of four.
 >> + * @arg1, arg2, arg3 args4: Parameters passed to secure API
 >> + *
 >> + * Return the non-zero error value on failure.
 >> + */
 >> +u32 rx51_secure_dispatcher(u32 idx, u32 flag, u32 nargs, u32 arg1, u32 arg2,
 >> +			   u32 arg3, u32 arg4)
 >> +{
 >> +	u32 ret;
 >> +	u32 param[5];
 >> +
 >> +	param[0] = nargs+1;
 >> +	param[1] = arg1;
 >> +	param[2] = arg2;
 >> +	param[3] = arg3;
 >> +	param[4] = arg4;
 >> +
 >> +	/*
 >> +	 * Secure API needs physical address
 >> +	 * pointer for the parameters
 >> +	 */
 >> +	flush_cache_all();
 >> +	outer_clean_range(__pa(param), __pa(param + 5));
 >> +	ret = rx51_ppa_smc(idx, flag, __pa(param));
 >> +
 >> +	return ret;
 >> +}
 >> +
 >> +/**
 >> + * rx51_secure_update_aux_cr: Routine to modify the contents of Auxiliary Control Register
 >> + *  @set_bits: bits to set in ACR
 >> + *  @clr_bits: bits to clear in ACR
 >> + *
 >> + * Return the non-zero error value on failure.
 >> +*/
 >> +u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits)
 >> +{
 >> +	u32 acr;
 >> +
 >> +	/* Read ACR */
 >> +	asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
 >> +	acr &= ~clear_bits;
 >> +	acr |= set_bits;
 >> +
 >> +	return rx51_secure_dispatcher(RX51_PPA_WRITE_ACR,
 >> +			       FLAG_START_CRITICAL,
 >> +			       1,acr,0,0,0);
 >> +}
 >> diff --git a/arch/arm/mach-omap2/board-rx51-secure.h b/arch/arm/mach-omap2/board-rx51-secure.h
 >> new file mode 100644
 >> index 0000000..61c760b
 >> --- /dev/null
 >> +++ b/arch/arm/mach-omap2/board-rx51-secure.h
 >> @@ -0,0 +1,36 @@
 >> +/*
 >> + * board-rx51-secure.h: OMAP Secure infrastructure header.
 >> + *
 >> + * Copyright (C) 2012 Ivaylo Dimitrov 
 >> + *
 >> + * This program is free software; you can redistribute it and/or modify
 >> + * it under the terms of the GNU General Public License version 2 as
 >> + * published by the Free Software Foundation.
 >> + */
 >> +#ifndef OMAP_RX51_SECURE_H
 >> +#define OMAP_RX51_SECURE_H
 >> +
 >> +/* HAL API error codes */
 >> +#define  API_HAL_RET_VALUE_OK           0x00
 >> +#define  API_HAL_RET_VALUE_FAIL         0x01
 >> +
 >> +/* Secure HAL API flags */
 >> +#define FLAG_START_CRITICAL             0x4
 >> +#define FLAG_IRQFIQ_MASK                0x3
 >> +#define FLAG_IRQ_ENABLE                 0x2
 >> +#define FLAG_FIQ_ENABLE                 0x1
 >> +#define NO_FLAG                         0x0
 >> +
 >> +/* Secure PPA(Primary Protected Application) APIs */
 >> +#define RX51_PPA_L2_INVAL               40
 >> +#define RX51_PPA_WRITE_ACR              42
 >> +
 >> +#ifndef __ASSEMBLER__
 >> +
 >> +extern u32 rx51_secure_dispatcher(u32 idx, u32 flag, u32 nargs,
 >> +                                u32 arg1, u32 arg2, u32 arg3, u32 arg4);
 >> +extern u32 rx51_ppa_smc(u32 id, u32 flag, u32 pargs);
 >> +
 >> +extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits);
 >> +#endif /* __ASSEMBLER__ */
 >> +#endif /* OMAP_RX51_SECURE_H */
 >> diff --git a/arch/arm/mach-omap2/board-rx51-smc.S b/arch/arm/mach-omap2/board-rx51-smc.S
 >> new file mode 100644
 >> index 0000000..70e2eb7
 >> --- /dev/null
 >> +++ b/arch/arm/mach-omap2/board-rx51-smc.S
 >> @@ -0,0 +1,34 @@
 >> +/*
 >> + * RX51 secure APIs file.
 >> + *
 >> + * Copyright (C) 2012 Ivaylo Dimitrov 
 >> + *
 >> + *
 >> + * This program is free software,you can redistribute it and/or modify
 >> + * it under the terms of the GNU General Public License version 2 as
 >> + * published by the Free Software Foundation.
 >> + */
 >> +
 >> +#include 
 >> +
 >> +/**
 >> + * u32 rx51_ppa_smc(u32 id, u32 flag, u32 pargs)
 >> + * Low level common routine for secure HAL and PPA APIs.
 >> + * @id: Secure Service ID
 >> + * @flag: Flag to indicate the criticality of operation
 >> + * @pargs: Physical address of parameter list starting
 >> + *          with number of parametrs
 >> + */
 >> +ENTRY(rx51_ppa_smc)
 >> +	.arch_extension sec
 >> +	stmfd	sp!, {r4-r12, lr}
 >> +	mov	r12, r0		@ Copy the secure service ID
 >> +	mov	r3, r2		@ Copy the pointer to va_list in R3
 >> +	mov	r2, r1		@ Copy the flags in R2
 >> +	mov	r1, #0x0	@ Process ID - 0
 >> +	mov	r6, #0xff	@ Indicate new Task call
 >> +	dsb
 >> +	dmb
 >> +	smc	#1		@ call PPA service
 >> +	ldmfd	sp!, {r4-r12, pc}
 >> +ENDPROC(rx51_ppa_smc)
 >> diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
 >> index 92117a13..fd85081 100644
 >> --- a/arch/arm/mach-omap2/board-rx51.c
 >> +++ b/arch/arm/mach-omap2/board-rx51.c
 >> @@ -31,6 +31,7 @@
 >>  #include "gpmc.h"
 >>  #include "pm.h"
 >>  #include "sdram-nokia.h"
 >> +#include "board-rx51-secure.h"
 >>  
 >>  #define RX51_GPIO_SLEEP_IND 162
 >>  
 >> @@ -103,6 +104,12 @@ static void __init rx51_init(void)
 >>  	rx51_peripherals_init();
 >>  	rx51_camera_init();
 >>  
 >> +#ifdef CONFIG_ARM_ERRATA_430973
 >> +	printk(KERN_INFO "Enabling ARM errata 430973 workaround.\n");
 >> +	/* set IBE to 1 */
 >> +	rx51_secure_update_aux_cr(1 << 6, 0);
 >> +#endif
 >> +
 >>  	/* Ensure SDRC pins are mux'd for self-refresh */
 >>  	omap_mux_init_signal(&quot;sdrc_cke0&quot;, OMAP_PIN_OUTPUT);
 >>  	omap_mux_init_signal(&quot;sdrc_cke1&quot;, OMAP_PIN_OUTPUT);
 >> -- 
 >> 1.7.10.4
 >> 
 >> 
 >> _______________________________________________
 >> linux-arm-kernel mailing list
 >> linux-arm-kernel@lists.infradead.org
 >> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
 >
 >-- 
 >Regards,
 >Nishanth Menon
 >

Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Nishanth Menon]

On Fri, Mar 1, 2013 at 1:47 AM, Ивайло Димитров <freemangordon@abv.bg> wrote:
>
> They look similar, but they are not equivalent :). The first major difference is here (code taken from omap-smc.S)
>
>> ENTRY(omap_smc2)
>>          stmfd   sp!, {r4-r12, lr}
>>          mov     r3, r2
>>          mov     r2, r1
>>          mov     r1, #0x0        @ Process ID
>>          mov     r6, #0xff
>>          mov     r12, #0x00      @ Secure Service ID
>
> Always zero, while RX51 PPA expects a real value. I wonder if it is a bug, but anyway I don't see the id parameter (R0) used.
>
>>          mov     r7, #0
>>          mcr     p15, 0, r7, c7, c5, 6
>
> According to ARM TRM, this is "Invalidate entire branch predictor array"(IIUC). NFC why it is needed here, but this will not work on RX-51 until IBE bit in ACR is set.
>
>>          dsb
>>          dmb
>>          smc     #0
>
> RX-51 needs smc #1 ;)
>
>>          ldmfd   sp!, {r4-r12, pc}
>
>
> The next major difference is that RX-51 expects parameter count passed in R3[0] to be the count of the remaining parameters +1, but omap_secure_dispatcher (in omap-secure.c) is passing the exact count of the remaining parameters.
>
> I guess all of the above problems can be fixed/workarounded, but I wonder does it worth. Not to say that I don't have BB around to test if the code still works if I make changes to omap2-secure.c/omap-smc.S :)
>
>

Yep, that was my point - instead of introducing new functions,
extending the existing functions to handle new requirements is better
solution, IMHO.

Regards,
Nishanth Menon

Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Tony Lindgren]

* Nishanth Menon <nm@ti.com> [130301 06:42]:
> On Fri, Mar 1, 2013 at 1:47 AM, Ивайло Димитров <freemangordon@abv.bg> wrote:
> >
> > They look similar, but they are not equivalent :). The first major difference is here (code taken from omap-smc.S)
> >
> >> ENTRY(omap_smc2)
> >>          stmfd   sp!, {r4-r12, lr}
> >>          mov     r3, r2
> >>          mov     r2, r1
> >>          mov     r1, #0x0        @ Process ID
> >>          mov     r6, #0xff
> >>          mov     r12, #0x00      @ Secure Service ID
> >
> > Always zero, while RX51 PPA expects a real value. I wonder if it is a bug, but anyway I don't see the id parameter (R0) used.
> >
> >>          mov     r7, #0
> >>          mcr     p15, 0, r7, c7, c5, 6
> >
> > According to ARM TRM, this is "Invalidate entire branch predictor array"(IIUC). NFC why it is needed here, but this will not work on RX-51 until IBE bit in ACR is set.
> >
> >>          dsb
> >>          dmb
> >>          smc     #0
> >
> > RX-51 needs smc #1 ;)
> >
> >>          ldmfd   sp!, {r4-r12, pc}
> >
> >
> > The next major difference is that RX-51 expects parameter count passed in R3[0] to be the count of the remaining parameters +1, but omap_secure_dispatcher (in omap-secure.c) is passing the exact count of the remaining parameters.
> >
> > I guess all of the above problems can be fixed/workarounded, but I wonder does it worth. Not to say that I don't have BB around to test if the code still works if I make changes to omap2-secure.c/omap-smc.S :)
> >
> >
> 
> Yep, that was my point - instead of introducing new functions,
> extending the existing functions to handle new requirements is better
> solution, IMHO.

I think there have been patches posted for ARM generic SMC
handling. Might be worth looking at those a bit and see if
this can be made generic. I think only the SMC call numbering
is different for various SoCs?

Regards,

Tony

Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Pali Rohár]

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On Monday 04 March 2013 19:58:06 Tony Lindgren wrote:
> * Nishanth Menon <nm@ti.com> [130301 06:42]:
> > On Fri, Mar 1, 2013 at 1:47 AM, Ивайло Димитров 
<freemangordon@abv.bg> wrote:
> > > They look similar, but they are not equivalent :). The
> > > first major difference is here (code taken from
> > > omap-smc.S)
> > > 
> > >> ENTRY(omap_smc2)
> > >> 
> > >>          stmfd   sp!, {r4-r12, lr}
> > >>          mov     r3, r2
> > >>          mov     r2, r1
> > >>          mov     r1, #0x0        @ Process ID
> > >>          mov     r6, #0xff
> > >>          mov     r12, #0x00      @ Secure Service ID
> > > 
> > > Always zero, while RX51 PPA expects a real value. I wonder
> > > if it is a bug, but anyway I don't see the id parameter
> > > (R0) used.
> > > 
> > >>          mov     r7, #0
> > >>          mcr     p15, 0, r7, c7, c5, 6
> > > 
> > > According to ARM TRM, this is "Invalidate entire branch
> > > predictor array"(IIUC). NFC why it is needed here, but
> > > this will not work on RX-51 until IBE bit in ACR is set.
> > > 
> > >>          dsb
> > >>          dmb
> > >>          smc     #0
> > > 
> > > RX-51 needs smc #1 ;)
> > > 
> > >>          ldmfd   sp!, {r4-r12, pc}
> > > 
> > > The next major difference is that RX-51 expects parameter
> > > count passed in R3[0] to be the count of the remaining
> > > parameters +1, but omap_secure_dispatcher (in
> > > omap-secure.c) is passing the exact count of the
> > > remaining parameters.
> > > 
> > > I guess all of the above problems can be
> > > fixed/workarounded, but I wonder does it worth. Not to
> > > say that I don't have BB around to test if the code still
> > > works if I make changes to omap2-secure.c/omap-smc.S :)
> > 
> > Yep, that was my point - instead of introducing new
> > functions, extending the existing functions to handle new
> > requirements is better solution, IMHO.
> 
> I think there have been patches posted for ARM generic SMC
> handling. Might be worth looking at those a bit and see if
> this can be made generic. I think only the SMC call numbering
> is different for various SoCs?
> 
> Regards,
> 
> Tony

Hi Tony, where are patches for ARM generic SMC handling?

-- 
Pali Rohár
pali.rohar@gmail.com

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Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Tony Lindgren]

* Pali Rohár <pali.rohar@gmail.com> [130306 06:13]:
> On Monday 04 March 2013 19:58:06 Tony Lindgren wrote:
> > * Nishanth Menon <nm@ti.com> [130301 06:42]:
> > > On Fri, Mar 1, 2013 at 1:47 AM, Ивайло Димитров 
> <freemangordon@abv.bg> wrote:
> > > > They look similar, but they are not equivalent :). The
> > > > first major difference is here (code taken from
> > > > omap-smc.S)
> > > > 
> > > >> ENTRY(omap_smc2)
> > > >> 
> > > >>          stmfd   sp!, {r4-r12, lr}
> > > >>          mov     r3, r2
> > > >>          mov     r2, r1
> > > >>          mov     r1, #0x0        @ Process ID
> > > >>          mov     r6, #0xff
> > > >>          mov     r12, #0x00      @ Secure Service ID
> > > > 
> > > > Always zero, while RX51 PPA expects a real value. I wonder
> > > > if it is a bug, but anyway I don't see the id parameter
> > > > (R0) used.
> > > > 
> > > >>          mov     r7, #0
> > > >>          mcr     p15, 0, r7, c7, c5, 6
> > > > 
> > > > According to ARM TRM, this is "Invalidate entire branch
> > > > predictor array"(IIUC). NFC why it is needed here, but
> > > > this will not work on RX-51 until IBE bit in ACR is set.
> > > > 
> > > >>          dsb
> > > >>          dmb
> > > >>          smc     #0
> > > > 
> > > > RX-51 needs smc #1 ;)
> > > > 
> > > >>          ldmfd   sp!, {r4-r12, pc}
> > > > 
> > > > The next major difference is that RX-51 expects parameter
> > > > count passed in R3[0] to be the count of the remaining
> > > > parameters +1, but omap_secure_dispatcher (in
> > > > omap-secure.c) is passing the exact count of the
> > > > remaining parameters.
> > > > 
> > > > I guess all of the above problems can be
> > > > fixed/workarounded, but I wonder does it worth. Not to
> > > > say that I don't have BB around to test if the code still
> > > > works if I make changes to omap2-secure.c/omap-smc.S :)
> > > 
> > > Yep, that was my point - instead of introducing new
> > > functions, extending the existing functions to handle new
> > > requirements is better solution, IMHO.
> > 
> > I think there have been patches posted for ARM generic SMC
> > handling. Might be worth looking at those a bit and see if
> > this can be made generic. I think only the SMC call numbering
> > is different for various SoCs?
> > 
> > Regards,
> > 
> > Tony
> 
> Hi Tony, where are patches for ARM generic SMC handling?

Sorry don't have the link available, but I recall seeing some patch
on linux-arm-kernel within past six months that added a generic
smc function.. Or maybe I was dreaming or something.

Regards,

Tony

Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Pali Rohár]

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On Wednesday 06 March 2013 18:51:21 Tony Lindgren wrote:
> * Pali Rohár <pali.rohar@gmail.com> [130306 06:13]:
> > On Monday 04 March 2013 19:58:06 Tony Lindgren wrote:
> > > * Nishanth Menon <nm@ti.com> [130301 06:42]:
> > > > On Fri, Mar 1, 2013 at 1:47 AM, Ивайло Димитров
> > 
> > <freemangordon@abv.bg> wrote:
> > > > > They look similar, but they are not equivalent :). The
> > > > > first major difference is here (code taken from
> > > > > omap-smc.S)
> > > > > 
> > > > >> ENTRY(omap_smc2)
> > > > >> 
> > > > >>          stmfd   sp!, {r4-r12, lr}
> > > > >>          mov     r3, r2
> > > > >>          mov     r2, r1
> > > > >>          mov     r1, #0x0        @ Process ID
> > > > >>          mov     r6, #0xff
> > > > >>          mov     r12, #0x00      @ Secure Service ID
> > > > > 
> > > > > Always zero, while RX51 PPA expects a real value. I
> > > > > wonder if it is a bug, but anyway I don't see the id
> > > > > parameter (R0) used.
> > > > > 
> > > > >>          mov     r7, #0
> > > > >>          mcr     p15, 0, r7, c7, c5, 6
> > > > > 
> > > > > According to ARM TRM, this is "Invalidate entire
> > > > > branch predictor array"(IIUC). NFC why it is needed
> > > > > here, but this will not work on RX-51 until IBE bit
> > > > > in ACR is set.
> > > > > 
> > > > >>          dsb
> > > > >>          dmb
> > > > >>          smc     #0
> > > > > 
> > > > > RX-51 needs smc #1 ;)
> > > > > 
> > > > >>          ldmfd   sp!, {r4-r12, pc}
> > > > > 
> > > > > The next major difference is that RX-51 expects
> > > > > parameter count passed in R3[0] to be the count of
> > > > > the remaining parameters +1, but
> > > > > omap_secure_dispatcher (in omap-secure.c) is passing
> > > > > the exact count of the remaining parameters.
> > > > > 
> > > > > I guess all of the above problems can be
> > > > > fixed/workarounded, but I wonder does it worth. Not to
> > > > > say that I don't have BB around to test if the code
> > > > > still works if I make changes to
> > > > > omap2-secure.c/omap-smc.S :)
> > > > 
> > > > Yep, that was my point - instead of introducing new
> > > > functions, extending the existing functions to handle
> > > > new requirements is better solution, IMHO.
> > > 
> > > I think there have been patches posted for ARM generic SMC
> > > handling. Might be worth looking at those a bit and see if
> > > this can be made generic. I think only the SMC call
> > > numbering is different for various SoCs?
> > > 
> > > Regards,
> > > 
> > > Tony
> > 
> > Hi Tony, where are patches for ARM generic SMC handling?
> 
> Sorry don't have the link available, but I recall seeing some
> patch on linux-arm-kernel within past six months that added a
> generic smc function.. Or maybe I was dreaming or something.
> 
> Regards,
> 
> Tony

I am not able to find that patch...

-- 
Pali Rohár
pali.rohar@gmail.com

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Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Pali Rohár]

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On Wednesday 06 March 2013 20:13:15 Pali Rohár wrote:
> On Wednesday 06 March 2013 18:51:21 Tony Lindgren wrote:
> > * Pali Rohár <pali.rohar@gmail.com> [130306 06:13]:
> > > On Monday 04 March 2013 19:58:06 Tony Lindgren wrote:
> > > > * Nishanth Menon <nm@ti.com> [130301 06:42]:
> > > > > On Fri, Mar 1, 2013 at 1:47 AM, Ивайло Димитров
> > > 
> > > <freemangordon@abv.bg> wrote:
> > > > > > They look similar, but they are not equivalent :).
> > > > > > The first major difference is here (code taken from
> > > > > > omap-smc.S)
> > > > > > 
> > > > > >> ENTRY(omap_smc2)
> > > > > >> 
> > > > > >>          stmfd   sp!, {r4-r12, lr}
> > > > > >>          mov     r3, r2
> > > > > >>          mov     r2, r1
> > > > > >>          mov     r1, #0x0        @ Process ID
> > > > > >>          mov     r6, #0xff
> > > > > >>          mov     r12, #0x00      @ Secure Service
> > > > > >>          ID
> > > > > > 
> > > > > > Always zero, while RX51 PPA expects a real value. I
> > > > > > wonder if it is a bug, but anyway I don't see the id
> > > > > > parameter (R0) used.
> > > > > > 
> > > > > >>          mov     r7, #0
> > > > > >>          mcr     p15, 0, r7, c7, c5, 6
> > > > > > 
> > > > > > According to ARM TRM, this is "Invalidate entire
> > > > > > branch predictor array"(IIUC). NFC why it is needed
> > > > > > here, but this will not work on RX-51 until IBE bit
> > > > > > in ACR is set.
> > > > > > 
> > > > > >>          dsb
> > > > > >>          dmb
> > > > > >>          smc     #0
> > > > > > 
> > > > > > RX-51 needs smc #1 ;)
> > > > > > 
> > > > > >>          ldmfd   sp!, {r4-r12, pc}
> > > > > > 
> > > > > > The next major difference is that RX-51 expects
> > > > > > parameter count passed in R3[0] to be the count of
> > > > > > the remaining parameters +1, but
> > > > > > omap_secure_dispatcher (in omap-secure.c) is passing
> > > > > > the exact count of the remaining parameters.
> > > > > > 
> > > > > > I guess all of the above problems can be
> > > > > > fixed/workarounded, but I wonder does it worth. Not
> > > > > > to say that I don't have BB around to test if the
> > > > > > code still works if I make changes to
> > > > > > omap2-secure.c/omap-smc.S :)
> > > > > 
> > > > > Yep, that was my point - instead of introducing new
> > > > > functions, extending the existing functions to handle
> > > > > new requirements is better solution, IMHO.
> > > > 
> > > > I think there have been patches posted for ARM generic
> > > > SMC handling. Might be worth looking at those a bit and
> > > > see if this can be made generic. I think only the SMC
> > > > call numbering is different for various SoCs?
> > > > 
> > > > Regards,
> > > > 
> > > > Tony
> > > 
> > > Hi Tony, where are patches for ARM generic SMC handling?
> > 
> > Sorry don't have the link available, but I recall seeing
> > some patch on linux-arm-kernel within past six months that
> > added a generic smc function.. Or maybe I was dreaming or
> > something.
> > 
> > Regards,
> > 
> > Tony
> 
> I am not able to find that patch...

Hi Tony,

it is possible to upstream errata 430973 workaround for RX-51?

-- 
Pali Rohár
pali.rohar@gmail.com

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Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Tony Lindgren]

* Pali Rohár <pali.rohar@gmail.com> [130324 07:31]:
> it is possible to upstream errata 430973 workaround for RX-51?

I think we should make the SMC handling a generic function for ARM.

AFAIK just the SMC call numbering is different for various
implementations. So the handler and passing of the parameters
seems like it should be generic.

Regards,

Tony

Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Pali Rohár]

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On Wednesday 27 March 2013 21:56:07 Tony Lindgren wrote:
> * Pali Rohár <pali.rohar@gmail.com> [130324 07:31]:
> > it is possible to upstream errata 430973 workaround for
> > RX-51?
> 
> I think we should make the SMC handling a generic function for
> ARM.
> 
> AFAIK just the SMC call numbering is different for various
> implementations. So the handler and passing of the parameters
> seems like it should be generic.
> 

Not only, look at freemangordon's email: 
https://lkml.org/lkml/2013/3/1/62

> Regards,
> 
> Tony

-- 
Pali Rohár
pali.rohar@gmail.com

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Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Tony Lindgren]

* Pali Rohár <pali.rohar@gmail.com> [130327 14:09]:
> On Wednesday 27 March 2013 21:56:07 Tony Lindgren wrote:
> > * Pali Rohár <pali.rohar@gmail.com> [130324 07:31]:
> > > it is possible to upstream errata 430973 workaround for
> > > RX-51?
> > 
> > I think we should make the SMC handling a generic function for
> > ARM.
> > 
> > AFAIK just the SMC call numbering is different for various
> > implementations. So the handler and passing of the parameters
> > seems like it should be generic.
> > 
> 
> Not only, look at freemangordon's email: 
> https://lkml.org/lkml/2013/3/1/62

Seem like you may need some SoC specific wrapper to the
generic function to deal with the params. But still seems
like we can have an ARM generic smc funtion.

Regards,

Tony

Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Russell King - ARM Linux]

On Wed, Mar 27, 2013 at 01:56:07PM -0700, Tony Lindgren wrote:
> * Pali Rohár <pali.rohar@gmail.com> [130324 07:31]:
> > it is possible to upstream errata 430973 workaround for RX-51?
> 
> I think we should make the SMC handling a generic function for ARM.
> 
> AFAIK just the SMC call numbering is different for various
> implementations. So the handler and passing of the parameters
> seems like it should be generic.

SMC calls vary greatly in how they are handled.  The only thing that's
generic is issuing the SMC call.  All the setup and what arguments are
required are completely different from SoC to SoC.

For example, some SoCs require arguments passed via memory.  Others like
OMAP its via registers.

Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Santosh Shilimkar]

On Thursday 28 March 2013 03:20 PM, Russell King - ARM Linux wrote:
> On Wed, Mar 27, 2013 at 01:56:07PM -0700, Tony Lindgren wrote:
>> * Pali Rohár <pali.rohar@gmail.com> [130324 07:31]:
>>> it is possible to upstream errata 430973 workaround for RX-51?
>>
>> I think we should make the SMC handling a generic function for ARM.
>>
>> AFAIK just the SMC call numbering is different for various
>> implementations. So the handler and passing of the parameters
>> seems like it should be generic.
> 
> SMC calls vary greatly in how they are handled.  The only thing that's
> generic is issuing the SMC call.  All the setup and what arguments are
> required are completely different from SoC to SoC.
> 
> For example, some SoCs require arguments passed via memory.  Others like
> OMAP its via registers.

Exactly. As somebody said on the list, that code looks identical but
it is not. An SMC with barrier instruction is mostly common and nothing
more than that.

Regards,
Santosh

Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Tony Lindgren]

* Santosh Shilimkar <santosh.shilimkar@ti.com> [130328 03:10]:
> On Thursday 28 March 2013 03:20 PM, Russell King - ARM Linux wrote:
> > On Wed, Mar 27, 2013 at 01:56:07PM -0700, Tony Lindgren wrote:
> >> * Pali Rohár <pali.rohar@gmail.com> [130324 07:31]:
> >>> it is possible to upstream errata 430973 workaround for RX-51?
> >>
> >> I think we should make the SMC handling a generic function for ARM.
> >>
> >> AFAIK just the SMC call numbering is different for various
> >> implementations. So the handler and passing of the parameters
> >> seems like it should be generic.
> > 
> > SMC calls vary greatly in how they are handled.  The only thing that's
> > generic is issuing the SMC call.  All the setup and what arguments are
> > required are completely different from SoC to SoC.
> > 
> > For example, some SoCs require arguments passed via memory.  Others like
> > OMAP its via registers.
> 
> Exactly. As somebody said on the list, that code looks identical but
> it is not. An SMC with barrier instruction is mostly common and nothing
> more than that.

Thanks all, case closed then. There's no way to come up with a generic
SMC function.

Regards,

Tony

Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Ивайло Димитров]

 
Hi,

 >-------- Оригинално писмо --------
 >От:  Pavel Machek 
 >Относно: Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround
 >До: Pali Rohár 
 >Изпратено на: Събота, 2013, Март 30 20:36:54 EET
 >
 >
 >Hi!
 >
 >> +u32 rx51_secure_dispatcher(u32 idx, u32 flag, u32 nargs, u32 arg1, u32 arg2,
 >> +			   u32 arg3, u32 arg4)
 >> +{
 >> +	u32 ret;
 >> +	u32 param[5];
 >> +
 >> +	param[0] = nargs+1;
 >> +	param[1] = arg1;
 >> +	param[2] = arg2;
 >> +	param[3] = arg3;
 >> +	param[4] = arg4;
 >> +
 >> +	/*
 >> +	 * Secure API needs physical address
 >> +	 * pointer for the parameters
 >> +	 */
 >> +	flush_cache_all();
 >> +	outer_clean_range(__pa(param), __pa(param + 5));
 >> +	ret = rx51_ppa_smc(idx, flag, __pa(param));
 >> +
 >> +	return ret;
 >> +}
 >
 >You can do without ret variable... Also more detailed changelog would
 >be nice... like what exact problem this works around.
 >

Sure i can, but I don't see a reason to ignore SM's return value. Changelog of what?
 >
 >
 >So... some CPU errata where code sharing virtual addresses could be
 >executed improperly?
 >								
 >> @@ -103,6 +104,12 @@ static void __init rx51_init(void)
 >>  	rx51_peripherals_init();
 >>  	rx51_camera_init();
 >>  
 >> +#ifdef CONFIG_ARM_ERRATA_430973
 >> +	printk(KERN_INFO "Enabling ARM errata 430973 workaround.\n");
 >> +	/* set IBE to 1 */
 >> +	rx51_secure_update_aux_cr(1 << 6, 0);
 >> +#endif
 >> +
 >
 >Thanks,
 >								Pavel
 >
 >-- 
 >(english) http://www.livejournal.com/~pavelmachek
 >(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
 >

I guess if you read the thread over the ML you'll have your questions already answered. 
Or google for "ARM errata 430973 workaround" :).

Regards,
Ivo

Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Pavel Machek]

Hi!

>  >You can do without ret variable... Also more detailed changelog would
>  >be nice... like what exact problem this works around.
>  >
> 
> Sure i can, but I don't see a reason to ignore SM's return value. Changelog of what?
> 
> I guess if you read the thread over the ML you'll have your questions already answered. 
> Or google for "ARM errata 430973 workaround" :).

I did my googling. But I should not have had to. Just put the
explanatory link in commit log.
									Pavel
-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Ивайло Димитров]

 Tony,

Who do you expect to make that code merge? Do you expect us to mechanically merge RX51 PPA API patch with the existing generic OMAP PPA API code putting #ifdefs all over the place? Not that it is impossible, but the only real piece of HW I have here is n900, so I just can't be sure the code will still work on the other platforms besides RX51, once the code modified. Please, advice on how to proceed.

Regards,
Ivo

 >-------- Оригинално писмо --------
 >От:  Tony Lindgren 
 >Относно: Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround
 >До: Pali Rohár 
 >Изпратено на: Сряда, 2013, Март 27 23:12:09 EET
 >
 >
 >* Pali Rohár  [130327 14:09]:
 >> On Wednesday 27 March 2013 21:56:07 Tony Lindgren wrote:
 >> > * Pali Rohár  [130324 07:31]:
 >> > > it is possible to upstream errata 430973 workaround for
 >> > > RX-51?
 >> > 
 >> > I think we should make the SMC handling a generic function for
 >> > ARM.
 >> > 
 >> > AFAIK just the SMC call numbering is different for various
 >> > implementations. So the handler and passing of the parameters
 >> > seems like it should be generic.
 >> > 
 >> 
 >> Not only, look at freemangordon's email: 
 >> https://lkml.org/lkml/2013/3/1/62
 >
 >Seem like you may need some SoC specific wrapper to the
 >generic function to deal with the params. But still seems
 >like we can have an ARM generic smc funtion.
 >
 >Regards,
 >
 >Tony
 >

Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Tony Lindgren]

* Ивайло Димитров <freemangordon@abv.bg> [130327 22:34]:
>  Tony,
> 
> Who do you expect to make that code merge? Do you expect us to mechanically merge RX51 PPA API patch with the existing generic OMAP PPA API code putting #ifdefs all over the place? Not that it is impossible, but the only real piece of HW I have here is n900, so I just can't be sure the code will still work on the other platforms besides RX51, once the code modified. Please, advice on how to proceed.

Probably ifdefs won't work nice for other omapss. It seems that
your original patch is pretty close based on all that's been
discussed. Can you please repost with a proper patch description
also summarizing why we cannot have generci SMC API as discussed?

Thanks,

Tony

Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Ивайло Димитров]

 




 >-------- Оригинално писмо --------
 >От:  Aaro Koskinen 
 >Относно: Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround
 >До: Ивайло Димитров 
 >Изпратено на: Събота, 2013, Март 2 01:51:39 EET
 >
 >
 >On Fri, Mar 01, 2013 at 12:09:12PM +0200, Ивайло Димитров wrote:
 >> Unfortunately it is necessary, on RX-51 PPA/NOLO leaves IBE bit unset.
 >
 >You sure? I think you need to explain this more - the commit message in
 >the original patch is empty/missing...
 >
 >A.
 >

Yes, I am sure, NOLO leaves IBE bit in ACR unset, I've verified that by reading/printing the contents of ACR from both u-boot and the kernel itself. With IBE bit unset, "mcr p15, 0, rX, c7, c5, 6" - flush BTAC/BTB instruction(which is needed to workaround errata 430973) is a noop.

Yes, I am sure, IBE but must be set by using a call to PPA, on RX-51 setting that bit from the kernel (as it is done in the "ARM errata: Stale prediction on replaced interworking branch" kernel patch, see http://kerneltrap.org/mailarchive/git-commits-head/2009/5/3/5622724) does not work, see the comment at the end: "Note that setting specific bits in the ACTLR register may not be available in non-secure mode.". This is exactly the case for RX-51. I've verified that too.

If you need anything else elaborated on, I'm fine, just ask :)


Regards,
Ivo

Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Ивайло Димитров]

 
Unfortunately it is necessary, on RX-51 PPA/NOLO leaves IBE bit unset.


 >-------- Оригинално писмо --------
 >От:  Peter De Schrijver 
 >Относно: Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround
 >До: Pali Rohár 
 >Изпратено на: Петък, 2013, Март 1 11:43:14 EET
 >
 >
 >On Thu, Feb 28, 2013 at 10:42:28AM +0100, Pali Rohár wrote:
 >> Signed-off-by: Ivaylo Dimitrov 
 >> Signed-off-by: Pali Rohár 
 >> ---
 >>  arch/arm/mach-omap2/Makefile            |    1 +
 >>  arch/arm/mach-omap2/board-rx51-secure.c |   66 +++++++++++++++++++++++++++++++
 >>  arch/arm/mach-omap2/board-rx51-secure.h |   36 +++++++++++++++++
 >>  arch/arm/mach-omap2/board-rx51-smc.S    |   34 ++++++++++++++++
 >>  arch/arm/mach-omap2/board-rx51.c        |    7 ++++
 >>  5 files changed, 144 insertions(+)
 >>  create mode 100644 arch/arm/mach-omap2/board-rx51-secure.c
 >>  create mode 100644 arch/arm/mach-omap2/board-rx51-secure.h
 >>  create mode 100644 arch/arm/mach-omap2/board-rx51-smc.S
 >> 
 >
 >Is this necessary? I thought the PPA sets this bit?
 >
 >Cheers,
 >
 >Peter.
 >

Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Aaro Koskinen]

On Fri, Mar 01, 2013 at 12:09:12PM +0200, Ивайло Димитров wrote:
> Unfortunately it is necessary, on RX-51 PPA/NOLO leaves IBE bit unset.

You sure? I think you need to explain this more - the commit message in
the original patch is empty/missing...

A.

[PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Pali Rohár]

Signed-off-by: Ivaylo Dimitrov <freemangordon@abv.bg>
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
---
 arch/arm/mach-omap2/Makefile            |    1 +
 arch/arm/mach-omap2/board-rx51-secure.c |   66 +++++++++++++++++++++++++++++++
 arch/arm/mach-omap2/board-rx51-secure.h |   36 +++++++++++++++++
 arch/arm/mach-omap2/board-rx51-smc.S    |   34 ++++++++++++++++
 arch/arm/mach-omap2/board-rx51.c        |    7 ++++
 5 files changed, 144 insertions(+)
 create mode 100644 arch/arm/mach-omap2/board-rx51-secure.c
 create mode 100644 arch/arm/mach-omap2/board-rx51-secure.h
 create mode 100644 arch/arm/mach-omap2/board-rx51-smc.S

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 0ebbdd50..8eb4fb4 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -241,6 +241,7 @@ obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51.o sdram-nokia.o
 obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51-peripherals.o
 obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51-video.o
 obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51-camera.o
+obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51-smc.o board-rx51-secure.o
 obj-$(CONFIG_MACH_OMAP_ZOOM2)		+= board-zoom.o board-zoom-peripherals.o
 obj-$(CONFIG_MACH_OMAP_ZOOM2)		+= board-zoom-display.o
 obj-$(CONFIG_MACH_OMAP_ZOOM2)		+= board-zoom-debugboard.o
diff --git a/arch/arm/mach-omap2/board-rx51-secure.c b/arch/arm/mach-omap2/board-rx51-secure.c
new file mode 100644
index 0000000..361dc78
--- /dev/null
+++ b/arch/arm/mach-omap2/board-rx51-secure.c
@@ -0,0 +1,66 @@
+/*
+ * RX51 Secure PPA API.
+ *
+ * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
+ *
+ *
+ * This program is free software,you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <asm/cacheflush.h>
+
+#include "board-rx51-secure.h"
+
+/**
+ * rx51_secure_dispatcher: Routine to dispatch secure PPA API calls
+ * @idx: The PPA API index
+ * @flag: The flag indicating criticality of operation
+ * @nargs: Number of valid arguments out of four.
+ * @arg1, arg2, arg3 args4: Parameters passed to secure API
+ *
+ * Return the non-zero error value on failure.
+ */
+u32 rx51_secure_dispatcher(u32 idx, u32 flag, u32 nargs, u32 arg1, u32 arg2,
+			   u32 arg3, u32 arg4)
+{
+	u32 ret;
+	u32 param[5];
+
+	param[0] = nargs+1;
+	param[1] = arg1;
+	param[2] = arg2;
+	param[3] = arg3;
+	param[4] = arg4;
+
+	/*
+	 * Secure API needs physical address
+	 * pointer for the parameters
+	 */
+	flush_cache_all();
+	outer_clean_range(__pa(param), __pa(param + 5));
+	ret = rx51_ppa_smc(idx, flag, __pa(param));
+
+	return ret;
+}
+
+/**
+ * rx51_secure_update_aux_cr: Routine to modify the contents of Auxiliary Control Register
+ *  @set_bits: bits to set in ACR
+ *  @clr_bits: bits to clear in ACR
+ *
+ * Return the non-zero error value on failure.
+*/
+u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits)
+{
+	u32 acr;
+
+	/* Read ACR */
+	asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
+	acr &= ~clear_bits;
+	acr |= set_bits;
+
+	return rx51_secure_dispatcher(RX51_PPA_WRITE_ACR,
+			       FLAG_START_CRITICAL,
+			       1,acr,0,0,0);
+}
diff --git a/arch/arm/mach-omap2/board-rx51-secure.h b/arch/arm/mach-omap2/board-rx51-secure.h
new file mode 100644
index 0000000..61c760b
--- /dev/null
+++ b/arch/arm/mach-omap2/board-rx51-secure.h
@@ -0,0 +1,36 @@
+/*
+ * board-rx51-secure.h: OMAP Secure infrastructure header.
+ *
+ * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef OMAP_RX51_SECURE_H
+#define OMAP_RX51_SECURE_H
+
+/* HAL API error codes */
+#define  API_HAL_RET_VALUE_OK           0x00
+#define  API_HAL_RET_VALUE_FAIL         0x01
+
+/* Secure HAL API flags */
+#define FLAG_START_CRITICAL             0x4
+#define FLAG_IRQFIQ_MASK                0x3
+#define FLAG_IRQ_ENABLE                 0x2
+#define FLAG_FIQ_ENABLE                 0x1
+#define NO_FLAG                         0x0
+
+/* Secure PPA(Primary Protected Application) APIs */
+#define RX51_PPA_L2_INVAL               40
+#define RX51_PPA_WRITE_ACR              42
+
+#ifndef __ASSEMBLER__
+
+extern u32 rx51_secure_dispatcher(u32 idx, u32 flag, u32 nargs,
+                                u32 arg1, u32 arg2, u32 arg3, u32 arg4);
+extern u32 rx51_ppa_smc(u32 id, u32 flag, u32 pargs);
+
+extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits);
+#endif /* __ASSEMBLER__ */
+#endif /* OMAP_RX51_SECURE_H */
diff --git a/arch/arm/mach-omap2/board-rx51-smc.S b/arch/arm/mach-omap2/board-rx51-smc.S
new file mode 100644
index 0000000..70e2eb7
--- /dev/null
+++ b/arch/arm/mach-omap2/board-rx51-smc.S
@@ -0,0 +1,34 @@
+/*
+ * RX51 secure APIs file.
+ *
+ * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
+ *
+ *
+ * This program is free software,you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/linkage.h>
+
+/**
+ * u32 rx51_ppa_smc(u32 id, u32 flag, u32 pargs)
+ * Low level common routine for secure HAL and PPA APIs.
+ * @id: Secure Service ID
+ * @flag: Flag to indicate the criticality of operation
+ * @pargs: Physical address of parameter list starting
+ *          with number of parametrs
+ */
+ENTRY(rx51_ppa_smc)
+	.arch_extension sec
+	stmfd	sp!, {r4-r12, lr}
+	mov	r12, r0		@ Copy the secure service ID
+	mov	r3, r2		@ Copy the pointer to va_list in R3
+	mov	r2, r1		@ Copy the flags in R2
+	mov	r1, #0x0	@ Process ID - 0
+	mov	r6, #0xff	@ Indicate new Task call
+	dsb
+	dmb
+	smc	#1		@ call PPA service
+	ldmfd	sp!, {r4-r12, pc}
+ENDPROC(rx51_ppa_smc)
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 92117a13..fd85081 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -31,6 +31,7 @@
 #include "gpmc.h"
 #include "pm.h"
 #include "sdram-nokia.h"
+#include "board-rx51-secure.h"
 
 #define RX51_GPIO_SLEEP_IND 162
 
@@ -103,6 +104,12 @@ static void __init rx51_init(void)
 	rx51_peripherals_init();
 	rx51_camera_init();
 
+#ifdef CONFIG_ARM_ERRATA_430973
+	printk(KERN_INFO "Enabling ARM errata 430973 workaround.\n");
+	/* set IBE to 1 */
+	rx51_secure_update_aux_cr(1 << 6, 0);
+#endif
+
 	/* Ensure SDRC pins are mux'd for self-refresh */
 	omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
 	omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
-- 
1.7.10.4

Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Nishanth Menon]

On 10:42-20130228, Pali Rohár wrote:
> Signed-off-by: Ivaylo Dimitrov <freemangordon@abv.bg>
> Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
> ---
>  arch/arm/mach-omap2/Makefile            |    1 +
>  arch/arm/mach-omap2/board-rx51-secure.c |   66 +++++++++++++++++++++++++++++++
>  arch/arm/mach-omap2/board-rx51-secure.h |   36 +++++++++++++++++
>  arch/arm/mach-omap2/board-rx51-smc.S    |   34 ++++++++++++++++
>  arch/arm/mach-omap2/board-rx51.c        |    7 ++++

Wondering if we can integrate these into 
arch/arm/mach-omap2/omap-smc.S
and
arch/arm/mach-omap2/omap-secure.c
on a quick look, it does seem there are commonalities.

>  5 files changed, 144 insertions(+)
>  create mode 100644 arch/arm/mach-omap2/board-rx51-secure.c
>  create mode 100644 arch/arm/mach-omap2/board-rx51-secure.h
>  create mode 100644 arch/arm/mach-omap2/board-rx51-smc.S
> 
> diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
> index 0ebbdd50..8eb4fb4 100644
> --- a/arch/arm/mach-omap2/Makefile
> +++ b/arch/arm/mach-omap2/Makefile
> @@ -241,6 +241,7 @@ obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51.o sdram-nokia.o
>  obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51-peripherals.o
>  obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51-video.o
>  obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51-camera.o
> +obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51-smc.o board-rx51-secure.o
>  obj-$(CONFIG_MACH_OMAP_ZOOM2)		+= board-zoom.o board-zoom-peripherals.o
>  obj-$(CONFIG_MACH_OMAP_ZOOM2)		+= board-zoom-display.o
>  obj-$(CONFIG_MACH_OMAP_ZOOM2)		+= board-zoom-debugboard.o
> diff --git a/arch/arm/mach-omap2/board-rx51-secure.c b/arch/arm/mach-omap2/board-rx51-secure.c
> new file mode 100644
> index 0000000..361dc78
> --- /dev/null
> +++ b/arch/arm/mach-omap2/board-rx51-secure.c
> @@ -0,0 +1,66 @@
> +/*
> + * RX51 Secure PPA API.
> + *
> + * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
> + *
> + *
> + * This program is free software,you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#include <asm/cacheflush.h>
> +
> +#include "board-rx51-secure.h"
> +
> +/**
> + * rx51_secure_dispatcher: Routine to dispatch secure PPA API calls
> + * @idx: The PPA API index
> + * @flag: The flag indicating criticality of operation
> + * @nargs: Number of valid arguments out of four.
> + * @arg1, arg2, arg3 args4: Parameters passed to secure API
> + *
> + * Return the non-zero error value on failure.
> + */
> +u32 rx51_secure_dispatcher(u32 idx, u32 flag, u32 nargs, u32 arg1, u32 arg2,
> +			   u32 arg3, u32 arg4)
> +{
> +	u32 ret;
> +	u32 param[5];
> +
> +	param[0] = nargs+1;
> +	param[1] = arg1;
> +	param[2] = arg2;
> +	param[3] = arg3;
> +	param[4] = arg4;
> +
> +	/*
> +	 * Secure API needs physical address
> +	 * pointer for the parameters
> +	 */
> +	flush_cache_all();
> +	outer_clean_range(__pa(param), __pa(param + 5));
> +	ret = rx51_ppa_smc(idx, flag, __pa(param));
> +
> +	return ret;
> +}
> +
> +/**
> + * rx51_secure_update_aux_cr: Routine to modify the contents of Auxiliary Control Register
> + *  @set_bits: bits to set in ACR
> + *  @clr_bits: bits to clear in ACR
> + *
> + * Return the non-zero error value on failure.
> +*/
> +u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits)
> +{
> +	u32 acr;
> +
> +	/* Read ACR */
> +	asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
> +	acr &= ~clear_bits;
> +	acr |= set_bits;
> +
> +	return rx51_secure_dispatcher(RX51_PPA_WRITE_ACR,
> +			       FLAG_START_CRITICAL,
> +			       1,acr,0,0,0);
> +}
> diff --git a/arch/arm/mach-omap2/board-rx51-secure.h b/arch/arm/mach-omap2/board-rx51-secure.h
> new file mode 100644
> index 0000000..61c760b
> --- /dev/null
> +++ b/arch/arm/mach-omap2/board-rx51-secure.h
> @@ -0,0 +1,36 @@
> +/*
> + * board-rx51-secure.h: OMAP Secure infrastructure header.
> + *
> + * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef OMAP_RX51_SECURE_H
> +#define OMAP_RX51_SECURE_H
> +
> +/* HAL API error codes */
> +#define  API_HAL_RET_VALUE_OK           0x00
> +#define  API_HAL_RET_VALUE_FAIL         0x01
> +
> +/* Secure HAL API flags */
> +#define FLAG_START_CRITICAL             0x4
> +#define FLAG_IRQFIQ_MASK                0x3
> +#define FLAG_IRQ_ENABLE                 0x2
> +#define FLAG_FIQ_ENABLE                 0x1
> +#define NO_FLAG                         0x0
> +
> +/* Secure PPA(Primary Protected Application) APIs */
> +#define RX51_PPA_L2_INVAL               40
> +#define RX51_PPA_WRITE_ACR              42
> +
> +#ifndef __ASSEMBLER__
> +
> +extern u32 rx51_secure_dispatcher(u32 idx, u32 flag, u32 nargs,
> +                                u32 arg1, u32 arg2, u32 arg3, u32 arg4);
> +extern u32 rx51_ppa_smc(u32 id, u32 flag, u32 pargs);
> +
> +extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits);
> +#endif /* __ASSEMBLER__ */
> +#endif /* OMAP_RX51_SECURE_H */
> diff --git a/arch/arm/mach-omap2/board-rx51-smc.S b/arch/arm/mach-omap2/board-rx51-smc.S
> new file mode 100644
> index 0000000..70e2eb7
> --- /dev/null
> +++ b/arch/arm/mach-omap2/board-rx51-smc.S
> @@ -0,0 +1,34 @@
> +/*
> + * RX51 secure APIs file.
> + *
> + * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
> + *
> + *
> + * This program is free software,you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/linkage.h>
> +
> +/**
> + * u32 rx51_ppa_smc(u32 id, u32 flag, u32 pargs)
> + * Low level common routine for secure HAL and PPA APIs.
> + * @id: Secure Service ID
> + * @flag: Flag to indicate the criticality of operation
> + * @pargs: Physical address of parameter list starting
> + *          with number of parametrs
> + */
> +ENTRY(rx51_ppa_smc)
> +	.arch_extension sec
> +	stmfd	sp!, {r4-r12, lr}
> +	mov	r12, r0		@ Copy the secure service ID
> +	mov	r3, r2		@ Copy the pointer to va_list in R3
> +	mov	r2, r1		@ Copy the flags in R2
> +	mov	r1, #0x0	@ Process ID - 0
> +	mov	r6, #0xff	@ Indicate new Task call
> +	dsb
> +	dmb
> +	smc	#1		@ call PPA service
> +	ldmfd	sp!, {r4-r12, pc}
> +ENDPROC(rx51_ppa_smc)
> diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
> index 92117a13..fd85081 100644
> --- a/arch/arm/mach-omap2/board-rx51.c
> +++ b/arch/arm/mach-omap2/board-rx51.c
> @@ -31,6 +31,7 @@
>  #include "gpmc.h"
>  #include "pm.h"
>  #include "sdram-nokia.h"
> +#include "board-rx51-secure.h"
>  
>  #define RX51_GPIO_SLEEP_IND 162
>  
> @@ -103,6 +104,12 @@ static void __init rx51_init(void)
>  	rx51_peripherals_init();
>  	rx51_camera_init();
>  
> +#ifdef CONFIG_ARM_ERRATA_430973
> +	printk(KERN_INFO "Enabling ARM errata 430973 workaround.\n");
> +	/* set IBE to 1 */
> +	rx51_secure_update_aux_cr(1 << 6, 0);
> +#endif
> +
>  	/* Ensure SDRC pins are mux'd for self-refresh */
>  	omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
>  	omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
> -- 
> 1.7.10.4
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

-- 
Regards,
Nishanth Menon

Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Peter De Schrijver]

On Thu, Feb 28, 2013 at 10:42:28AM +0100, Pali Rohár wrote:
> Signed-off-by: Ivaylo Dimitrov <freemangordon@abv.bg>
> Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
> ---
>  arch/arm/mach-omap2/Makefile            |    1 +
>  arch/arm/mach-omap2/board-rx51-secure.c |   66 +++++++++++++++++++++++++++++++
>  arch/arm/mach-omap2/board-rx51-secure.h |   36 +++++++++++++++++
>  arch/arm/mach-omap2/board-rx51-smc.S    |   34 ++++++++++++++++
>  arch/arm/mach-omap2/board-rx51.c        |    7 ++++
>  5 files changed, 144 insertions(+)
>  create mode 100644 arch/arm/mach-omap2/board-rx51-secure.c
>  create mode 100644 arch/arm/mach-omap2/board-rx51-secure.h
>  create mode 100644 arch/arm/mach-omap2/board-rx51-smc.S
> 

Is this necessary? I thought the PPA sets this bit?

Cheers,

Peter.

Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround

[Pavel Machek]

Hi!

> +u32 rx51_secure_dispatcher(u32 idx, u32 flag, u32 nargs, u32 arg1, u32 arg2,
> +			   u32 arg3, u32 arg4)
> +{
> +	u32 ret;
> +	u32 param[5];
> +
> +	param[0] = nargs+1;
> +	param[1] = arg1;
> +	param[2] = arg2;
> +	param[3] = arg3;
> +	param[4] = arg4;
> +
> +	/*
> +	 * Secure API needs physical address
> +	 * pointer for the parameters
> +	 */
> +	flush_cache_all();
> +	outer_clean_range(__pa(param), __pa(param + 5));
> +	ret = rx51_ppa_smc(idx, flag, __pa(param));
> +
> +	return ret;
> +}

You can do without ret variable... Also more detailed changelog would
be nice... like what exact problem this works around.

<google>

So... some CPU errata where code sharing virtual addresses could be
executed improperly?
								
> @@ -103,6 +104,12 @@ static void __init rx51_init(void)
>  	rx51_peripherals_init();
>  	rx51_camera_init();
>  
> +#ifdef CONFIG_ARM_ERRATA_430973
> +	printk(KERN_INFO "Enabling ARM errata 430973 workaround.\n");
> +	/* set IBE to 1 */
> +	rx51_secure_update_aux_cr(1 << 6, 0);
> +#endif
> +

Thanks,
								Pavel

-- 
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(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html