From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
Russell King - ARM Linux <linux@arm.linux.org.uk>,
Grant Likely <grant.likely@linaro.org>,
Rob Herring <rob.herring@calxeda.com>,
Rob Landley <rob@landley.net>, Arnd Bergmann <arnd@arndb.de>,
Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
Jason Gunthorpe <jgunthorpe@obsidianresearch.com>,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
Gregory Clement <gregory.clement@free-electrons.com>,
Ezequiel Garcia <ezequiel.garcia@free-electrons.com>,
Maxime Ripard <maxime.ripard@free-electrons.com>,
Jean-Francois Moine <moinejf@free.fr>,
Gerlando Falauto <gerlando.falauto@keymile.com>,
devicetree-discuss@lists.ozlabs.org, linux-doc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [RFC patch 8/8] irqchip: sun4i: Convert to generic irq chip
Date: Fri, 03 May 2013 21:50:55 -0000 [thread overview]
Message-ID: <20130503214629.880345092@linutronix.de> (raw)
In-Reply-To: 20130503212258.385818955@linutronix.de
[-- Attachment #1: irqchip-convert-sun4i.patch --]
[-- Type: text/plain, Size: 4825 bytes --]
Proof of concept patch to demonstrate the new irqdomain support for
the generic irq chip. Untested !!
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/irqchip/irq-sun4i.c | 100 ++++++++++++--------------------------------
1 file changed, 29 insertions(+), 71 deletions(-)
Index: linux-2.6/drivers/irqchip/irq-sun4i.c
===================================================================
--- linux-2.6.orig/drivers/irqchip/irq-sun4i.c
+++ linux-2.6/drivers/irqchip/irq-sun4i.c
@@ -32,70 +32,43 @@
#define SUN4I_IRQ_FIQ_PENDING_REG(x) (0x20 + 0x4 * x)
#define SUN4I_IRQ_ENABLE_REG(x) (0x40 + 0x4 * x)
#define SUN4I_IRQ_MASK_REG(x) (0x50 + 0x4 * x)
+#define SUN4I_NUM_CHIPS 3
+#define SUN4I_IRQS_PER_CHIP 32
static void __iomem *sun4i_irq_base;
static struct irq_domain *sun4i_irq_domain;
static asmlinkage void __exception_irq_entry sun4i_handle_irq(struct pt_regs *regs);
-void sun4i_irq_ack(struct irq_data *irqd)
+static int __init sun4i_init_domain_chips(void)
{
- unsigned int irq = irqd_to_hwirq(irqd);
- unsigned int irq_off = irq % 32;
- int reg = irq / 32;
- u32 val;
-
- val = readl(sun4i_irq_base + SUN4I_IRQ_PENDING_REG(reg));
- writel(val | (1 << irq_off),
- sun4i_irq_base + SUN4I_IRQ_PENDING_REG(reg));
-}
-
-static void sun4i_irq_mask(struct irq_data *irqd)
-{
- unsigned int irq = irqd_to_hwirq(irqd);
- unsigned int irq_off = irq % 32;
- int reg = irq / 32;
- u32 val;
-
- val = readl(sun4i_irq_base + SUN4I_IRQ_ENABLE_REG(reg));
- writel(val & ~(1 << irq_off),
- sun4i_irq_base + SUN4I_IRQ_ENABLE_REG(reg));
-}
-
-static void sun4i_irq_unmask(struct irq_data *irqd)
-{
- unsigned int irq = irqd_to_hwirq(irqd);
- unsigned int irq_off = irq % 32;
- int reg = irq / 32;
- u32 val;
-
- val = readl(sun4i_irq_base + SUN4I_IRQ_ENABLE_REG(reg));
- writel(val | (1 << irq_off),
- sun4i_irq_base + SUN4I_IRQ_ENABLE_REG(reg));
-}
-
-static struct irq_chip sun4i_irq_chip = {
- .name = "sun4i_irq",
- .irq_ack = sun4i_irq_ack,
- .irq_mask = sun4i_irq_mask,
- .irq_unmask = sun4i_irq_unmask,
-};
-
-static int sun4i_irq_map(struct irq_domain *d, unsigned int virq,
- irq_hw_number_t hw)
-{
- irq_set_chip_and_handler(virq, &sun4i_irq_chip,
- handle_level_irq);
- set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
-
+ unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
+ struct irq_chip_generic *gc;
+ int i, ret, base = 0;
+
+ ret = irq_alloc_domain_generic_chips(d, SUN4I_IRQS_PER_CHIP, 1,
+ "sun4i_irq", handle_level_irq,
+ clr, 0, IRQ_GC_INIT_MASK_CACHE);
+ if (ret)
+ return ret;
+
+ for (i = 0; i < SUN4I_NUM_CHIPS; i++, base += SUN4I_IRQS_PER_CHIP) {
+ gc = irq_get_domain_generic_chip(sun4i_irq_domain, base);
+ gc->reg_base = sun4i_irq_base;
+ gc->chip_types[0].regs.mask = SUN4I_IRQ_ENABLE_REG(i);
+ gc->chip_types[0].regs.ack = SUN4I_IRQ_PENDING_REG(i);
+ gc->chip_types[0].chip.mask = irq_gc_mask_clr_bit;
+ gc->chip_types[0].chip.ack = irq_gc_ack_set_bit;
+ gc->chip_types[0].chip.unmask = irq_gc_mask_set_bit;
+
+ /* Disable, mask and clear all pending interrupts */
+ writel(0, sun4i_irq_base + SUN4I_IRQ_ENABLE_REG(i));
+ writel(0, sun4i_irq_base + SUN4I_IRQ_MASK_REG(i));
+ writel(0xffffffff, sun4i_irq_base + SUN4I_IRQ_PENDING_REG(i));
+ }
return 0;
}
-static struct irq_domain_ops sun4i_irq_ops = {
- .map = sun4i_irq_map,
- .xlate = irq_domain_xlate_onecell,
-};
-
static int __init sun4i_of_init(struct device_node *node,
struct device_node *parent)
{
@@ -104,21 +77,6 @@ static int __init sun4i_of_init(struct d
panic("%s: unable to map IC registers\n",
node->full_name);
- /* Disable all interrupts */
- writel(0, sun4i_irq_base + SUN4I_IRQ_ENABLE_REG(0));
- writel(0, sun4i_irq_base + SUN4I_IRQ_ENABLE_REG(1));
- writel(0, sun4i_irq_base + SUN4I_IRQ_ENABLE_REG(2));
-
- /* Mask all the interrupts */
- writel(0, sun4i_irq_base + SUN4I_IRQ_MASK_REG(0));
- writel(0, sun4i_irq_base + SUN4I_IRQ_MASK_REG(1));
- writel(0, sun4i_irq_base + SUN4I_IRQ_MASK_REG(2));
-
- /* Clear all the pending interrupts */
- writel(0xffffffff, sun4i_irq_base + SUN4I_IRQ_PENDING_REG(0));
- writel(0xffffffff, sun4i_irq_base + SUN4I_IRQ_PENDING_REG(1));
- writel(0xffffffff, sun4i_irq_base + SUN4I_IRQ_PENDING_REG(2));
-
/* Enable protection mode */
writel(0x01, sun4i_irq_base + SUN4I_IRQ_PROTECTION_REG);
@@ -126,8 +84,8 @@ static int __init sun4i_of_init(struct d
writel(0x00, sun4i_irq_base + SUN4I_IRQ_NMI_CTRL_REG);
sun4i_irq_domain = irq_domain_add_linear(node, 3 * 32,
- &sun4i_irq_ops, NULL);
- if (!sun4i_irq_domain)
+ &irq_generic_chip_ops, NULL);
+ if (!sun4i_irq_domain || sun4i_init_domain_chips())
panic("%s: unable to create IRQ domain\n", node->full_name);
set_handle_irq(sun4i_handle_irq);
next prev parent reply other threads:[~2013-05-03 21:51 UTC|newest]
Thread overview: 79+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-02 18:25 [PATCH] irqchip: add support for Marvell Orion SoCs Sebastian Hesselbarth
2013-05-02 18:33 ` Sebastian Hesselbarth
2013-05-02 18:45 ` Russell King - ARM Linux
2013-05-02 18:54 ` Sebastian Hesselbarth
2013-05-02 18:56 ` Russell King - ARM Linux
2013-05-02 19:04 ` Sebastian Hesselbarth
2013-05-02 18:53 ` Jason Gunthorpe
2013-05-02 19:05 ` Sebastian Hesselbarth
2013-05-02 19:35 ` Jason Gunthorpe
2013-05-02 19:48 ` Sebastian Hesselbarth
2013-05-02 20:02 ` Andrew Lunn
2013-05-02 20:08 ` Gregory CLEMENT
2013-05-04 17:58 ` Jason Cooper
2013-05-02 19:11 ` Arnd Bergmann
2013-05-02 19:34 ` Sebastian Hesselbarth
2013-05-02 19:37 ` Jason Gunthorpe
2013-05-02 19:39 ` Sebastian Hesselbarth
2013-05-02 19:22 ` Jason Cooper
2013-05-02 21:34 ` Thomas Gleixner
2013-05-02 21:56 ` Sebastian Hesselbarth
2013-05-02 22:09 ` Arnd Bergmann
2013-05-02 22:37 ` Sebastian Hesselbarth
2013-05-04 18:12 ` Jason Cooper
2013-05-02 23:48 ` [PATCH v2 0/5] ARM: orion: add orion irqchip driver Sebastian Hesselbarth
2013-05-02 23:48 ` [PATCH v2 1/5] irqchip: add support for Marvell Orion SoCs Sebastian Hesselbarth
2013-05-03 12:55 ` Russell King - ARM Linux
2013-05-03 13:13 ` Sebastian Hesselbarth
2013-05-03 14:09 ` Thomas Gleixner
2013-05-03 21:50 ` [RFC patch 0/8] genirq: Support for irq domains in generic irq chip Thomas Gleixner
2013-05-03 21:50 ` [RFC patch 1/8] genirq: generic chip: Remove the local cur_regs() function Thomas Gleixner
2013-05-03 21:50 ` [RFC patch 3/8] genirq: generic chip: Handle separate mask registers Thomas Gleixner
2013-05-03 21:50 ` [RFC patch 4/8] genirq: generic chip: Cache per irq bit mask Thomas Gleixner
2013-05-03 22:24 ` Russell King - ARM Linux
2013-05-03 22:39 ` Thomas Gleixner
2013-05-03 21:50 ` [RFC patch 5/8] genirq: Add a mask calculation function Thomas Gleixner
2013-05-03 21:50 ` [RFC patch 6/8] genirq: Split out code in generic chip Thomas Gleixner
2013-05-27 13:45 ` Grant Likely
2013-05-03 21:50 ` [RFC patch 7/8] genirq: generic chip: Add linear irq domain support Thomas Gleixner
2013-05-03 22:23 ` Russell King - ARM Linux
2013-05-03 22:38 ` Thomas Gleixner
2013-05-04 2:30 ` Sebastian Hesselbarth
2013-05-04 8:04 ` Thomas Gleixner
2013-05-06 12:32 ` [RFC patch 7/8] fixup 1/2: " Sebastian Hesselbarth
2013-05-06 12:32 ` [RFC patch 7/8] fixup 2/2: " Sebastian Hesselbarth
2013-05-06 13:31 ` Thomas Gleixner
2013-05-06 13:25 ` [RFC patch 7/8] fixup 1/2: " Thomas Gleixner
2013-05-03 21:50 ` Thomas Gleixner [this message]
2013-05-04 2:37 ` [RFC patch 8/8] irqchip: sun4i: Convert to generic irq chip Sebastian Hesselbarth
2013-05-06 9:48 ` [RFC patch 0/8] genirq: Support for irq domains in " Uwe Kleine-König
2013-05-06 14:30 ` [patch 0/8] genirq: Support for irq domains in generic irq chip - V2 Thomas Gleixner
2013-05-06 14:30 ` [patch 1/8] genirq: generic chip: Remove the local cur_regs() function Thomas Gleixner
2013-05-29 9:14 ` [tip:irq/core] genirq: Generic " tip-bot for Gerlando Falauto
2013-05-06 14:30 ` [patch 3/8] genirq: generic chip: Handle separate mask registers Thomas Gleixner
2013-05-29 9:17 ` [tip:irq/core] genirq: Generic " tip-bot for Gerlando Falauto
2013-05-06 14:30 ` [patch 4/8] genirq: generic chip: Cache per irq bit mask Thomas Gleixner
2013-05-29 9:18 ` [tip:irq/core] genirq: Generic " tip-bot for Thomas Gleixner
2013-05-06 14:30 ` [patch 5/8] genirq: Add a mask calculation function Thomas Gleixner
2013-05-29 9:19 ` [tip:irq/core] genirq: irqchip: " tip-bot for Thomas Gleixner
2013-05-06 14:30 ` [patch 6/8] genirq: Split out code in generic chip Thomas Gleixner
2013-05-29 9:21 ` [tip:irq/core] genirq: Generic chip: Split out code into separate functions tip-bot for Thomas Gleixner
2013-05-06 14:30 ` [patch 7/8] genirq: generic chip: Add linear irq domain support Thomas Gleixner
2013-05-29 2:22 ` Grant Likely
2013-05-29 8:23 ` Thomas Gleixner
2013-05-29 9:22 ` [tip:irq/core] genirq: Generic " tip-bot for Thomas Gleixner
2013-05-06 14:30 ` [patch 8/8] irqchip: sun4i: Convert to generic irq chip Thomas Gleixner
2013-05-06 15:18 ` Rob Herring
2013-05-12 14:05 ` [PATCH] irq-sun4i: Fix trivial build errors Maxime Ripard
2013-05-12 14:08 ` [patch 8/8] irqchip: sun4i: Convert to generic irq chip Maxime Ripard
2013-05-12 14:14 ` Maxime Ripard
2013-05-13 10:57 ` [patch 0/8] genirq: Support for irq domains in generic irq chip - V2 Gerlando Falauto
2013-05-13 12:01 ` Thomas Gleixner
2013-10-01 15:27 ` Gerlando Falauto
2013-05-02 23:48 ` [PATCH v2 2/5] ARM: dove: add DT parsing for legacy mv643xx_eth Sebastian Hesselbarth
2013-05-03 5:06 ` Andrew Lunn
2013-05-03 9:58 ` Sebastian Hesselbarth
2013-05-04 18:29 ` Jason Cooper
2013-05-02 23:48 ` [PATCH v2 3/5] ARM: dove: add DT parsing for legacy timer Sebastian Hesselbarth
2013-05-02 23:48 ` [PATCH v2 4/5] ARM: dove: move DT boards to orion irqchip driver Sebastian Hesselbarth
2013-05-02 23:48 ` [PATCH v2 5/5] ARM: dove: add DT nodes for irqchip conversion Sebastian Hesselbarth
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