From: Siarhei Siamashka <siarhei.siamashka@gmail.com>
To: linux-sunxi@googlegroups.com
Cc: maxime.ripard@free-electrons.com,
John Stultz <john.stultz@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Emilio Lopez <emilio@elopez.com.ar>,
kevin@allwinnertech.com, sunny@allwinnertech.com,
shuge@allwinnertech.com
Subject: Re: [linux-sunxi] [PATCH 2/8] clocksource: sun4i: Add clocksource and sched clock drivers
Date: Thu, 27 Jun 2013 13:17:29 +0300 [thread overview]
Message-ID: <20130627131729.5fff8468@i7> (raw)
In-Reply-To: <1372281421-2099-3-git-send-email-maxime.ripard@free-electrons.com>
On Wed, 26 Jun 2013 23:16:55 +0200
Maxime Ripard <maxime.ripard@free-electrons.com> wrote:
> The A10 and the A13 has a 64 bits free running counter that we can use
> as a clocksource and a sched clock, that were both not used yet on these
> platforms.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
> drivers/clocksource/sun4i_timer.c | 27 +++++++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/drivers/clocksource/sun4i_timer.c b/drivers/clocksource/sun4i_timer.c
> index bdf34d9..1d2eaa0 100644
> --- a/drivers/clocksource/sun4i_timer.c
> +++ b/drivers/clocksource/sun4i_timer.c
> @@ -23,6 +23,8 @@
> #include <linux/of_address.h>
> #include <linux/of_irq.h>
>
> +#include <asm/sched_clock.h>
> +
> #define TIMER_IRQ_EN_REG 0x00
> #define TIMER_IRQ_EN(val) BIT(val)
> #define TIMER_IRQ_ST_REG 0x04
> @@ -34,6 +36,11 @@
> #define TIMER_CNTVAL_REG(val) (0x10 * val + 0x18)
>
> #define TIMER_SCAL 16
> +#define TIMER_CNT64_CTL_REG 0xa0
> +#define TIMER_CNT64_CTL_CLR BIT(0)
> +#define TIMER_CNT64_CTL_RL BIT(1)
> +#define TIMER_CNT64_LOW_REG 0xa4
> +#define TIMER_CNT64_HIGH_REG 0xa8
>
> static void __iomem *timer_base;
>
> @@ -96,6 +103,20 @@ static struct irqaction sun4i_timer_irq = {
> .dev_id = &sun4i_clockevent,
> };
>
> +static u32 sun4i_timer_sched_read(void)
> +{
> + u32 reg = readl(timer_base + TIMER_CNT64_CTL_REG);
If we can be absolutely sure that nothing else may ever change
the TIMER_CNT64_CTL_REG, then its default value can be probably
cached instead of doing expensive read from the hardware register
each time?
The gettimeofday() abusers will feel a bit less pain. ARM does not
currently enjoy the VDSO optimized gettimeofday, so the software
which has been only tested on x86 may get a nasty surprise (an order
of magnitude higher gettimeofday overhead).
> + writel(reg | TIMER_CNT64_CTL_RL, timer_base + TIMER_CNT64_CTL_REG);
> + while (readl(timer_base + TIMER_CNT64_CTL_REG) & TIMER_CNT64_CTL_REG);
Some may think that this particular loop looks like a performance
bottleneck, but it is very rarely run for more than one iteration.
In fact, most of the time it just happens to be a single HW register
read.
> +
> + return readl(timer_base + TIMER_CNT64_LOW_REG);
> +}
> +
> +static cycle_t sun4i_timer_clksrc_read(struct clocksource *c)
> +{
> + return sun4i_timer_sched_read();
> +}
> +
> static void __init sun4i_timer_init(struct device_node *node)
> {
> unsigned long rate = 0;
> @@ -117,6 +138,12 @@ static void __init sun4i_timer_init(struct device_node *node)
>
> rate = clk_get_rate(clk);
>
> + writel(TIMER_CNT64_CTL_CLR, timer_base + TIMER_CNT64_CTL_REG);
> + setup_sched_clock(sun4i_timer_sched_read, 32, clk_get_rate(clk));
> + clocksource_mmio_init(timer_base + TIMER_CNT64_LOW_REG, node->name,
> + clk_get_rate(clk), 300, 32,
> + sun4i_timer_clksrc_read);
> +
> writel(rate / (TIMER_SCAL * HZ),
> timer_base + TIMER_INTVAL_REG(0));
>
--
Best regards,
Siarhei Siamashka
next prev parent reply other threads:[~2013-06-27 10:17 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-26 21:16 [PATCH 0/8] clocksource: sunxi: Timer fixes and cleanup Maxime Ripard
2013-06-26 21:16 ` [PATCH 1/8] clocksource: sun4i: Use the BIT macros where possible Maxime Ripard
2013-06-26 21:16 ` [PATCH 2/8] clocksource: sun4i: Add clocksource and sched clock drivers Maxime Ripard
2013-06-26 21:27 ` Daniel Lezcano
2013-06-27 9:31 ` Maxime Ripard
2013-06-27 6:02 ` Baruch Siach
2013-06-27 9:35 ` Maxime Ripard
2013-06-27 9:46 ` Baruch Siach
2013-06-27 17:21 ` Maxime Ripard
2013-06-27 17:36 ` Baruch Siach
2013-06-27 19:16 ` Maxime Ripard
2013-06-27 10:17 ` Siarhei Siamashka [this message]
2013-06-27 17:02 ` [linux-sunxi] " Maxime Ripard
2013-06-27 19:51 ` Siarhei Siamashka
2013-06-28 10:19 ` Maxime Ripard
2013-06-26 21:16 ` [PATCH 3/8] clocksource: sun4i: Don't forget to enable the clock we use Maxime Ripard
2013-06-26 21:16 ` [PATCH 4/8] clocksource: sun4i: Fix the next event code Maxime Ripard
2013-06-26 21:16 ` [PATCH 5/8] clocksource: sun4i: Factor out some timer code Maxime Ripard
2013-06-26 21:16 ` [PATCH 6/8] clocksource: sun4i: Remove TIMER_SCAL variable Maxime Ripard
2013-06-26 21:17 ` [PATCH 7/8] clocksource: sun4i: Cleanup parent clock setup Maxime Ripard
2013-06-26 21:17 ` [PATCH 8/8] clocksource: sun4i: Fix bug when switching from periodic to oneshot modes Maxime Ripard
2013-06-27 9:27 ` [linux-sunxi] [PATCH 0/8] clocksource: sunxi: Timer fixes and cleanup Hans de Goede
2013-06-27 9:43 ` Maxime Ripard
2013-06-27 9:54 ` Hans de Goede
2013-06-27 16:54 ` Maxime Ripard
2013-06-27 18:13 ` Hans de Goede
2013-06-28 10:41 ` Maxime Ripard
2013-06-27 20:26 ` Siarhei Siamashka
2013-06-28 8:17 ` Hans de Goede
[not found] ` <2013062809433715678058@allwinnertech.com>
[not found] ` <20130628124843.242df804@i7>
2013-06-28 10:26 ` Thomas Gleixner
2013-06-28 11:14 ` Siarhei Siamashka
2013-06-28 14:02 ` Thomas Gleixner
2013-06-28 17:03 ` maxime.ripard
[not found] ` <20130628132912.014b2f5b@i7>
2013-06-28 14:16 ` maxime.ripard
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