From: Siarhei Siamashka <siarhei.siamashka@gmail.com>
To: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: linux-sunxi@googlegroups.com,
John Stultz <john.stultz@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Emilio Lopez <emilio@elopez.com.ar>,
kevin@allwinnertech.com, sunny@allwinnertech.com,
shuge@allwinnertech.com
Subject: Re: [linux-sunxi] [PATCH 2/8] clocksource: sun4i: Add clocksource and sched clock drivers
Date: Thu, 27 Jun 2013 22:51:01 +0300 [thread overview]
Message-ID: <20130627225101.358208c1@i7> (raw)
In-Reply-To: <20130627170228.GC4319@lukather>
On Thu, 27 Jun 2013 19:02:28 +0200
Maxime Ripard <maxime.ripard@free-electrons.com> wrote:
> Hi Siarhei,
>
> On Thu, Jun 27, 2013 at 01:17:29PM +0300, Siarhei Siamashka wrote:
> > On Wed, 26 Jun 2013 23:16:55 +0200
> > Maxime Ripard <maxime.ripard@free-electrons.com> wrote:
> >
> > > The A10 and the A13 has a 64 bits free running counter that we can use
> > > as a clocksource and a sched clock, that were both not used yet on these
> > > platforms.
> > >
> > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > > ---
> > > drivers/clocksource/sun4i_timer.c | 27 +++++++++++++++++++++++++++
> > > 1 file changed, 27 insertions(+)
> > >
> > > diff --git a/drivers/clocksource/sun4i_timer.c b/drivers/clocksource/sun4i_timer.c
> > > index bdf34d9..1d2eaa0 100644
> > > --- a/drivers/clocksource/sun4i_timer.c
> > > +++ b/drivers/clocksource/sun4i_timer.c
> > > @@ -23,6 +23,8 @@
> > > #include <linux/of_address.h>
> > > #include <linux/of_irq.h>
> > >
> > > +#include <asm/sched_clock.h>
> > > +
> > > #define TIMER_IRQ_EN_REG 0x00
> > > #define TIMER_IRQ_EN(val) BIT(val)
> > > #define TIMER_IRQ_ST_REG 0x04
> > > @@ -34,6 +36,11 @@
> > > #define TIMER_CNTVAL_REG(val) (0x10 * val + 0x18)
> > >
> > > #define TIMER_SCAL 16
> > > +#define TIMER_CNT64_CTL_REG 0xa0
> > > +#define TIMER_CNT64_CTL_CLR BIT(0)
> > > +#define TIMER_CNT64_CTL_RL BIT(1)
> > > +#define TIMER_CNT64_LOW_REG 0xa4
> > > +#define TIMER_CNT64_HIGH_REG 0xa8
> > >
> > > static void __iomem *timer_base;
> > >
> > > @@ -96,6 +103,20 @@ static struct irqaction sun4i_timer_irq = {
> > > .dev_id = &sun4i_clockevent,
> > > };
> > >
> > > +static u32 sun4i_timer_sched_read(void)
> > > +{
> > > + u32 reg = readl(timer_base + TIMER_CNT64_CTL_REG);
> >
> > If we can be absolutely sure that nothing else may ever change
> > the TIMER_CNT64_CTL_REG, then its default value can be probably
> > cached instead of doing expensive read from the hardware register
> > each time?
>
> Since it's a free-running counter, its value will always change, so the
> caching will bring no additions at all, right?
Sorry, 'caching' was not a very good description for something that is
already a compile time constant. I mean just replace
u32 reg = readl(timer_base + TIMER_CNT64_CTL_REG);
with
u32 reg = TIMER_CNT64_CTL_CLR;
Because we know that the TIMER_CNT64_CTL_REG is already supposed
to have the default TIMER_CNT64_CTL_CLR value (initialized in the
'sun4i_timer_init' function) between calls to 'sun4i_timer_sched_read'.
Inside of 'sun4i_timer_sched_read' we set an extra TIMER_CNT64_CTL_RL
bit in this register, but wait until it clears, effectively reverting
TIMER_CNT64_CTL_REG register back to the default TIMER_CNT64_CTL_CLR
value.
Removing this extra HW register read can save roughly a hundred of CPU
cycles here and provide a ~10% overall improvement for gettimeofday
(these estimates are based on the earlier benchmarks done with the
Allwinner 3.4 kernel).
Or maybe I'm overlooking something?
--
Best regards,
Siarhei Siamashka
next prev parent reply other threads:[~2013-06-27 19:51 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-26 21:16 [PATCH 0/8] clocksource: sunxi: Timer fixes and cleanup Maxime Ripard
2013-06-26 21:16 ` [PATCH 1/8] clocksource: sun4i: Use the BIT macros where possible Maxime Ripard
2013-06-26 21:16 ` [PATCH 2/8] clocksource: sun4i: Add clocksource and sched clock drivers Maxime Ripard
2013-06-26 21:27 ` Daniel Lezcano
2013-06-27 9:31 ` Maxime Ripard
2013-06-27 6:02 ` Baruch Siach
2013-06-27 9:35 ` Maxime Ripard
2013-06-27 9:46 ` Baruch Siach
2013-06-27 17:21 ` Maxime Ripard
2013-06-27 17:36 ` Baruch Siach
2013-06-27 19:16 ` Maxime Ripard
2013-06-27 10:17 ` [linux-sunxi] " Siarhei Siamashka
2013-06-27 17:02 ` Maxime Ripard
2013-06-27 19:51 ` Siarhei Siamashka [this message]
2013-06-28 10:19 ` Maxime Ripard
2013-06-26 21:16 ` [PATCH 3/8] clocksource: sun4i: Don't forget to enable the clock we use Maxime Ripard
2013-06-26 21:16 ` [PATCH 4/8] clocksource: sun4i: Fix the next event code Maxime Ripard
2013-06-26 21:16 ` [PATCH 5/8] clocksource: sun4i: Factor out some timer code Maxime Ripard
2013-06-26 21:16 ` [PATCH 6/8] clocksource: sun4i: Remove TIMER_SCAL variable Maxime Ripard
2013-06-26 21:17 ` [PATCH 7/8] clocksource: sun4i: Cleanup parent clock setup Maxime Ripard
2013-06-26 21:17 ` [PATCH 8/8] clocksource: sun4i: Fix bug when switching from periodic to oneshot modes Maxime Ripard
2013-06-27 9:27 ` [linux-sunxi] [PATCH 0/8] clocksource: sunxi: Timer fixes and cleanup Hans de Goede
2013-06-27 9:43 ` Maxime Ripard
2013-06-27 9:54 ` Hans de Goede
2013-06-27 16:54 ` Maxime Ripard
2013-06-27 18:13 ` Hans de Goede
2013-06-28 10:41 ` Maxime Ripard
2013-06-27 20:26 ` Siarhei Siamashka
2013-06-28 8:17 ` Hans de Goede
[not found] ` <2013062809433715678058@allwinnertech.com>
[not found] ` <20130628124843.242df804@i7>
2013-06-28 10:26 ` Thomas Gleixner
2013-06-28 11:14 ` Siarhei Siamashka
2013-06-28 14:02 ` Thomas Gleixner
2013-06-28 17:03 ` maxime.ripard
[not found] ` <20130628132912.014b2f5b@i7>
2013-06-28 14:16 ` maxime.ripard
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