[PATCH 0/2] PCIe Capability accessor fixes [stable backports]

[PATCH 0/2] PCIe Capability accessor fixes [stable backports]

[Bjorn Helgaas]

The following two patches fix issues reported by Yuval Mintz
<yuvalmin@broadcom.com> and Adam Lee <adam.lee@canonical.com>.

These backports are for 3.10.x and 3.11.x.

3.4.x and earlier stable kernels do not need these fixes because they
do not have the pcie_capability_*() accessors.

---

Bjorn Helgaas (2):
      PCI: Allow PCIe Capability link-related register access for switches
      PCI: Support PCIe Capability Slot registers only for ports with slots


 drivers/pci/access.c |   12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

[PATCH 1/2] PCI: Allow PCIe Capability link-related register access for switches

[Bjorn Helgaas]

Commit d3694d4fa3f44f6a295f8ab064937c8a1549d174 upstream.

Every PCIe device has a link, except Root Complex Integrated Endpoints
and Root Complex Event Collectors.  Previously we didn't give access
to PCIe capability link-related registers for Upstream Ports, Downstream
Ports, and Bridges, so attempts to read PCI_EXP_LNKCTL incorrectly
returned zero.  See PCIe spec r3.0, sec 7.8 and 1.3.2.3.

Reference: http://lkml.kernel.org/r/979A8436335E3744ADCD3A9F2A2B68A52AD136BE@SJEXCHMB10.corp.ad.broadcom.com
Reported-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-By: Jiang Liu <jiang.liu@huawei.com>
CC: stable@vger.kernel.org	# 3.10.x 3.11.x
---
 drivers/pci/access.c |    8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/access.c b/drivers/pci/access.c
index 1cc23661f79b..e26c3bd9aca4 100644
--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -485,9 +485,13 @@ static inline bool pcie_cap_has_lnkctl(const struct pci_dev *dev)
 	int type = pci_pcie_type(dev);
 
 	return pcie_cap_version(dev) > 1 ||
-	       type == PCI_EXP_TYPE_ROOT_PORT ||
 	       type == PCI_EXP_TYPE_ENDPOINT ||
-	       type == PCI_EXP_TYPE_LEG_END;
+	       type == PCI_EXP_TYPE_LEG_END ||
+	       type == PCI_EXP_TYPE_ROOT_PORT ||
+	       type == PCI_EXP_TYPE_UPSTREAM ||
+	       type == PCI_EXP_TYPE_DOWNSTREAM ||
+	       type == PCI_EXP_TYPE_PCI_BRIDGE ||
+	       type == PCI_EXP_TYPE_PCIE_BRIDGE;
 }
 
 static inline bool pcie_cap_has_sltctl(const struct pci_dev *dev)

[PATCH 2/2] PCI: Support PCIe Capability Slot registers only for ports with slots

[Bjorn Helgaas]

Commit 6d3a1741f1e648cfbd5a0cc94477a0d5004c6f5e upstream.

Previously we allowed callers to access Slot Capabilities, Status, and
Control for Root Ports even if the Root Port did not implement a slot.
This seems dubious because the spec only requires these registers if a
slot is implemented.

It's true that even Root Ports without slots must have *space* for these
slot registers, because the Root Capabilities, Status, and Control
registers are after the slot registers in the capability.  However,
for a v1 PCIe Capability, the *semantics* of the slot registers are
undefined unless a slot is implemented.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-By: Jiang Liu <jiang.liu@huawei.com>
CC: stable@vger.kernel.org	# 3.10.x 3.11.x
---
 drivers/pci/access.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/access.c b/drivers/pci/access.c
index e26c3bd9aca4..bcd92b629d3c 100644
--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -499,8 +499,8 @@ static inline bool pcie_cap_has_sltctl(const struct pci_dev *dev)
 	int type = pci_pcie_type(dev);
 
 	return pcie_cap_version(dev) > 1 ||
-	       type == PCI_EXP_TYPE_ROOT_PORT ||
-	       (type == PCI_EXP_TYPE_DOWNSTREAM &&
+	       ((type == PCI_EXP_TYPE_ROOT_PORT ||
+	         type == PCI_EXP_TYPE_DOWNSTREAM) &&
 		pcie_caps_reg(dev) & PCI_EXP_FLAGS_SLOT);
 }
 

Re: [PATCH 0/2] PCIe Capability accessor fixes [stable backports]

[Bjorn Helgaas]

On Mon, Nov 18, 2013 at 12:17 PM, Bjorn Helgaas <bhelgaas@google.com> wrote:
> The following two patches fix issues reported by Yuval Mintz
> <yuvalmin@broadcom.com> and Adam Lee <adam.lee@canonical.com>.
>
> These backports are for 3.10.x and 3.11.x.
>
> 3.4.x and earlier stable kernels do not need these fixes because they
> do not have the pcie_capability_*() accessors.
>
> ---
>
> Bjorn Helgaas (2):
>       PCI: Allow PCIe Capability link-related register access for switches
>       PCI: Support PCIe Capability Slot registers only for ports with slots

Please ignore these two patches.  Myron pointed out that I need to
include a third patch from the series, so I'll repost with that one
included.

Bjorn