From: Felipe Balbi <balbi@ti.com>
To: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
"linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-samsung-soc@vger.kernel.org"
<linux-samsung-soc@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>,
"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
"balbi@ti.com" <balbi@ti.com>, "kishon@ti.com" <kishon@ti.com>,
"kgene.kim@samsung.com" <kgene.kim@samsung.com>
Subject: Re: [PATCH 1/5] usb: dwc3: exynos: Add support for SCLK present on Exynos7
Date: Tue, 2 Sep 2014 09:35:39 -0500 [thread overview]
Message-ID: <20140902143539.GC16872@saruman.home> (raw)
In-Reply-To: <CAFp+6iHLSaUjHqaKXXX0QLiRd3h+O67DRSQdExag-KUH0dnpag@mail.gmail.com>
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On Tue, Sep 02, 2014 at 04:09:08PM +0530, Vivek Gautam wrote:
> Hi,
>
>
> On Fri, Aug 29, 2014 at 12:18 AM, Mark Rutland <mark.rutland@arm.com> wrote:
> > On Thu, Aug 28, 2014 at 09:01:56AM +0100, Vivek Gautam wrote:
> >> Exynos7 also has a separate special gate clock going to the IP
> >> apart from the usual AHB clock. So add support for the same.
> >>
> >> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
> >> ---
> >> drivers/usb/dwc3/dwc3-exynos.c | 16 ++++++++++++++++
> >> 1 file changed, 16 insertions(+)
> >>
> >> diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c
> >> index f9fb8ad..bab6395 100644
> >> --- a/drivers/usb/dwc3/dwc3-exynos.c
> >> +++ b/drivers/usb/dwc3/dwc3-exynos.c
> >> @@ -35,6 +35,7 @@ struct dwc3_exynos {
> >> struct device *dev;
> >>
> >> struct clk *clk;
> >> + struct clk *sclk;
> >> struct regulator *vdd33;
> >> struct regulator *vdd10;
> >> };
> >> @@ -141,10 +142,17 @@ static int dwc3_exynos_probe(struct platform_device *pdev)
> >> return -EINVAL;
> >> }
> >>
> >> + /* Exynos7 has a special gate clock going to this IP */
> >> + exynos->sclk = devm_clk_get(dev, "usbdrd30_sclk");
> >> + if (IS_ERR(exynos->sclk))
> >> + dev_warn(dev, "couldn't get sclk\n");
> >
> > Doesn't this introduce a pointless warning for Exynos SoCs other than
> > Exynos7?
>
> True, it will introduce an unnecessary warning for non-Exynos7 systems.
> I initially thought of introducing a compatible check for Exynos7-dwc3, but that
> way we may end up adding such checks for future SoCs which have similar
> controller but have some clock difference or some other small change, no ?
maybe dev_dbg() is what you want ? :-)
--
balbi
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next prev parent reply other threads:[~2014-09-02 14:36 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-28 8:01 [PATCH 0/5] usb: dwc3/phy-exynos5-usbdrd: Extend support to Exynos7 Vivek Gautam
2014-08-28 8:01 ` [PATCH 1/5] usb: dwc3: exynos: Add support for SCLK present on Exynos7 Vivek Gautam
2014-08-28 18:48 ` Mark Rutland
2014-09-02 10:39 ` Vivek Gautam
2014-09-02 11:01 ` Mark Rutland
2014-09-02 14:35 ` Felipe Balbi [this message]
2014-08-28 8:01 ` [PATCH 2/5] phy: exynos5-usbdrd: Add pipe-clk and utmi-clk support Vivek Gautam
2014-08-28 18:50 ` Mark Rutland
2014-08-28 8:01 ` [PATCH 3/5] phy: exynos5-usbdrd: Add facility for VBUS-BOOST-5V supply Vivek Gautam
2014-08-28 19:16 ` Felipe Balbi
2014-09-01 7:57 ` Vivek Gautam
2014-08-28 8:01 ` [PATCH 4/5] usb: dwc3: Adding Kconfig dependency for Exynos7 Vivek Gautam
2014-08-28 19:28 ` Felipe Balbi
2014-09-03 3:53 ` Vivek Gautam
2014-08-28 8:02 ` [PATCH 5/5] phy: exynos5-usbdrd: " Vivek Gautam
2014-08-28 15:06 ` Daniele Forsi
2014-09-01 8:00 ` Vivek Gautam
2014-09-02 14:37 ` Felipe Balbi
2014-09-03 4:02 ` Vivek Gautam
2014-09-03 14:46 ` Felipe Balbi
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