* [resend PATCH 1/3] pinctrl: dra7: dt-bindings: add pin off modes for dra7 SoC
2014-09-08 19:19 [resend PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree Mugunthan V N
@ 2014-09-08 19:19 ` Mugunthan V N
2014-09-08 19:32 ` Nishanth Menon
2014-09-08 19:19 ` [resend PATCH 2/3] arm/dts: dra7xx: Add CPSW and MDIO module nodes for dra7xx Mugunthan V N
` (2 subsequent siblings)
3 siblings, 1 reply; 12+ messages in thread
From: Mugunthan V N @ 2014-09-08 19:19 UTC (permalink / raw)
To: bcousson, tony; +Cc: devicetree, linux-omap, linux-kernel, Mugunthan V N
Add pin off modes for dra7 SoC so that during module disable or suspend
state it can help saving power
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
include/dt-bindings/pinctrl/dra.h | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/include/dt-bindings/pinctrl/dra.h b/include/dt-bindings/pinctrl/dra.h
index 002a285..a0ff2d0 100644
--- a/include/dt-bindings/pinctrl/dra.h
+++ b/include/dt-bindings/pinctrl/dra.h
@@ -46,5 +46,13 @@
#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP)
#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN)
+/* Off mode states */
+#define PIN_OFF_NONE 0
+#define PIN_OFF_OUTPUT_HIGH (OFF_EN | OFFOUT_EN | OFFOUT_VAL)
+#define PIN_OFF_OUTPUT_LOW (OFF_EN | OFFOUT_EN)
+#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFF_PULL_EN | OFF_PULL_UP)
+#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFF_PULL_EN)
+#define PIN_OFF_WAKEUPENABLE WAKEUP_EN
+
#endif
--
2.1.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [resend PATCH 1/3] pinctrl: dra7: dt-bindings: add pin off modes for dra7 SoC
2014-09-08 19:19 ` [resend PATCH 1/3] pinctrl: dra7: dt-bindings: add pin off modes for dra7 SoC Mugunthan V N
@ 2014-09-08 19:32 ` Nishanth Menon
2014-09-09 9:17 ` Mugunthan V N
0 siblings, 1 reply; 12+ messages in thread
From: Nishanth Menon @ 2014-09-08 19:32 UTC (permalink / raw)
To: Mugunthan V N; +Cc: bcousson, tony, devicetree, linux-omap, linux-kernel
On 00:49-20140909, Mugunthan V N wrote:
> Add pin off modes for dra7 SoC so that during module disable or suspend
> state it can help saving power
>
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
> ---
> include/dt-bindings/pinctrl/dra.h | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/include/dt-bindings/pinctrl/dra.h b/include/dt-bindings/pinctrl/dra.h
> index 002a285..a0ff2d0 100644
> --- a/include/dt-bindings/pinctrl/dra.h
> +++ b/include/dt-bindings/pinctrl/dra.h
> @@ -46,5 +46,13 @@
> #define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP)
> #define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN)
>
> +/* Off mode states */
> +#define PIN_OFF_NONE 0
> +#define PIN_OFF_OUTPUT_HIGH (OFF_EN | OFFOUT_EN | OFFOUT_VAL)
> +#define PIN_OFF_OUTPUT_LOW (OFF_EN | OFFOUT_EN)
> +#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFF_PULL_EN | OFF_PULL_UP)
> +#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFF_PULL_EN)
> +#define PIN_OFF_WAKEUPENABLE WAKEUP_EN
> +
> #endif
NAK for OFF_NONE, OFF_xyz etc.
A) There is no OFF mode on DRA7. in sleep state use mode 15 (gated).
B) when using this for wakeup - use pinctrl wakeup handling to do the
wakeup.
Regards,
Nishanth Menon
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [resend PATCH 1/3] pinctrl: dra7: dt-bindings: add pin off modes for dra7 SoC
2014-09-08 19:32 ` Nishanth Menon
@ 2014-09-09 9:17 ` Mugunthan V N
0 siblings, 0 replies; 12+ messages in thread
From: Mugunthan V N @ 2014-09-09 9:17 UTC (permalink / raw)
To: Nishanth Menon; +Cc: bcousson, tony, devicetree, linux-omap, linux-kernel
On Tuesday 09 September 2014 01:02 AM, Nishanth Menon wrote:
> A) There is no OFF mode on DRA7. in sleep state use mode 15 (gated).
> B) when using this for wakeup - use pinctrl wakeup handling to do the
> wakeup.
Will drop this patch and use mode 15 in sleep mode and submit v2 patch
series
Regards
Mugunthan V N
^ permalink raw reply [flat|nested] 12+ messages in thread
* [resend PATCH 2/3] arm/dts: dra7xx: Add CPSW and MDIO module nodes for dra7xx
2014-09-08 19:19 [resend PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree Mugunthan V N
2014-09-08 19:19 ` [resend PATCH 1/3] pinctrl: dra7: dt-bindings: add pin off modes for dra7 SoC Mugunthan V N
@ 2014-09-08 19:19 ` Mugunthan V N
2014-09-08 19:19 ` [resend PATCH 3/3] arm/dts: dra7xx: Enable CPSW and MDIO for dra7xx EVM Mugunthan V N
2014-09-08 19:34 ` [resend PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree Nishanth Menon
3 siblings, 0 replies; 12+ messages in thread
From: Mugunthan V N @ 2014-09-08 19:19 UTC (permalink / raw)
To: bcousson, tony; +Cc: devicetree, linux-omap, linux-kernel, Mugunthan V N
Add CPSW and MDIO related device tree data for DRA7XX and made as status
disabled. Phy-id, pinmux for active and sleep state needs to be added in
board dts files and enable the CPSW device.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
arch/arm/boot/dts/dra7.dtsi | 59 +++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 59 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index b6060d3..d588c1e 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -34,6 +34,8 @@
serial3 = &uart4;
serial4 = &uart5;
serial5 = &uart6;
+ ethernet0 = &cpsw_emac0;
+ ethernet1 = &cpsw_emac1;
};
timer {
@@ -1134,6 +1136,63 @@
ti,irqs-skip = <10 133 139 140>;
ti,irqs-safe-map = <0>;
};
+
+ mac: ethernet@4a100000 {
+ compatible = "ti,cpsw";
+ ti,hwmods = "gmac";
+ cpdma_channels = <8>;
+ ale_entries = <1024>;
+ bd_ram_size = <0x2000>;
+ no_bd_ram = <0>;
+ rx_descs = <64>;
+ mac_control = <0x20>;
+ slaves = <2>;
+ active_slave = <0>;
+ cpts_clock_mult = <0x80000000>;
+ cpts_clock_shift = <29>;
+ reg = <0x48484000 0x1000
+ 0x48485200 0x2E00>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ /*
+ * rx_thresh_pend
+ * rx_pend
+ * tx_pend
+ * misc_pend
+ */
+ interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>;
+ ranges;
+ status = "disabled";
+
+ davinci_mdio: mdio@48485000 {
+ compatible = "ti,davinci_mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "davinci_mdio";
+ bus_freq = <1000000>;
+ reg = <0x48485000 0x100>;
+ };
+
+ cpsw_emac0: slave@48480200 {
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
+ };
+
+ cpsw_emac1: slave@48480300 {
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
+ };
+
+ phy_sel: cpsw-phy-sel@4a002554 {
+ compatible = "ti,dra7xx-cpsw-phy-sel";
+ reg= <0x4a002554 0x4>;
+ reg-names = "gmii-sel";
+ };
+ };
+
};
};
--
2.1.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [resend PATCH 3/3] arm/dts: dra7xx: Enable CPSW and MDIO for dra7xx EVM
2014-09-08 19:19 [resend PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree Mugunthan V N
2014-09-08 19:19 ` [resend PATCH 1/3] pinctrl: dra7: dt-bindings: add pin off modes for dra7 SoC Mugunthan V N
2014-09-08 19:19 ` [resend PATCH 2/3] arm/dts: dra7xx: Add CPSW and MDIO module nodes for dra7xx Mugunthan V N
@ 2014-09-08 19:19 ` Mugunthan V N
2014-09-08 19:33 ` Nishanth Menon
2014-09-08 19:34 ` [resend PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree Nishanth Menon
3 siblings, 1 reply; 12+ messages in thread
From: Mugunthan V N @ 2014-09-08 19:19 UTC (permalink / raw)
To: bcousson, tony; +Cc: devicetree, linux-omap, linux-kernel, Mugunthan V N
Adding CPSW phy-id, CPSW and MDIO pinmux configuration for active and
sleep states and enable them in board evm dts file.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
arch/arm/boot/dts/dra7-evm.dts | 107 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 107 insertions(+)
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index fd96ced..57e69c4 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -151,6 +151,87 @@
0xd0 (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle */
>;
};
+
+ cpsw_default: cpsw_default {
+ pinctrl-single,pins = <
+ /* Slave 1 */
+ 0x250 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */
+ 0x254 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */
+ 0x258 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */
+ 0x25c (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */
+ 0x260 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */
+ 0x264 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */
+ 0x268 (PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */
+ 0x26c (PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */
+ 0x270 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */
+ 0x274 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */
+ 0x278 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */
+ 0x27c (PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */
+
+ /* Slave 2 */
+ 0x198 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */
+ 0x19c (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */
+ 0x1a0 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */
+ 0x1a4 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */
+ 0x1a8 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */
+ 0x1ac (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */
+ 0x1b0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */
+ 0x1b4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */
+ 0x1b8 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */
+ 0x1bc (PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */
+ 0x1c0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */
+ 0x1c4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */
+ >;
+
+ };
+
+ cpsw_sleep: cpsw_sleep {
+ pinctrl-single,pins = <
+ /* Slave 1 */
+ 0x250 (PIN_OFF_NONE)
+ 0x254 (PIN_OFF_NONE)
+ 0x258 (PIN_OFF_NONE)
+ 0x25c (PIN_OFF_NONE)
+ 0x260 (PIN_OFF_NONE)
+ 0x264 (PIN_OFF_NONE)
+ 0x268 (PIN_OFF_NONE)
+ 0x26c (PIN_OFF_NONE)
+ 0x270 (PIN_OFF_NONE)
+ 0x274 (PIN_OFF_NONE)
+ 0x278 (PIN_OFF_NONE)
+ 0x27c (PIN_OFF_NONE)
+
+ /* Slave 1 */
+ 0x198 (PIN_OFF_NONE)
+ 0x19c (PIN_OFF_NONE)
+ 0x1a0 (PIN_OFF_NONE)
+ 0x1a4 (PIN_OFF_NONE)
+ 0x1a8 (PIN_OFF_NONE)
+ 0x1ac (PIN_OFF_NONE)
+ 0x1b0 (PIN_OFF_NONE)
+ 0x1b4 (PIN_OFF_NONE)
+ 0x1b8 (PIN_OFF_NONE)
+ 0x1bc (PIN_OFF_NONE)
+ 0x1c0 (PIN_OFF_NONE)
+ 0x1c4 (PIN_OFF_NONE)
+ >;
+ };
+
+ davinci_mdio_default: davinci_mdio_default {
+ pinctrl-single,pins = <
+ /* MDIO */
+ 0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_data */
+ 0x240 (PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_clk */
+ >;
+ };
+
+ davinci_mdio_sleep: davinci_mdio_sleep {
+ pinctrl-single,pins = <
+ 0x23c (PIN_OFF_NONE)
+ 0x240 (PIN_OFF_NONE)
+ >;
+ };
+
};
&i2c1 {
@@ -503,3 +584,29 @@
&usb2_phy2 {
phy-supply = <&ldousb_reg>;
};
+
+&mac {
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&cpsw_default>;
+ pinctrl-1 = <&cpsw_sleep>;
+ dual_emac;
+};
+
+&cpsw_emac0 {
+ phy_id = <&davinci_mdio>, <2>;
+ phy-mode = "rgmii";
+ dual_emac_res_vlan = <1>;
+};
+
+&cpsw_emac1 {
+ phy_id = <&davinci_mdio>, <3>;
+ phy-mode = "rgmii";
+ dual_emac_res_vlan = <2>;
+};
+
+&davinci_mdio {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&davinci_mdio_default>;
+ pinctrl-1 = <&davinci_mdio_sleep>;
+};
--
2.1.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [resend PATCH 3/3] arm/dts: dra7xx: Enable CPSW and MDIO for dra7xx EVM
2014-09-08 19:19 ` [resend PATCH 3/3] arm/dts: dra7xx: Enable CPSW and MDIO for dra7xx EVM Mugunthan V N
@ 2014-09-08 19:33 ` Nishanth Menon
0 siblings, 0 replies; 12+ messages in thread
From: Nishanth Menon @ 2014-09-08 19:33 UTC (permalink / raw)
To: Mugunthan V N; +Cc: bcousson, tony, devicetree, linux-omap, linux-kernel
On 00:49-20140909, Mugunthan V N wrote:
> Adding CPSW phy-id, CPSW and MDIO pinmux configuration for active and
> sleep states and enable them in board evm dts file.
>
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
> ---
> arch/arm/boot/dts/dra7-evm.dts | 107 +++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 107 insertions(+)
>
> diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
> index fd96ced..57e69c4 100644
> --- a/arch/arm/boot/dts/dra7-evm.dts
> +++ b/arch/arm/boot/dts/dra7-evm.dts
> @@ -151,6 +151,87 @@
> 0xd0 (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle */
> >;
> };
> +
> + cpsw_default: cpsw_default {
> + pinctrl-single,pins = <
> + /* Slave 1 */
> + 0x250 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */
> + 0x254 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */
> + 0x258 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */
> + 0x25c (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */
> + 0x260 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */
> + 0x264 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */
> + 0x268 (PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */
> + 0x26c (PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */
> + 0x270 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */
> + 0x274 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */
> + 0x278 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */
> + 0x27c (PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */
> +
> + /* Slave 2 */
> + 0x198 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */
> + 0x19c (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */
> + 0x1a0 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */
> + 0x1a4 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */
> + 0x1a8 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */
> + 0x1ac (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */
> + 0x1b0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */
> + 0x1b4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */
> + 0x1b8 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */
> + 0x1bc (PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */
> + 0x1c0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */
> + 0x1c4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */
> + >;
> +
> + };
> +
> + cpsw_sleep: cpsw_sleep {
> + pinctrl-single,pins = <
> + /* Slave 1 */
> + 0x250 (PIN_OFF_NONE)
> + 0x254 (PIN_OFF_NONE)
> + 0x258 (PIN_OFF_NONE)
> + 0x25c (PIN_OFF_NONE)
> + 0x260 (PIN_OFF_NONE)
> + 0x264 (PIN_OFF_NONE)
> + 0x268 (PIN_OFF_NONE)
> + 0x26c (PIN_OFF_NONE)
> + 0x270 (PIN_OFF_NONE)
> + 0x274 (PIN_OFF_NONE)
> + 0x278 (PIN_OFF_NONE)
> + 0x27c (PIN_OFF_NONE)
> +
> + /* Slave 1 */
> + 0x198 (PIN_OFF_NONE)
> + 0x19c (PIN_OFF_NONE)
> + 0x1a0 (PIN_OFF_NONE)
> + 0x1a4 (PIN_OFF_NONE)
> + 0x1a8 (PIN_OFF_NONE)
> + 0x1ac (PIN_OFF_NONE)
> + 0x1b0 (PIN_OFF_NONE)
> + 0x1b4 (PIN_OFF_NONE)
> + 0x1b8 (PIN_OFF_NONE)
> + 0x1bc (PIN_OFF_NONE)
> + 0x1c0 (PIN_OFF_NONE)
> + 0x1c4 (PIN_OFF_NONE)
> + >;
> + };
NAK to sleep states -> you should be using mode 15 if you really want to
save power.
--
Regards,
Nishanth Menon
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [resend PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree
2014-09-08 19:19 [resend PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree Mugunthan V N
` (2 preceding siblings ...)
2014-09-08 19:19 ` [resend PATCH 3/3] arm/dts: dra7xx: Enable CPSW and MDIO for dra7xx EVM Mugunthan V N
@ 2014-09-08 19:34 ` Nishanth Menon
2014-09-09 11:29 ` Mugunthan V N
3 siblings, 1 reply; 12+ messages in thread
From: Nishanth Menon @ 2014-09-08 19:34 UTC (permalink / raw)
To: Mugunthan V N; +Cc: bcousson, tony, devicetree, linux-omap, linux-kernel
On 00:49-20140909, Mugunthan V N wrote:
> Adding device tree entry for CPSW to make it work in Dual EMAC mode.
>
> These patches were tested with DRA7 hwmod patches on top of linux-next.
> The patches were already reviewed [1] and has been waiting for cross bar
> and hwmod to be pulled in. Now since all dependent patches has already
> pulled in, so reposting the patches again.
>
> Patches are tested on linux-next, the boot logs on DRA7xx EVM [2]
>
> [1] https://lkml.org/lkml/2014/5/13/89
> [2] http://slexy.org/view/s2YqO0Wj9b
Sorry this is now blocked inside TI. could you explain the testing done
for sleep state? did you attempt sleep mode before testing this?
>
> Mugunthan V N (3):
> pinctrl: dra7: dt-bindings: add pin off modes for dra7 SoC
> arm/dts: dra7xx: Add CPSW and MDIO module nodes for dra7xx
> arm/dts: dra7xx: Enable CPSW and MDIO for dra7xx EVM
>
> arch/arm/boot/dts/dra7-evm.dts | 107 ++++++++++++++++++++++++++++++++++++++
> arch/arm/boot/dts/dra7.dtsi | 59 +++++++++++++++++++++
> include/dt-bindings/pinctrl/dra.h | 8 +++
> 3 files changed, 174 insertions(+)
>
--
Regards,
Nishanth Menon
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [resend PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree
2014-09-08 19:34 ` [resend PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree Nishanth Menon
@ 2014-09-09 11:29 ` Mugunthan V N
2014-09-09 12:15 ` Nishanth Menon
0 siblings, 1 reply; 12+ messages in thread
From: Mugunthan V N @ 2014-09-09 11:29 UTC (permalink / raw)
To: Nishanth Menon; +Cc: bcousson, tony, devicetree, linux-omap, linux-kernel
On Tuesday 09 September 2014 01:04 AM, Nishanth Menon wrote:
> On 00:49-20140909, Mugunthan V N wrote:
>> > Adding device tree entry for CPSW to make it work in Dual EMAC mode.
>> >
>> > These patches were tested with DRA7 hwmod patches on top of linux-next.
>> > The patches were already reviewed [1] and has been waiting for cross bar
>> > and hwmod to be pulled in. Now since all dependent patches has already
>> > pulled in, so reposting the patches again.
>> >
>> > Patches are tested on linux-next, the boot logs on DRA7xx EVM [2]
>> >
>> > [1] https://lkml.org/lkml/2014/5/13/89
>> > [2] http://slexy.org/view/s2YqO0Wj9b
> Sorry this is now blocked inside TI. could you explain the testing done
> for sleep state? did you attempt sleep mode before testing this?
>
I have not tested sleep mode, just tested boot and ping test.
Regards
Mugunthan V N
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [resend PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree
2014-09-09 11:29 ` Mugunthan V N
@ 2014-09-09 12:15 ` Nishanth Menon
2014-09-09 12:56 ` Mugunthan V N
0 siblings, 1 reply; 12+ messages in thread
From: Nishanth Menon @ 2014-09-09 12:15 UTC (permalink / raw)
To: Mugunthan V N; +Cc: Benoit Cousson, Tony Lindgren, dt list, linux-omap, lkml
On Tue, Sep 9, 2014 at 6:29 AM, Mugunthan V N <mugunthanvnm@ti.com> wrote:
>
>> Sorry this is now blocked inside TI. could you explain the testing done
>> for sleep state? did you attempt sleep mode before testing this?
>>
>
> I have not tested sleep mode, just tested boot and ping test.
I must NAK then for the reason that this is a patch that is just build
tested and is not tested for the feature it claims to introduce.
--
---
Regards,
Nishanth Menon
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [resend PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree
2014-09-09 12:15 ` Nishanth Menon
@ 2014-09-09 12:56 ` Mugunthan V N
2014-09-09 13:04 ` Nishanth Menon
0 siblings, 1 reply; 12+ messages in thread
From: Mugunthan V N @ 2014-09-09 12:56 UTC (permalink / raw)
To: Nishanth Menon; +Cc: Benoit Cousson, Tony Lindgren, dt list, linux-omap, lkml
On Tuesday 09 September 2014 05:45 PM, Nishanth Menon wrote:
> On Tue, Sep 9, 2014 at 6:29 AM, Mugunthan V N <mugunthanvnm@ti.com> wrote:
>>
>>> Sorry this is now blocked inside TI. could you explain the testing done
>>> for sleep state? did you attempt sleep mode before testing this?
>>>
>>
>> I have not tested sleep mode, just tested boot and ping test.
>
> I must NAK then for the reason that this is a patch that is just build
> tested and is not tested for the feature it claims to introduce.
>
>
Is suspend/resume supported in mainline, i was not able to test it.
root@dra7xx-evm:~# echo mem > /sys/power/state
-sh: echo: write error: Invalid argument
I was not able to use rtc wake also as the rtc device is not created.
Regards
Mugunthan V N
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [resend PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree
2014-09-09 12:56 ` Mugunthan V N
@ 2014-09-09 13:04 ` Nishanth Menon
0 siblings, 0 replies; 12+ messages in thread
From: Nishanth Menon @ 2014-09-09 13:04 UTC (permalink / raw)
To: Mugunthan V N; +Cc: Benoit Cousson, Tony Lindgren, dt list, linux-omap, lkml
On 09/09/2014 07:56 AM, Mugunthan V N wrote:
> On Tuesday 09 September 2014 05:45 PM, Nishanth Menon wrote:
>> On Tue, Sep 9, 2014 at 6:29 AM, Mugunthan V N <mugunthanvnm@ti.com> wrote:
>>>
>>>> Sorry this is now blocked inside TI. could you explain the testing done
>>>> for sleep state? did you attempt sleep mode before testing this?
>>>>
>>>
>>> I have not tested sleep mode, just tested boot and ping test.
>>
>> I must NAK then for the reason that this is a patch that is just build
>> tested and is not tested for the feature it claims to introduce.
>>
>>
>
> Is suspend/resume supported in mainline, i was not able to test it.
>
> root@dra7xx-evm:~# echo mem > /sys/power/state
> -sh: echo: write error: Invalid argument
>
> I was not able to use rtc wake also as the rtc device is not created.
Right.. that is why I was curious how you posted a patch that
supposedly supports sleep pin configurations in a kernel that does not
support suspend-resume?
Hopefully we will have it supported in 3.18 kernel[1] - still need out
of tree wakeup timer patch[2] for testing though..
If you have at least tested on relevant branch which has the feature
expected for 3.18, I might still be OK with the patch.
[1]http://marc.info/?l=linux-kernel&m=141019565513129&w=2 and
http://marc.info/?l=linux-kernel&m=141019566913133&w=2
[2] details in http://marc.info/?l=linux-kernel&m=140871637106555&w=2
--
Regards,
Nishanth Menon
^ permalink raw reply [flat|nested] 12+ messages in thread