[PATCH 0/4] ARM: shmobile: r8a7740: Handle implicitly enabled clocks

[PATCH 0/4] ARM: shmobile: r8a7740: Handle implicitly enabled clocks

[Geert Uytterhoeven]

	Hi all,

This patch series fixes an issue with the INTCA module clock, which we
currently assume enabled by the bootloader or reset state.
If this clock was not enabled before booting Linux, the intc-irqpin driver
and all devices connected to it (buttons, RTC on i2c-gpio) don't work.

To fix this, the clock is added to the system, and is managed in the driver
through runtime PM, taking into account wake-up sources (gpio-keys, RTC alarm).

There's one remaining issue for armadillo-legacy, which has support for the LCD
controller. Although the shmobile_lcd_fb driver doesn't use MERAM on r8a7740
(unlike on sh7372), the MERAM (Media RAM) and ICB (MERAM Interconnect Buffer)
clocks must be enabled to show a picture on the display. However, the MERAM
doesn't have any device associated with it, so it's non-trivial to hook it up.

This patch series is based on renesas-devel-20140911-v3.17-rc4 and
irqchip/for-next.

Geert Uytterhoeven (4):
  irqchip: renesas-intc-irqpin: Add helper variable dev = &pdev->dev
  irqchip: renesas-intc-irqpin: Add minimal runtime PM support
  ARM: shmobile: r8a7740 legacy: Add missing INTCA clock for irqpin
    module
  ARM: shmobile: r8a7740 dtsi: Add missing INTCA clock for irqpin module

 arch/arm/boot/dts/r8a7740.dtsi            | 14 ++++--
 arch/arm/mach-shmobile/clock-r8a7740.c    |  7 ++-
 drivers/irqchip/irq-renesas-intc-irqpin.c | 83 +++++++++++++++++++++----------
 include/dt-bindings/clock/r8a7740-clock.h |  1 +
 4 files changed, 73 insertions(+), 32 deletions(-)

-- 
1.9.1

Thanks!

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

[PATCH 1/4] irqchip: renesas-intc-irqpin: Add helper variable dev = &pdev->dev

[Geert Uytterhoeven]

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/irqchip/irq-renesas-intc-irqpin.c | 45 +++++++++++++++----------------
 1 file changed, 22 insertions(+), 23 deletions(-)

diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c b/drivers/irqchip/irq-renesas-intc-irqpin.c
index a9efceb0c4a0..a6b205b72c9b 100644
--- a/drivers/irqchip/irq-renesas-intc-irqpin.c
+++ b/drivers/irqchip/irq-renesas-intc-irqpin.c
@@ -329,7 +329,8 @@ static struct irq_domain_ops intc_irqpin_irq_domain_ops = {
 
 static int intc_irqpin_probe(struct platform_device *pdev)
 {
-	struct renesas_intc_irqpin_config *pdata = pdev->dev.platform_data;
+	struct device *dev = &pdev->dev;
+	struct renesas_intc_irqpin_config *pdata = dev->platform_data;
 	struct intc_irqpin_priv *p;
 	struct intc_irqpin_iomem *i;
 	struct resource *io[INTC_IRQPIN_REG_NR];
@@ -337,14 +338,14 @@ static int intc_irqpin_probe(struct platform_device *pdev)
 	struct irq_chip *irq_chip;
 	void (*enable_fn)(struct irq_data *d);
 	void (*disable_fn)(struct irq_data *d);
-	const char *name = dev_name(&pdev->dev);
+	const char *name = dev_name(dev);
 	int ref_irq;
 	int ret;
 	int k;
 
-	p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
+	p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL);
 	if (!p) {
-		dev_err(&pdev->dev, "failed to allocate driver data\n");
+		dev_err(dev, "failed to allocate driver data\n");
 		ret = -ENOMEM;
 		goto err0;
 	}
@@ -353,9 +354,9 @@ static int intc_irqpin_probe(struct platform_device *pdev)
 	if (pdata) {
 		memcpy(&p->config, pdata, sizeof(*pdata));
 	} else {
-		of_property_read_u32(pdev->dev.of_node, "sense-bitfield-width",
+		of_property_read_u32(dev->of_node, "sense-bitfield-width",
 				     &p->config.sense_bitfield_width);
-		p->config.control_parent = of_property_read_bool(pdev->dev.of_node,
+		p->config.control_parent = of_property_read_bool(dev->of_node,
 								 "control-parent");
 	}
 	if (!p->config.sense_bitfield_width)
@@ -368,7 +369,7 @@ static int intc_irqpin_probe(struct platform_device *pdev)
 	for (k = 0; k < INTC_IRQPIN_REG_NR; k++) {
 		io[k] = platform_get_resource(pdev, IORESOURCE_MEM, k);
 		if (!io[k]) {
-			dev_err(&pdev->dev, "not enough IOMEM resources\n");
+			dev_err(dev, "not enough IOMEM resources\n");
 			ret = -EINVAL;
 			goto err0;
 		}
@@ -386,7 +387,7 @@ static int intc_irqpin_probe(struct platform_device *pdev)
 
 	p->number_of_irqs = k;
 	if (p->number_of_irqs < 1) {
-		dev_err(&pdev->dev, "not enough IRQ resources\n");
+		dev_err(dev, "not enough IRQ resources\n");
 		ret = -EINVAL;
 		goto err0;
 	}
@@ -407,15 +408,15 @@ static int intc_irqpin_probe(struct platform_device *pdev)
 			i->write = intc_irqpin_write32;
 			break;
 		default:
-			dev_err(&pdev->dev, "IOMEM size mismatch\n");
+			dev_err(dev, "IOMEM size mismatch\n");
 			ret = -EINVAL;
 			goto err0;
 		}
 
-		i->iomem = devm_ioremap_nocache(&pdev->dev, io[k]->start,
+		i->iomem = devm_ioremap_nocache(dev, io[k]->start,
 						resource_size(io[k]));
 		if (!i->iomem) {
-			dev_err(&pdev->dev, "failed to remap IOMEM\n");
+			dev_err(dev, "failed to remap IOMEM\n");
 			ret = -ENXIO;
 			goto err0;
 		}
@@ -457,34 +458,32 @@ static int intc_irqpin_probe(struct platform_device *pdev)
 	irq_chip->irq_set_type = intc_irqpin_irq_set_type;
 	irq_chip->flags	= IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
 
-	p->irq_domain = irq_domain_add_simple(pdev->dev.of_node,
+	p->irq_domain = irq_domain_add_simple(dev->of_node,
 					      p->number_of_irqs,
 					      p->config.irq_base,
 					      &intc_irqpin_irq_domain_ops, p);
 	if (!p->irq_domain) {
 		ret = -ENXIO;
-		dev_err(&pdev->dev, "cannot initialize irq domain\n");
+		dev_err(dev, "cannot initialize irq domain\n");
 		goto err0;
 	}
 
 	if (p->shared_irqs) {
 		/* request one shared interrupt */
-		if (devm_request_irq(&pdev->dev, p->irq[0].requested_irq,
+		if (devm_request_irq(dev, p->irq[0].requested_irq,
 				intc_irqpin_shared_irq_handler,
 				IRQF_SHARED, name, p)) {
-			dev_err(&pdev->dev, "failed to request low IRQ\n");
+			dev_err(dev, "failed to request low IRQ\n");
 			ret = -ENOENT;
 			goto err1;
 		}
 	} else {
 		/* request interrupts one by one */
 		for (k = 0; k < p->number_of_irqs; k++) {
-			if (devm_request_irq(&pdev->dev,
-					p->irq[k].requested_irq,
-					intc_irqpin_irq_handler,
-					0, name, &p->irq[k])) {
-				dev_err(&pdev->dev,
-					"failed to request low IRQ\n");
+			if (devm_request_irq(dev, p->irq[k].requested_irq,
+					     intc_irqpin_irq_handler, 0, name,
+					     &p->irq[k])) {
+				dev_err(dev, "failed to request low IRQ\n");
 				ret = -ENOENT;
 				goto err1;
 			}
@@ -495,12 +494,12 @@ static int intc_irqpin_probe(struct platform_device *pdev)
 	for (k = 0; k < p->number_of_irqs; k++)
 		intc_irqpin_mask_unmask_prio(p, k, 0);
 
-	dev_info(&pdev->dev, "driving %d irqs\n", p->number_of_irqs);
+	dev_info(dev, "driving %d irqs\n", p->number_of_irqs);
 
 	/* warn in case of mismatch if irq base is specified */
 	if (p->config.irq_base) {
 		if (p->config.irq_base != p->irq[0].domain_irq)
-			dev_warn(&pdev->dev, "irq base mismatch (%d/%d)\n",
+			dev_warn(dev, "irq base mismatch (%d/%d)\n",
 				 p->config.irq_base, p->irq[0].domain_irq);
 	}
 
-- 
1.9.1

[PATCH 2/4] irqchip: renesas-intc-irqpin: Add minimal runtime PM support

[Geert Uytterhoeven]

This is just enough to let pm_clk_*() enable the functional clock, and
manage it for suspend/resume, if present.
Before, it was assumed enabled by the bootloader or reset state.

To prevent the clock from being disabled while the module is needed for
wake-up, implement irq_chip.irq_set_wake(), which increments/decrements
the clock's enable_count when needed.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/irqchip/irq-renesas-intc-irqpin.c | 38 +++++++++++++++++++++++++++----
 1 file changed, 34 insertions(+), 4 deletions(-)

diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c b/drivers/irqchip/irq-renesas-intc-irqpin.c
index a6b205b72c9b..542e850f4946 100644
--- a/drivers/irqchip/irq-renesas-intc-irqpin.c
+++ b/drivers/irqchip/irq-renesas-intc-irqpin.c
@@ -17,6 +17,7 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
+#include <linux/clk.h>
 #include <linux/init.h>
 #include <linux/of.h>
 #include <linux/platform_device.h>
@@ -30,6 +31,7 @@
 #include <linux/slab.h>
 #include <linux/module.h>
 #include <linux/platform_data/irq-renesas-intc-irqpin.h>
+#include <linux/pm_runtime.h>
 
 #define INTC_IRQPIN_MAX 8 /* maximum 8 interrupts per driver instance */
 
@@ -75,6 +77,7 @@ struct intc_irqpin_priv {
 	struct platform_device *pdev;
 	struct irq_chip irq_chip;
 	struct irq_domain *irq_domain;
+	struct clk *clk;
 	bool shared_irqs;
 	u8 shared_irq_mask;
 };
@@ -270,6 +273,21 @@ static int intc_irqpin_irq_set_type(struct irq_data *d, unsigned int type)
 				     value ^ INTC_IRQ_SENSE_VALID);
 }
 
+static int intc_irqpin_irq_set_wake(struct irq_data *d, unsigned int on)
+{
+	struct intc_irqpin_priv *p = irq_data_get_irq_chip_data(d);
+
+	if (!p->clk)
+		return 0;
+
+	if (on)
+		clk_enable(p->clk);
+	else
+		clk_disable(p->clk);
+
+	return 0;
+}
+
 static irqreturn_t intc_irqpin_irq_handler(int irq, void *dev_id)
 {
 	struct intc_irqpin_irq *i = dev_id;
@@ -346,8 +364,7 @@ static int intc_irqpin_probe(struct platform_device *pdev)
 	p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL);
 	if (!p) {
 		dev_err(dev, "failed to allocate driver data\n");
-		ret = -ENOMEM;
-		goto err0;
+		return -ENOMEM;
 	}
 
 	/* deal with driver instance configuration */
@@ -365,6 +382,15 @@ static int intc_irqpin_probe(struct platform_device *pdev)
 	p->pdev = pdev;
 	platform_set_drvdata(pdev, p);
 
+	p->clk = devm_clk_get(dev, NULL);
+	if (IS_ERR(p->clk)) {
+		dev_warn(dev, "unable to get clock\n");
+		p->clk = NULL;
+	}
+
+	pm_runtime_enable(dev);
+	pm_runtime_get_sync(dev);
+
 	/* get hold of manadatory IOMEM */
 	for (k = 0; k < INTC_IRQPIN_REG_NR; k++) {
 		io[k] = platform_get_resource(pdev, IORESOURCE_MEM, k);
@@ -456,7 +482,8 @@ static int intc_irqpin_probe(struct platform_device *pdev)
 	irq_chip->irq_mask = disable_fn;
 	irq_chip->irq_unmask = enable_fn;
 	irq_chip->irq_set_type = intc_irqpin_irq_set_type;
-	irq_chip->flags	= IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
+	irq_chip->irq_set_wake = intc_irqpin_irq_set_wake;
+	irq_chip->flags	= IRQCHIP_MASK_ON_SUSPEND;
 
 	p->irq_domain = irq_domain_add_simple(dev->of_node,
 					      p->number_of_irqs,
@@ -508,6 +535,8 @@ static int intc_irqpin_probe(struct platform_device *pdev)
 err1:
 	irq_domain_remove(p->irq_domain);
 err0:
+	pm_runtime_put(dev);
+	pm_runtime_disable(dev);
 	return ret;
 }
 
@@ -516,7 +545,8 @@ static int intc_irqpin_remove(struct platform_device *pdev)
 	struct intc_irqpin_priv *p = platform_get_drvdata(pdev);
 
 	irq_domain_remove(p->irq_domain);
-
+	pm_runtime_put(&pdev->dev);
+	pm_runtime_disable(&pdev->dev);
 	return 0;
 }
 
-- 
1.9.1

[PATCH 3/4] ARM: shmobile: r8a7740 legacy: Add missing INTCA clock for irqpin module

[Geert Uytterhoeven]

This clock drives the irqpin controller modules.
Before, it was assumed enabled by the bootloader or reset state.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/mach-shmobile/clock-r8a7740.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index 0794f0426e70..6cb1de220612 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -455,7 +455,7 @@ enum {
 	MSTP128, MSTP127, MSTP125,
 	MSTP116, MSTP111, MSTP100, MSTP117,
 
-	MSTP230,
+	MSTP230, MSTP229,
 	MSTP222,
 	MSTP218, MSTP217, MSTP216, MSTP214,
 	MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
@@ -479,6 +479,7 @@ static struct clk mstp_clks[MSTP_NR] = {
 	[MSTP100] = SH_CLK_MSTP32(&div4_clks[DIV4_B],	SMSTPCR1,  0, 0), /* LCDC0 */
 
 	[MSTP230] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB],	SMSTPCR2, 30, 0), /* SCIFA6 */
+	[MSTP229] = SH_CLK_MSTP32(&div6_clks[DIV4_HP],	SMSTPCR2, 29, 0), /* INTCA */
 	[MSTP222] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB],	SMSTPCR2, 22, 0), /* SCIFA7 */
 	[MSTP218] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR2, 18, 0), /* DMAC1 */
 	[MSTP217] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR2, 17, 0), /* DMAC2 */
@@ -575,6 +576,10 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("sh-dma-engine.0",	&mstp_clks[MSTP218]),
 	CLKDEV_DEV_ID("sh-sci.7",		&mstp_clks[MSTP222]),
 	CLKDEV_DEV_ID("e6cd0000.serial",	&mstp_clks[MSTP222]),
+	CLKDEV_DEV_ID("renesas_intc_irqpin.0",	&mstp_clks[MSTP229]),
+	CLKDEV_DEV_ID("renesas_intc_irqpin.1",	&mstp_clks[MSTP229]),
+	CLKDEV_DEV_ID("renesas_intc_irqpin.2",	&mstp_clks[MSTP229]),
+	CLKDEV_DEV_ID("renesas_intc_irqpin.3",	&mstp_clks[MSTP229]),
 	CLKDEV_DEV_ID("sh-sci.6",		&mstp_clks[MSTP230]),
 	CLKDEV_DEV_ID("e6cc0000.serial",	&mstp_clks[MSTP230]),
 
-- 
1.9.1

[PATCH 4/4] ARM: shmobile: r8a7740 dtsi: Add missing INTCA clock for irqpin module

[Geert Uytterhoeven]

This clock drives the INTCA irqpin controller modules.
Before, it was assumed enabled by the bootloader or reset state.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: devicetree@vger.kernel.org
---
 arch/arm/boot/dts/r8a7740.dtsi            | 14 ++++++++++----
 include/dt-bindings/clock/r8a7740-clock.h |  1 +
 2 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index d46c213a17ad..502483f4dccb 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -71,6 +71,7 @@
 			      0 149 IRQ_TYPE_LEVEL_HIGH
 			      0 149 IRQ_TYPE_LEVEL_HIGH
 			      0 149 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
 	};
 
 	/* irqpin1: IRQ8 - IRQ15 */
@@ -91,6 +92,7 @@
 			      0 149 IRQ_TYPE_LEVEL_HIGH
 			      0 149 IRQ_TYPE_LEVEL_HIGH
 			      0 149 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
 	};
 
 	/* irqpin2: IRQ16 - IRQ23 */
@@ -111,6 +113,7 @@
 			      0 149 IRQ_TYPE_LEVEL_HIGH
 			      0 149 IRQ_TYPE_LEVEL_HIGH
 			      0 149 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
 	};
 
 	/* irqpin3: IRQ24 - IRQ31 */
@@ -131,6 +134,7 @@
 			      0 149 IRQ_TYPE_LEVEL_HIGH
 			      0 149 IRQ_TYPE_LEVEL_HIGH
 			      0 149 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
 	};
 
 	ether: ethernet@e9a00000 {
@@ -448,8 +452,8 @@
 		mstp2_clks: mstp2_clks@e6150138 {
 			compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0xe6150138 4>, <0xe6150040 4>;
-			clocks = <&sub_clk>, <&sub_clk>,
-				 <&cpg_clocks R8A7740_CLK_HP>,
+			clocks = <&sub_clk>, <&cpg_clocks R8A7740_CLK_HP>,
+				 <&sub_clk>, <&cpg_clocks R8A7740_CLK_HP>,
 				 <&cpg_clocks R8A7740_CLK_HP>,
 				 <&cpg_clocks R8A7740_CLK_HP>,
 				 <&cpg_clocks R8A7740_CLK_HP>,
@@ -458,7 +462,8 @@
 				 <&sub_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
-				R8A7740_CLK_SCIFA6 R8A7740_CLK_SCIFA7
+				R8A7740_CLK_SCIFA6 R8A7740_CLK_INTCA
+				R8A7740_CLK_SCIFA7
 				R8A7740_CLK_DMAC1 R8A7740_CLK_DMAC2
 				R8A7740_CLK_DMAC3 R8A7740_CLK_USBDMAC
 				R8A7740_CLK_SCIFA5 R8A7740_CLK_SCIFB
@@ -467,7 +472,8 @@
 				R8A7740_CLK_SCIFA4
 			>;
 			clock-output-names =
-				"scifa6", "scifa7", "dmac1", "dmac2", "dmac3",
+				"scifa6", "intca",
+				"scifa7", "dmac1", "dmac2", "dmac3",
 				"usbdmac", "scifa5", "scifb", "scifa0", "scifa1",
 				"scifa2", "scifa3", "scifa4";
 		};
diff --git a/include/dt-bindings/clock/r8a7740-clock.h b/include/dt-bindings/clock/r8a7740-clock.h
index f6b4b0fe7a43..476135da0f23 100644
--- a/include/dt-bindings/clock/r8a7740-clock.h
+++ b/include/dt-bindings/clock/r8a7740-clock.h
@@ -40,6 +40,7 @@
 
 /* MSTP2 */
 #define R8A7740_CLK_SCIFA6	30
+#define R8A7740_CLK_INTCA	29
 #define R8A7740_CLK_SCIFA7	22
 #define R8A7740_CLK_DMAC1	18
 #define R8A7740_CLK_DMAC2	17
-- 
1.9.1

Re: [PATCH 0/4] ARM: shmobile: r8a7740: Handle implicitly enabled clocks

[Jason Cooper]

On Fri, Sep 12, 2014 at 03:15:16PM +0200, Geert Uytterhoeven wrote:
> 	Hi all,
> 
> This patch series fixes an issue with the INTCA module clock, which we
> currently assume enabled by the bootloader or reset state.
> If this clock was not enabled before booting Linux, the intc-irqpin driver
> and all devices connected to it (buttons, RTC on i2c-gpio) don't work.
> 
> To fix this, the clock is added to the system, and is managed in the driver
> through runtime PM, taking into account wake-up sources (gpio-keys, RTC alarm).
> 
> There's one remaining issue for armadillo-legacy, which has support for the LCD
> controller. Although the shmobile_lcd_fb driver doesn't use MERAM on r8a7740
> (unlike on sh7372), the MERAM (Media RAM) and ICB (MERAM Interconnect Buffer)
> clocks must be enabled to show a picture on the display. However, the MERAM
> doesn't have any device associated with it, so it's non-trivial to hook it up.
> 
> This patch series is based on renesas-devel-20140911-v3.17-rc4 and
> irqchip/for-next.
> 
> Geert Uytterhoeven (4):
>   irqchip: renesas-intc-irqpin: Add helper variable dev = &pdev->dev
>   irqchip: renesas-intc-irqpin: Add minimal runtime PM support
>   ARM: shmobile: r8a7740 legacy: Add missing INTCA clock for irqpin
>     module
>   ARM: shmobile: r8a7740 dtsi: Add missing INTCA clock for irqpin module
> 
>  arch/arm/boot/dts/r8a7740.dtsi            | 14 ++++--
>  arch/arm/mach-shmobile/clock-r8a7740.c    |  7 ++-
>  drivers/irqchip/irq-renesas-intc-irqpin.c | 83 +++++++++++++++++++++----------
>  include/dt-bindings/clock/r8a7740-clock.h |  1 +
>  4 files changed, 73 insertions(+), 32 deletions(-)

Patches 1 and 2 applied to irqchip/core

thx,

Jason.

Re: [PATCH 3/4] ARM: shmobile: r8a7740 legacy: Add missing INTCA clock for irqpin module

[Simon Horman]

On Fri, Sep 12, 2014 at 03:15:19PM +0200, Geert Uytterhoeven wrote:
> This clock drives the irqpin controller modules.
> Before, it was assumed enabled by the bootloader or reset state.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thanks, I have queued this up.

> ---
>  arch/arm/mach-shmobile/clock-r8a7740.c | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
> index 0794f0426e70..6cb1de220612 100644
> --- a/arch/arm/mach-shmobile/clock-r8a7740.c
> +++ b/arch/arm/mach-shmobile/clock-r8a7740.c
> @@ -455,7 +455,7 @@ enum {
>  	MSTP128, MSTP127, MSTP125,
>  	MSTP116, MSTP111, MSTP100, MSTP117,
>  
> -	MSTP230,
> +	MSTP230, MSTP229,
>  	MSTP222,
>  	MSTP218, MSTP217, MSTP216, MSTP214,
>  	MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
> @@ -479,6 +479,7 @@ static struct clk mstp_clks[MSTP_NR] = {
>  	[MSTP100] = SH_CLK_MSTP32(&div4_clks[DIV4_B],	SMSTPCR1,  0, 0), /* LCDC0 */
>  
>  	[MSTP230] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB],	SMSTPCR2, 30, 0), /* SCIFA6 */
> +	[MSTP229] = SH_CLK_MSTP32(&div6_clks[DIV4_HP],	SMSTPCR2, 29, 0), /* INTCA */
>  	[MSTP222] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB],	SMSTPCR2, 22, 0), /* SCIFA7 */
>  	[MSTP218] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR2, 18, 0), /* DMAC1 */
>  	[MSTP217] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR2, 17, 0), /* DMAC2 */
> @@ -575,6 +576,10 @@ static struct clk_lookup lookups[] = {
>  	CLKDEV_DEV_ID("sh-dma-engine.0",	&mstp_clks[MSTP218]),
>  	CLKDEV_DEV_ID("sh-sci.7",		&mstp_clks[MSTP222]),
>  	CLKDEV_DEV_ID("e6cd0000.serial",	&mstp_clks[MSTP222]),
> +	CLKDEV_DEV_ID("renesas_intc_irqpin.0",	&mstp_clks[MSTP229]),
> +	CLKDEV_DEV_ID("renesas_intc_irqpin.1",	&mstp_clks[MSTP229]),
> +	CLKDEV_DEV_ID("renesas_intc_irqpin.2",	&mstp_clks[MSTP229]),
> +	CLKDEV_DEV_ID("renesas_intc_irqpin.3",	&mstp_clks[MSTP229]),
>  	CLKDEV_DEV_ID("sh-sci.6",		&mstp_clks[MSTP230]),
>  	CLKDEV_DEV_ID("e6cc0000.serial",	&mstp_clks[MSTP230]),
>  
> -- 
> 1.9.1
> 

Re: [PATCH 4/4] ARM: shmobile: r8a7740 dtsi: Add missing INTCA clock for irqpin module

[Simon Horman]

On Fri, Sep 12, 2014 at 03:15:20PM +0200, Geert Uytterhoeven wrote:
> This clock drives the INTCA irqpin controller modules.
> Before, it was assumed enabled by the bootloader or reset state.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Cc: devicetree@vger.kernel.org

Thanks, I have queued this up.

> ---
>  arch/arm/boot/dts/r8a7740.dtsi            | 14 ++++++++++----
>  include/dt-bindings/clock/r8a7740-clock.h |  1 +
>  2 files changed, 11 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
> index d46c213a17ad..502483f4dccb 100644
> --- a/arch/arm/boot/dts/r8a7740.dtsi
> +++ b/arch/arm/boot/dts/r8a7740.dtsi
> @@ -71,6 +71,7 @@
>  			      0 149 IRQ_TYPE_LEVEL_HIGH
>  			      0 149 IRQ_TYPE_LEVEL_HIGH
>  			      0 149 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
>  	};
>  
>  	/* irqpin1: IRQ8 - IRQ15 */
> @@ -91,6 +92,7 @@
>  			      0 149 IRQ_TYPE_LEVEL_HIGH
>  			      0 149 IRQ_TYPE_LEVEL_HIGH
>  			      0 149 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
>  	};
>  
>  	/* irqpin2: IRQ16 - IRQ23 */
> @@ -111,6 +113,7 @@
>  			      0 149 IRQ_TYPE_LEVEL_HIGH
>  			      0 149 IRQ_TYPE_LEVEL_HIGH
>  			      0 149 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
>  	};
>  
>  	/* irqpin3: IRQ24 - IRQ31 */
> @@ -131,6 +134,7 @@
>  			      0 149 IRQ_TYPE_LEVEL_HIGH
>  			      0 149 IRQ_TYPE_LEVEL_HIGH
>  			      0 149 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
>  	};
>  
>  	ether: ethernet@e9a00000 {
> @@ -448,8 +452,8 @@
>  		mstp2_clks: mstp2_clks@e6150138 {
>  			compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
>  			reg = <0xe6150138 4>, <0xe6150040 4>;
> -			clocks = <&sub_clk>, <&sub_clk>,
> -				 <&cpg_clocks R8A7740_CLK_HP>,
> +			clocks = <&sub_clk>, <&cpg_clocks R8A7740_CLK_HP>,
> +				 <&sub_clk>, <&cpg_clocks R8A7740_CLK_HP>,
>  				 <&cpg_clocks R8A7740_CLK_HP>,
>  				 <&cpg_clocks R8A7740_CLK_HP>,
>  				 <&cpg_clocks R8A7740_CLK_HP>,
> @@ -458,7 +462,8 @@
>  				 <&sub_clk>;
>  			#clock-cells = <1>;
>  			renesas,clock-indices = <
> -				R8A7740_CLK_SCIFA6 R8A7740_CLK_SCIFA7
> +				R8A7740_CLK_SCIFA6 R8A7740_CLK_INTCA
> +				R8A7740_CLK_SCIFA7
>  				R8A7740_CLK_DMAC1 R8A7740_CLK_DMAC2
>  				R8A7740_CLK_DMAC3 R8A7740_CLK_USBDMAC
>  				R8A7740_CLK_SCIFA5 R8A7740_CLK_SCIFB
> @@ -467,7 +472,8 @@
>  				R8A7740_CLK_SCIFA4
>  			>;
>  			clock-output-names =
> -				"scifa6", "scifa7", "dmac1", "dmac2", "dmac3",
> +				"scifa6", "intca",
> +				"scifa7", "dmac1", "dmac2", "dmac3",
>  				"usbdmac", "scifa5", "scifb", "scifa0", "scifa1",
>  				"scifa2", "scifa3", "scifa4";
>  		};
> diff --git a/include/dt-bindings/clock/r8a7740-clock.h b/include/dt-bindings/clock/r8a7740-clock.h
> index f6b4b0fe7a43..476135da0f23 100644
> --- a/include/dt-bindings/clock/r8a7740-clock.h
> +++ b/include/dt-bindings/clock/r8a7740-clock.h
> @@ -40,6 +40,7 @@
>  
>  /* MSTP2 */
>  #define R8A7740_CLK_SCIFA6	30
> +#define R8A7740_CLK_INTCA	29
>  #define R8A7740_CLK_SCIFA7	22
>  #define R8A7740_CLK_DMAC1	18
>  #define R8A7740_CLK_DMAC2	17
> -- 
> 1.9.1
>