From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Robert Jarzmik <robert.jarzmik@free.fr>
Cc: Gregory Clement <gregory.clement@free-electrons.com>,
Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
Ezequiel Garcia <ezequiel.garcia@free-electrons.com>,
Brian Norris <computersforpeace@gmail.com>,
Lior Amsalem <alior@marvell.com>,
Tawfik Bayouk <tawfik@marvell.com>,
Thomas Petazzoni <thomas@free-electrons.com>,
Seif Mazareeb <seif@marvell.com>,
linux-kernel@vger.kernel.org, stable@vger.kernel.org,
Sudhakar Gundubogula <sudhakar@marvell.com>,
Nadav Haklai <nadavh@marvell.com>,
Boris Brezillon <boris@free-electrons.com>,
linux-mtd@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 1/2] mtd: nand: pxa3xx: Fix PIO FIFO draining
Date: Tue, 17 Feb 2015 11:37:40 +0100 [thread overview]
Message-ID: <20150217103740.GK25269@lukather> (raw)
In-Reply-To: <87k2zha69p.fsf@free.fr>
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On Mon, Feb 16, 2015 at 10:36:02PM +0100, Robert Jarzmik wrote:
> diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
> index e512902..6e569e9 100644
> --- a/drivers/mtd/nand/pxa3xx_nand.c
> +++ b/drivers/mtd/nand/pxa3xx_nand.c
> @@ -576,11 +576,20 @@ static void start_data_dma(struct pxa3xx_nand_info *info)
> {}
> #endif
>
> +static irqreturn_t pxa3xx_nand_irq_thread(int irq, void *data)
> +{
> + struct pxa3xx_nand_info *info = data;
> +
> + handle_data_pio(info);
> + return IRQ_HANDLED;
> +}
> +
> static irqreturn_t pxa3xx_nand_irq(int irq, void *devid)
> {
> struct pxa3xx_nand_info *info = devid;
> unsigned int status, is_completed = 0, is_ready = 0;
> unsigned int ready, cmd_done;
> + irqreturn_t ret = IRQ_HANDLED;
>
> if (info->cs == 0) {
> ready = NDSR_FLASH_RDY;
> @@ -622,7 +631,7 @@ static irqreturn_t pxa3xx_nand_irq(int irq, void *devid)
> } else {
> info->state = (status & NDSR_RDDREQ) ?
> STATE_PIO_READING : STATE_PIO_WRITING;
> - handle_data_pio(info);
> + ret = IRQ_WAKE_THREAD;
> }
> }
> if (status & cmd_done) {
> @@ -663,7 +672,7 @@ static irqreturn_t pxa3xx_nand_irq(int irq, void *devid)
> if (is_ready)
> complete(&info->dev_ready);
> NORMAL_IRQ_EXIT:
> - return IRQ_HANDLED;
> + return ret;
> }
>
> static inline int is_buf_blank(uint8_t *buf, size_t len)
> @@ -1688,7 +1697,8 @@ static int alloc_nand_resource(struct platform_device *pdev)
> /* initialize all interrupts to be disabled */
> disable_int(info, NDSR_MASK);
>
> - ret = request_irq(irq, pxa3xx_nand_irq, 0, pdev->name, info);
> + ret = request_threaded_irq(irq, pxa3xx_nand_irq,
> + pxa3xx_nand_irq_thread, 0, pdev->name, info);
> if (ret < 0) {
> dev_err(&pdev->dev, "failed to request IRQ\n");
> goto fail_free_buf;
I just gave this patch a try, and it blows up quite badly:
http://code.bulix.org/p96krc-87889?raw
It looks like there's more work here, most likely in the waitqueues
wake up.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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next prev parent reply other threads:[~2015-02-17 10:40 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-16 12:51 [PATCH v3 0/2] ARM: mvebu: a385-db-ap: Enable the NAND controller Maxime Ripard
2015-02-16 12:51 ` [PATCH v3 1/2] mtd: nand: pxa3xx: Fix PIO FIFO draining Maxime Ripard
2015-02-16 13:34 ` Boris Brezillon
2015-02-16 13:35 ` Ezequiel Garcia
2015-02-16 16:49 ` Maxime Ripard
2015-02-16 16:27 ` Thomas Petazzoni
2015-02-16 16:41 ` Maxime Ripard
2015-02-16 16:57 ` Ezequiel Garcia
2015-02-17 10:29 ` Maxime Ripard
2015-02-16 20:11 ` Robert Jarzmik
2015-02-16 20:58 ` Maxime Ripard
2015-02-16 21:36 ` Robert Jarzmik
2015-02-17 9:47 ` Maxime Ripard
2015-02-17 10:37 ` Maxime Ripard [this message]
2015-02-17 17:07 ` Robert Jarzmik
2015-02-17 17:16 ` Ezequiel Garcia
2015-02-24 3:45 ` Brian Norris
2015-02-24 8:17 ` Maxime Ripard
2015-02-16 12:51 ` [PATCH v3 2/2] ARM: mvebu: a385-db-ap: Enable the NAND Maxime Ripard
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