[PATCH v1 0/2] Implement SoC bus support for Vybrid

[PATCH v1 0/2] Implement SoC bus support for Vybrid

[Sanchayan Maity]

Hello,

This patchset implements SoC bus support for Freescale Vybrid platform, 
implementing the following
https://www.kernel.org/doc/Documentation/ABI/testing/sysfs-devices-soc

The RFC version can be found here
https://lkml.org/lkml/2015/5/11/13

Currently the required information is more or less read across the whole
SoC, but I guess we cannot change that since these are the locations
with the required information.

There seem to be three options for the revision field:
- ROM revision (see https://community.freescale.com/docs/DOC-94802)
- ANADIG revision (ANADIG_DIGIPROC, as used for the i.MX SoC's)
- OCOTP revision

Some numbers:

Colibri VF61 1.1A (2N02G)
- 0x00000013
- 0x00610000
- 0x01000000
- 0x410000c8

Colibri VF61 V1.0B (1N02G)
- 0x00000011
- 0x00610000
- 0x01000000
- 0x410000c8

Colibri VF61 V1.0A (which is actually a VF600 SoC, no L2 cache, since
that was the only one we could buy back then, 1N02G printed on it)
- 0x00000011
- 0x00610000
- 0x01000000
- none...

Colibri VF50 V1.0A (1N02G)
- 0x00000011
- 0x00610000
- 0x01000000
- none...

Vybrid Tower Rev J (1N02G)
- 0x00000011
- 0x00610000
- 0x01000000
- 0x410000c8

The ROM revision differs the most, so we would like to go with the 
revision information from the ROM register 0x80.

Changes since RFC:
- Use a DT entry for the ROM area while specifying it as syscon.

Thanks & Regards,
Sanchayan Maity.

Sanchayan Maity (2):
  ARM: dts: vfxxx: Add OCOTP and OCROM nodes
  ARM: vf610: Add SoC bus support for Vybrid

 arch/arm/boot/dts/vfxxx.dtsi   | 10 ++++++
 arch/arm/mach-imx/mach-vf610.c | 81 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 91 insertions(+)

-- 
2.4.1

[PATCH v1 1/2] ARM: dts: vfxxx: Add OCOTP and OCROM nodes

[Sanchayan Maity]

Add a device tree node for the On-Chip One Time Programmable
Controller (OCOTP) and the On-Chip ROM.

Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
---
 arch/arm/boot/dts/vfxxx.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi
index 2f4b04d..66c529f 100644
--- a/arch/arm/boot/dts/vfxxx.dtsi
+++ b/arch/arm/boot/dts/vfxxx.dtsi
@@ -57,6 +57,11 @@
 		interrupt-parent = <&mscm_ir>;
 		ranges;
 
+		ocrom: ocrom {
+			compatible = "fsl,vf610-ocrom", "syscon";
+			reg = <0x00000000 0x18000>;
+		};
+
 		aips0: aips-bus@40000000 {
 			compatible = "fsl,aips-bus", "simple-bus";
 			#address-cells = <1>;
@@ -403,6 +408,11 @@
 				status = "disabled";
 			};
 
+			ocotp: ocotp@400a5000 {
+				compatible = "fsl,vf610-ocotp", "syscon";
+				reg = <0x400a5000 0x1000>;
+			};
+
 			snvs0: snvs@400a7000 {
 			    compatible = "fsl,sec-v4.0-mon", "simple-bus";
 				#address-cells = <1>;
-- 
2.4.1

[PATCH v1 2/2] ARM: vf610: Add SoC bus support for Vybrid

[Sanchayan Maity]

Implements SoC bus support to export SoC specific information. Read
the unique SoC ID from the Vybrid On Chip One Time Programmable
(OCOTP) controller, SoC specific information from the Miscellaneous
System Control Module (MSCM), revision from the ROM revision register
and expose it via the SoC bus infrastructure.

Sample Output:

root@vf:/sys/devices/soc0# cat soc_id
df63c12a2e2161d4
root@vf:/sys/devices/soc0# cat family
Freescale Vybrid VF500
root@vf:/sys/devices/soc0# cat revision
00000013
root@vf:/sys/devices/soc0# cat machine
Freescale Vybrid

Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
---
 arch/arm/mach-imx/mach-vf610.c | 81 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 81 insertions(+)

diff --git a/arch/arm/mach-imx/mach-vf610.c b/arch/arm/mach-imx/mach-vf610.c
index 2e7c75b..64c78e4 100644
--- a/arch/arm/mach-imx/mach-vf610.c
+++ b/arch/arm/mach-imx/mach-vf610.c
@@ -11,6 +11,86 @@
 #include <linux/irqchip.h>
 #include <asm/mach/arch.h>
 #include <asm/hardware/cache-l2x0.h>
+#include <linux/slab.h>
+#include <linux/sys_soc.h>
+#include <linux/mfd/syscon.h>
+#include <linux/regmap.h>
+#include <linux/random.h>
+
+#define OCOTP_CFG0_OFFSET      0x00000410
+#define OCOTP_CFG1_OFFSET      0x00000420
+#define MSCM_CPxCOUNT_OFFSET   0x0000002C
+#define MSCM_CPxCFG1_OFFSET    0x00000014
+#define ROM_REVISION_OFFSET    0x00000080
+
+static void __init vf610_init_machine(void)
+{
+	struct regmap *ocotp_regmap, *mscm_regmap, *rom_regmap;
+	struct soc_device_attribute *soc_dev_attr;
+	struct device *parent = NULL;
+	struct soc_device *soc_dev;
+	char soc_type[] = "xx0";
+	u32 cpxcount, cpxcfg1;
+	u32 soc_id1, soc_id2, rom_rev;
+	u64 soc_id;
+
+	ocotp_regmap = syscon_regmap_lookup_by_compatible("fsl,vf610-ocotp");
+	if (IS_ERR(ocotp_regmap)) {
+		pr_err("regmap lookup for octop failed\n");
+		goto out;
+	}
+
+	mscm_regmap = syscon_regmap_lookup_by_compatible("fsl,vf610-mscm-cpucfg");
+	if (IS_ERR(mscm_regmap)) {
+		pr_err("regmap lookup for mscm failed");
+		goto out;
+	}
+
+	rom_regmap = syscon_regmap_lookup_by_compatible("fsl,vf610-ocrom");
+	if (IS_ERR(rom_regmap)) {
+		pr_err("regmap lookup for ocrom failed");
+		goto out;
+	}
+
+	regmap_read(ocotp_regmap, OCOTP_CFG0_OFFSET, &soc_id1);
+	regmap_read(ocotp_regmap, OCOTP_CFG1_OFFSET, &soc_id2);
+
+	soc_id = (u64) soc_id1 << 32 | soc_id2;
+	add_device_randomness(&soc_id, sizeof(soc_id));
+
+	regmap_read(mscm_regmap, MSCM_CPxCOUNT_OFFSET, &cpxcount);
+	regmap_read(mscm_regmap, MSCM_CPxCFG1_OFFSET, &cpxcfg1);
+
+	soc_type[0] = cpxcount ? '6' : '5'; /* Dual Core => VF6x0 */
+	soc_type[1] = cpxcfg1 ? '1' : '0'; /* L2 Cache => VFx10 */
+
+	regmap_read(rom_regmap, ROM_REVISION_OFFSET, &rom_rev);
+
+	soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+	if (!soc_dev_attr)
+		goto out;
+
+	soc_dev_attr->machine = kasprintf(GFP_KERNEL, "Freescale Vybrid");
+	soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%016llx", soc_id);
+	soc_dev_attr->family = kasprintf(GFP_KERNEL, "Freescale Vybrid VF%s",
+								 soc_type);
+	soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%08x", rom_rev);
+
+	soc_dev = soc_device_register(soc_dev_attr);
+	if (IS_ERR(soc_dev)) {
+		kfree(soc_dev_attr->revision);
+		kfree(soc_dev_attr->family);
+		kfree(soc_dev_attr->soc_id);
+		kfree(soc_dev_attr->machine);
+		kfree(soc_dev_attr);
+		goto out;
+	}
+
+	parent = soc_device_to_device(soc_dev);
+
+out:
+	of_platform_populate(NULL, of_default_bus_match_table, NULL, parent);
+}
 
 static const char * const vf610_dt_compat[] __initconst = {
 	"fsl,vf500",
@@ -23,5 +103,6 @@ static const char * const vf610_dt_compat[] __initconst = {
 DT_MACHINE_START(VYBRID_VF610, "Freescale Vybrid VF5xx/VF6xx (Device Tree)")
 	.l2c_aux_val	= 0,
 	.l2c_aux_mask	= ~0,
+	.init_machine = vf610_init_machine,
 	.dt_compat	= vf610_dt_compat,
 MACHINE_END
-- 
2.4.1

Re: [PATCH v1 2/2] ARM: vf610: Add SoC bus support for Vybrid

[Shawn Guo]

On Mon, May 18, 2015 at 11:50:07AM +0530, Sanchayan Maity wrote:
> Implements SoC bus support to export SoC specific information. Read
> the unique SoC ID from the Vybrid On Chip One Time Programmable
> (OCOTP) controller, SoC specific information from the Miscellaneous
> System Control Module (MSCM), revision from the ROM revision register
> and expose it via the SoC bus infrastructure.
> 
> Sample Output:
> 
> root@vf:/sys/devices/soc0# cat soc_id
> df63c12a2e2161d4
> root@vf:/sys/devices/soc0# cat family
> Freescale Vybrid VF500
> root@vf:/sys/devices/soc0# cat revision
> 00000013
> root@vf:/sys/devices/soc0# cat machine
> Freescale Vybrid
> 
> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
> ---
>  arch/arm/mach-imx/mach-vf610.c | 81 ++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 81 insertions(+)
> 
> diff --git a/arch/arm/mach-imx/mach-vf610.c b/arch/arm/mach-imx/mach-vf610.c
> index 2e7c75b..64c78e4 100644
> --- a/arch/arm/mach-imx/mach-vf610.c
> +++ b/arch/arm/mach-imx/mach-vf610.c
> @@ -11,6 +11,86 @@
>  #include <linux/irqchip.h>
>  #include <asm/mach/arch.h>
>  #include <asm/hardware/cache-l2x0.h>
> +#include <linux/slab.h>
> +#include <linux/sys_soc.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/regmap.h>
> +#include <linux/random.h>

Please group <linux/*> headers together and sort alphabetically.

Shawn

Re: [PATCH v1 2/2] ARM: vf610: Add SoC bus support for Vybrid

[maitysanchayan]

Hello Shawn,

On 15-05-19 14:24:13, Shawn Guo wrote:
> On Mon, May 18, 2015 at 11:50:07AM +0530, Sanchayan Maity wrote:
> > Implements SoC bus support to export SoC specific information. Read
> > the unique SoC ID from the Vybrid On Chip One Time Programmable
> > (OCOTP) controller, SoC specific information from the Miscellaneous
> > System Control Module (MSCM), revision from the ROM revision register
> > and expose it via the SoC bus infrastructure.
> > 
> > Sample Output:
> > 
> > root@vf:/sys/devices/soc0# cat soc_id
> > df63c12a2e2161d4
> > root@vf:/sys/devices/soc0# cat family
> > Freescale Vybrid VF500
> > root@vf:/sys/devices/soc0# cat revision
> > 00000013
> > root@vf:/sys/devices/soc0# cat machine
> > Freescale Vybrid
> > 
> > Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
> > ---
> >  arch/arm/mach-imx/mach-vf610.c | 81 ++++++++++++++++++++++++++++++++++++++++++
> >  1 file changed, 81 insertions(+)
> > 
> > diff --git a/arch/arm/mach-imx/mach-vf610.c b/arch/arm/mach-imx/mach-vf610.c
> > index 2e7c75b..64c78e4 100644
> > --- a/arch/arm/mach-imx/mach-vf610.c
> > +++ b/arch/arm/mach-imx/mach-vf610.c
> > @@ -11,6 +11,86 @@
> >  #include <linux/irqchip.h>
> >  #include <asm/mach/arch.h>
> >  #include <asm/hardware/cache-l2x0.h>
> > +#include <linux/slab.h>
> > +#include <linux/sys_soc.h>
> > +#include <linux/mfd/syscon.h>
> > +#include <linux/regmap.h>
> > +#include <linux/random.h>
> 
> Please group <linux/*> headers together and sort alphabetically.

Ok. Will fix this and send out a v2. The rest is acceptable?

> 
> Shawn

Thanks & Regards,
Sanchayan Maity.

Re: [PATCH v1 2/2] ARM: vf610: Add SoC bus support for Vybrid

[Shawn Guo]

On Tue, May 19, 2015 at 03:12:23PM +0530, maitysanchayan@gmail.com wrote:
> Hello Shawn,
> 
> On 15-05-19 14:24:13, Shawn Guo wrote:
> > On Mon, May 18, 2015 at 11:50:07AM +0530, Sanchayan Maity wrote:
> > > Implements SoC bus support to export SoC specific information. Read
> > > the unique SoC ID from the Vybrid On Chip One Time Programmable
> > > (OCOTP) controller, SoC specific information from the Miscellaneous
> > > System Control Module (MSCM), revision from the ROM revision register
> > > and expose it via the SoC bus infrastructure.
> > > 
> > > Sample Output:
> > > 
> > > root@vf:/sys/devices/soc0# cat soc_id
> > > df63c12a2e2161d4
> > > root@vf:/sys/devices/soc0# cat family
> > > Freescale Vybrid VF500
> > > root@vf:/sys/devices/soc0# cat revision
> > > 00000013
> > > root@vf:/sys/devices/soc0# cat machine
> > > Freescale Vybrid
> > > 
> > > Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
> > > ---
> > >  arch/arm/mach-imx/mach-vf610.c | 81 ++++++++++++++++++++++++++++++++++++++++++
> > >  1 file changed, 81 insertions(+)
> > > 
> > > diff --git a/arch/arm/mach-imx/mach-vf610.c b/arch/arm/mach-imx/mach-vf610.c
> > > index 2e7c75b..64c78e4 100644
> > > --- a/arch/arm/mach-imx/mach-vf610.c
> > > +++ b/arch/arm/mach-imx/mach-vf610.c
> > > @@ -11,6 +11,86 @@
> > >  #include <linux/irqchip.h>
> > >  #include <asm/mach/arch.h>
> > >  #include <asm/hardware/cache-l2x0.h>
> > > +#include <linux/slab.h>
> > > +#include <linux/sys_soc.h>
> > > +#include <linux/mfd/syscon.h>
> > > +#include <linux/regmap.h>
> > > +#include <linux/random.h>
> > 
> > Please group <linux/*> headers together and sort alphabetically.
> 
> Ok. Will fix this and send out a v2. The rest is acceptable?

I'm fine with the rest, but would need an ACK from Stefan to apply the
patch.

Shawn