BCM2835 auxiliary peripheral clocks.

BCM2835 auxiliary peripheral clocks.

[Eric Anholt]

This is a followup to the main audio domain clocks series I just
posted.  There's a clock gate register controlling the clocks for a
few extra peripherals, and Martin Sperl has been working on the SPI
driver for 2/3 of them (the other is a simple UART).  This gives those
drivers the clock gate enable they need to access their registers.

The full series is available for testing at:

https://github.com/anholt/linux/tree/bcm2385-clock-aux

[PATCH 1/3] clk: bcm2835: Add bindings for the auxiliary peripheral clock gates.

[Eric Anholt]

These will be used for enabling UART1, SPI1, and SPI2.

Signed-off-by: Eric Anholt <eric@anholt.net>
---
 .../bindings/clock/brcm,bcm2835-aux-clock.txt      | 30 ++++++++++++++++++++++
 include/dt-bindings/clock/bcm2835-aux.h            | 17 ++++++++++++
 2 files changed, 47 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm2835-aux-clock.txt
 create mode 100644 include/dt-bindings/clock/bcm2835-aux.h

diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm2835-aux-clock.txt b/Documentation/devicetree/bindings/clock/brcm,bcm2835-aux-clock.txt
new file mode 100644
index 0000000..f5ce80a
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/brcm,bcm2835-aux-clock.txt
@@ -0,0 +1,30 @@
+Broadcom BCM2835 auxiliary peripheral clocks
+
+This binding uses the common clock binding:
+    Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+This controls the clock gating for the BCM2835 auxiliary peripherals
+(UART, SPI1, and SPI2).
+
+Required properties:
+- compatible:	Should be "brcm,bcm2835-aux-clock"
+- #clock-cells:	Should be <1>. The permitted clock-specifier values can be
+		  found in include/dt-bindings/clock/bcm2835-aux.h
+- reg:		Specifies base physical address and size of the gate register
+- clocks:	The parent clock phandle
+
+Example:
+
+	clocks: cprman@7e101000 {
+		compatible = "brcm,bcm2835-cprman";
+		#clock-cells = <1>;
+		reg = <0x7e101000 0x2000>;
+		clocks = <&clk_osc>;
+	};
+
+	aux_clocks: aux-clocks@0x7e215004 {
+		compatible = "brcm,bcm2835-aux-clock";
+		#clock-cells = <1>;
+		reg = <0x7e215004 0x4>;
+		clocks = <&clocks BCM2835_CLOCK_VPU>;
+	};
diff --git a/include/dt-bindings/clock/bcm2835-aux.h b/include/dt-bindings/clock/bcm2835-aux.h
new file mode 100644
index 0000000..d91156e
--- /dev/null
+++ b/include/dt-bindings/clock/bcm2835-aux.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#define BCM2835_AUX_CLOCK_UART		0
+#define BCM2835_AUX_CLOCK_SPI1		1
+#define BCM2835_AUX_CLOCK_SPI2		2
+#define BCM2835_AUX_CLOCK_COUNT		3
-- 
2.1.4

[PATCH 2/3] clk: bcm2835: Add a driver for the auxiliary peripheral clock gates.

[Eric Anholt]

There are a pair of SPI masters and a mini UART that were last minute
additions.  As a result, they didn't get integrated in the same way as
the other gates off of the VPU clock in CPRMAN.

Signed-off-by: Eric Anholt <eric@anholt.net>
---
 drivers/clk/bcm/Makefile          |  1 +
 drivers/clk/bcm/clk-bcm2835-aux.c | 80 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 81 insertions(+)
 create mode 100644 drivers/clk/bcm/clk-bcm2835-aux.c

diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
index ee2349b..3082d68 100644
--- a/drivers/clk/bcm/Makefile
+++ b/drivers/clk/bcm/Makefile
@@ -4,4 +4,5 @@ obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm281xx.o
 obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm21664.o
 obj-$(CONFIG_COMMON_CLK_IPROC)	+= clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o
 obj-$(CONFIG_ARCH_BCM2835)	+= clk-bcm2835.o
+obj-$(CONFIG_ARCH_BCM2835)	+= clk-bcm2835-aux.o
 obj-$(CONFIG_ARCH_BCM_CYGNUS)	+= clk-cygnus.o
diff --git a/drivers/clk/bcm/clk-bcm2835-aux.c b/drivers/clk/bcm/clk-bcm2835-aux.c
new file mode 100644
index 0000000..1efa6fb
--- /dev/null
+++ b/drivers/clk/bcm/clk-bcm2835-aux.c
@@ -0,0 +1,80 @@
+/*
+ * Copyright (C) 2015 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/bcm2835.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <dt-bindings/clock/bcm2835-aux.h>
+
+static int bcm2835_aux_clk_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct clk_onecell_data *onecell;
+	const char *parent;
+	struct clk *parent_clk;
+	void __iomem *reg;
+
+	parent_clk = of_clk_get(dev->of_node, 0);
+	if (IS_ERR(parent_clk))
+		return PTR_ERR(parent_clk);
+	parent = __clk_get_name(parent_clk);
+
+	reg = of_iomap(dev->of_node, 0);
+	if (!reg)
+		return -ENODEV;
+
+	onecell = kmalloc(sizeof(*onecell), GFP_KERNEL);
+	if (!onecell)
+		return -ENOMEM;
+	onecell->clk_num = BCM2835_AUX_CLOCK_COUNT;
+	onecell->clks = kzalloc(sizeof(*onecell->clks) *
+				BCM2835_AUX_CLOCK_COUNT, GFP_KERNEL);
+	if (!onecell->clks)
+		return -ENOMEM;
+
+	onecell->clks[BCM2835_AUX_CLOCK_UART] =
+		clk_register_gate(dev, "aux_uart", parent, 0, reg, 0, 0, NULL);
+
+	onecell->clks[BCM2835_AUX_CLOCK_SPI1] =
+		clk_register_gate(dev, "aux_spi1", parent, 0, reg, 1, 0, NULL);
+
+	onecell->clks[BCM2835_AUX_CLOCK_SPI2] =
+		clk_register_gate(dev, "aux_spi2", parent, 0, reg, 2, 0, NULL);
+
+	return of_clk_add_provider(pdev->dev.of_node, of_clk_src_onecell_get,
+				   onecell);
+}
+
+static const struct of_device_id bcm2835_aux_clk_of_match[] = {
+	{ .compatible = "brcm,bcm2835-aux-clock", },
+	{},
+};
+MODULE_DEVICE_TABLE(of, bcm2835_aux_clk_of_match);
+
+static struct platform_driver bcm2835_aux_clk_driver = {
+	.driver = {
+		.name = "bcm2835-aux-clk",
+		.of_match_table = bcm2835_aux_clk_of_match,
+	},
+	.probe          = bcm2835_aux_clk_probe,
+};
+builtin_platform_driver(bcm2835_aux_clk_driver);
+
+MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
+MODULE_DESCRIPTION("BCM2835 auxiliary peripheral clock driver");
+MODULE_LICENSE("GPL v2");
-- 
2.1.4

[PATCH 3/3] ARM: bcm2835: Add the auxiliary clocks to the device tree.

[Eric Anholt]

These will be used for enabling UART1, SPI1, and SPI2.

Signed-off-by: Eric Anholt <eric@anholt.net>
---
 arch/arm/boot/dts/bcm2835.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index a6a55b7..7c37956 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -73,6 +73,13 @@
 			clocks = <&clk_osc>;
 		};
 
+		aux_clocks: aux-clocks@0x7e215004 {
+			compatible = "brcm,bcm2835-aux-clock";
+			#clock-cells = <1>;
+			reg = <0x7e215004 0x4>;
+			clocks = <&clocks BCM2835_CLOCK_VPU>;
+		};
+
 		rng@7e104000 {
 			compatible = "brcm,bcm2835-rng";
 			reg = <0x7e104000 0x10>;
-- 
2.1.4

Re: [PATCH 2/3] clk: bcm2835: Add a driver for the auxiliary peripheral clock gates.

[Martin Sperl]

> On 11.09.2015, at 00:22, Eric Anholt <eric@anholt.net> wrote:
> 
> There are a pair of SPI masters and a mini UART that were last minute
> additions.  As a result, they didn't get integrated in the same way as
> the other gates off of the VPU clock in CPRMAN.
> 
> Signed-off-by: Eric Anholt <eric@anholt.net>
> ---

Tested with the spi-bcm2835aux driver and it works perfectly.
I will now post the latest incarnation of the driver for inclusion.

I have also tested with the uart1 and it works in principle.

Note that there is one issue (as mentioned elsewhere) with uart1:
the 8250 serial driver has a (hardcoded) internal clock divider 16,
while the hardware has an internal divider of 8.

This results in baud rates that are a factor of 2 higher than requested.

Tested-by: Martin Sperl <kernel@martin.sperl.org>

Re: [PATCH 2/3] clk: bcm2835: Add a driver for the auxiliary peripheral clock gates.

[Stephen Warren]

On 09/10/2015 03:22 PM, Eric Anholt wrote:
> There are a pair of SPI masters and a mini UART that were last minute
> additions.  As a result, they didn't get integrated in the same way as
> the other gates off of the VPU clock in CPRMAN.

> diff --git a/drivers/clk/bcm/clk-bcm2835-aux.c b/drivers/clk/bcm/clk-bcm2835-aux.c

> +static int bcm2835_aux_clk_probe(struct platform_device *pdev)
> +{
> +	struct device *dev = &pdev->dev;
> +	struct clk_onecell_data *onecell;
> +	const char *parent;
> +	struct clk *parent_clk;
> +	void __iomem *reg;
> +
> +	parent_clk = of_clk_get(dev->of_node, 0);
> +	if (IS_ERR(parent_clk))
> +		return PTR_ERR(parent_clk);
> +	parent = __clk_get_name(parent_clk);

I think all the comments I made on probe() for the main bcm2835 clock
driver likely apply here too.

Also, is it "legal" for clock drivers to use __clk_get_name()? I thought
that was a clock core internal function, but may be wrong. I would have
expected to be able to pass a clock object when registering clocks
rather than a clock name, but oh well.

BTW, I like how this series shows how useful it is for someone with full
knowledge of the HW to come up with the DT bindings for a HW module;
once you know how the HW is actually designed, the correct binding ends
up being a lot easier to come up with, rather than guessing:-)

Re: [PATCH 3/3] ARM: bcm2835: Add the auxiliary clocks to the device tree.

[Stephen Warren]

On 09/10/2015 03:22 PM, Eric Anholt wrote:
> These will be used for enabling UART1, SPI1, and SPI2.

Patches 1, 3,
Acked-by: Stephen Warren <swarren@wwwdotorg.org>

Re: [PATCH 3/3] ARM: bcm2835: Add the auxiliary clocks to the device tree.

[Stephen Warren]

On 09/10/2015 03:22 PM, Eric Anholt wrote:
> These will be used for enabling UART1, SPI1, and SPI2.

> diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi

> +		aux_clocks: aux-clocks@0x7e215004 {
> +			compatible = "brcm,bcm2835-aux-clock";
> +			#clock-cells = <1>;
> +			reg = <0x7e215004 0x4>;

Actually, I take back the ack on this patch. This HW module has two
registers. The reg property should include both of those registers so
that if SW needs to start using the other register at some time in the
future, the entire set of registers is already represented in DT.

Re: [PATCH 3/3] ARM: bcm2835: Add the auxiliary clocks to the device tree.

[Eric Anholt]

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Stephen Warren <swarren@wwwdotorg.org> writes:

> On 09/10/2015 03:22 PM, Eric Anholt wrote:
>> These will be used for enabling UART1, SPI1, and SPI2.
>
>> diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
>
>> +		aux_clocks: aux-clocks@0x7e215004 {
>> +			compatible = "brcm,bcm2835-aux-clock";
>> +			#clock-cells = <1>;
>> +			reg = <0x7e215004 0x4>;
>
> Actually, I take back the ack on this patch. This HW module has two
> registers. The reg property should include both of those registers so
> that if SW needs to start using the other register at some time in the
> future, the entire set of registers is already represented in DT.

If I changed it to "reg = <0x7e215000 0x8>" and use a #define for the
clock register offset in patch 2/3, would I then have your ack?

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Re: [PATCH 3/3] ARM: bcm2835: Add the auxiliary clocks to the device tree.

[Stephen Warren]

On 09/28/2015 01:26 PM, Eric Anholt wrote:
> Stephen Warren <swarren@wwwdotorg.org> writes:
>
>> On 09/10/2015 03:22 PM, Eric Anholt wrote:
>>> These will be used for enabling UART1, SPI1, and SPI2.
>>
>>> diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
>>
>>> +		aux_clocks: aux-clocks@0x7e215004 {
>>> +			compatible = "brcm,bcm2835-aux-clock";
>>> +			#clock-cells = <1>;
>>> +			reg = <0x7e215004 0x4>;
>>
>> Actually, I take back the ack on this patch. This HW module has two
>> registers. The reg property should include both of those registers so
>> that if SW needs to start using the other register at some time in the
>> future, the entire set of registers is already represented in DT.
>
> If I changed it to "reg = <0x7e215000 0x8>" and use a #define for the
> clock register offset in patch 2/3, would I then have your ack?

I suspect the compatible should then be "brcm,bcm2835-aux" (or similar) 
since the node would represent the entire aux module, not just the clock 
gate feature of the module (assuming there are other features in the aux 
module besides just the clock gate).

With the reg change and the compatible change if appropriate, you can 
have my ack,
Acked-by: Stephen Warren <swarren@wwwdotorg.org>

Re: [PATCH 2/3] clk: bcm2835: Add a driver for the auxiliary peripheral clock gates.

[Stephen Boyd]

On 09/10, Eric Anholt wrote:
> diff --git a/drivers/clk/bcm/clk-bcm2835-aux.c b/drivers/clk/bcm/clk-bcm2835-aux.c
> new file mode 100644
> index 0000000..1efa6fb
> --- /dev/null
> +++ b/drivers/clk/bcm/clk-bcm2835-aux.c
> @@ -0,0 +1,80 @@
> +/*
> + * Copyright (C) 2015 Broadcom
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/clk-provider.h>
> +#include <linux/clkdev.h>

Is this include used?

> +#include <linux/clk/bcm2835.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/platform_device.h>
> +#include <dt-bindings/clock/bcm2835-aux.h>
> +
> +static int bcm2835_aux_clk_probe(struct platform_device *pdev)
> +{
> +	struct device *dev = &pdev->dev;
> +	struct clk_onecell_data *onecell;
> +	const char *parent;
> +	struct clk *parent_clk;
> +	void __iomem *reg;
> +
> +	parent_clk = of_clk_get(dev->of_node, 0);
> +	if (IS_ERR(parent_clk))
> +		return PTR_ERR(parent_clk);

We have a device, any reason we can't use clk_get() directly?

> +	parent = __clk_get_name(parent_clk);
> +
> +	reg = of_iomap(dev->of_node, 0);

We have a platform device here, why aren't we using platform
device APIs like platform_get_resource() and
devm_ioremap_resource()?

> +	if (!reg)
> +		return -ENODEV;
> +
> +	onecell = kmalloc(sizeof(*onecell), GFP_KERNEL);
> +	if (!onecell)
> +		return -ENOMEM;
> +	onecell->clk_num = BCM2835_AUX_CLOCK_COUNT;
> +	onecell->clks = kzalloc(sizeof(*onecell->clks) *

kcalloc?

> +				BCM2835_AUX_CLOCK_COUNT, GFP_KERNEL);
> +	if (!onecell->clks)
> +		return -ENOMEM;
> +

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