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From: Rob Herring <robh@kernel.org>
To: Doug Anderson <dianders@chromium.org>
Cc: Shawn Lin <shawn.lin@rock-chips.com>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"open list:ARM/Rockchip SoC..."
	<linux-rockchip@lists.infradead.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Wenrui Li <wenrui.li@rock-chips.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCH v2 1/2] Documentation: bindings: add dt documentation for Rockchip PCIe PHY
Date: Thu, 16 Jun 2016 13:46:32 -0500	[thread overview]
Message-ID: <20160616184632.GA1112@rob-hp-laptop> (raw)
In-Reply-To: <CAD=FV=Ubm8goQ4J=T11mWmAZrP+J7YYWdxACGjAhdsONyzPdKQ@mail.gmail.com>

On Tue, Jun 14, 2016 at 10:27:46AM -0700, Doug Anderson wrote:
> Hi,
> 
> On Mon, Jun 13, 2016 at 5:44 PM, Shawn Lin <shawn.lin@rock-chips.com> wrote:
> > This patch adds a binding that describes the Rockchip PCIe PHY
> > found on Rockchip SoCs PCIe interface.
> >
> > Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> >
> > ---
> >
> > Changes in v2:
> > - add clk and reset description
> > - remove unit-address
> >
> >  .../devicetree/bindings/phy/rockchip-pcie-phy.txt  | 32 ++++++++++++++++++++++
> >  1 file changed, 32 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt
> >
> > diff --git a/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt
> > new file mode 100644
> > index 0000000..ad55c67
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt
> > @@ -0,0 +1,32 @@
> > +Rockchip PCIE PHY
> > +-----------------------
> > +
> > +Required properties:
> > + - compatible: rockchip,rk3399-pcie-phy
> > + - #phy-cells: must be 0
> > + - clocks: Must contain an entry in clock-names.
> > +       See ../clocks/clock-bindings.txt for details.
> > + - clock-names: Must be "refclk"
> > + - resets: Must contain an entry in reset-names.
> > +       See ../reset/reset.txt for details.
> > + - reset-names: Must be "phy"
> > +
> > +Example:
> > +
> > +grf: syscon@ff770000 {
> > +       compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
> > +       #address-cells = <1>;
> > +       #size-cells = <1>;
> > +
> > +       ...
> > +
> > +       pcie-phy: phy {
> 
> Just calling this node "phy" isn't a good idea.  There will be
> multiple PHYs under the GRF and they can't all have a subnode named
> "phy".

There's no register range that can be associated with the phy?
> 
> Also: at least in Rockchip device trees usually aliases use
> underscores whereas node names use dashes.  I'm not actually sure what
> the official device tree policy is on this, but it's what I've seen
> done.  So this should actually be:

Labels don't matter as they don't end up in the dtb. Node names should 
be generic. though we've only defined a small set of generic names. And 
yes, use '-' not '_'.

Rob

  reply	other threads:[~2016-06-16 18:46 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-14  0:44 [PATCH v2 1/2] Documentation: bindings: add dt documentation for Rockchip PCIe PHY Shawn Lin
2016-06-14 17:27 ` Doug Anderson
2016-06-16 18:46   ` Rob Herring [this message]
2016-06-16 19:38     ` Heiko Stübner

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