From: Peter Zijlstra <peterz@infradead.org>
To: "Odzioba, Lukasz" <lukasz.odzioba@intel.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"x86@kernel.org" <x86@kernel.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"mingo@redhat.com" <mingo@redhat.com>,
"hpa@zytor.com" <hpa@zytor.com>,
"ak@linux.intel.com" <ak@linux.intel.com>,
"Liang, Kan" <kan.liang@intel.com>,
"akpm@linux-foundation.org" <akpm@linux-foundation.org>,
"eranian@google.com" <eranian@google.com>,
"acme@kernel.org" <acme@kernel.org>,
"alexander.shishkin@linux.intel.com"
<alexander.shishkin@linux.intel.com>, "bp@suse.de" <bp@suse.de>,
"Anaczkowski, Lukasz" <lukasz.anaczkowski@intel.com>
Subject: Re: [PATCH 1/1] perf/x86/intel: Add extended event constraints for Knights Landing
Date: Tue, 21 Jun 2016 11:37:39 +0200 [thread overview]
Message-ID: <20160621093739.GO30154@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <D6EDEBF1F91015459DB866AC4EE162CC023FC273@IRSMSX103.ger.corp.intel.com>
On Mon, Jun 20, 2016 at 10:26:30AM +0000, Odzioba, Lukasz wrote:
> On 08.06.2016 Peter Zijlstra wrote:
> > How does this work in the light of intel_alt_er() ?
>
> Hi Peter,
>
> If the constrained bit is valid on only one of the OCR MSRs (like in case of KNL),
> then OCR valid mask will forbid altering it by the other MSR in intel_alt_er.
Yes, that is the intent, but how is this achieved? I'm not sure I see
how the patch ensure this.
Also, intel_get_event_constraints() has a path where it copies the
constraint, should it not also copy the new field?
next prev parent reply other threads:[~2016-06-21 10:34 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-08 4:02 [PATCH 1/1] perf/x86/intel: Add extended event constraints for Knights Landing Lukasz Odzioba
2016-06-08 6:48 ` Peter Zijlstra
2016-06-20 10:26 ` Odzioba, Lukasz
2016-06-21 9:37 ` Peter Zijlstra [this message]
2016-06-24 14:54 ` Odzioba, Lukasz
2016-06-24 17:04 ` Stephane Eranian
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