* [PATCH v3 1/7] mach-aspeed: Select pinctrl drivers
2016-08-30 7:55 [PATCH v3 0/7] aspeed: Integrate pinctrl and gpio drivers Andrew Jeffery
@ 2016-08-30 7:55 ` Andrew Jeffery
2016-08-30 7:55 ` [PATCH v3 2/7] mach-aspeed: Select GPIO driver Andrew Jeffery
` (6 subsequent siblings)
7 siblings, 0 replies; 13+ messages in thread
From: Andrew Jeffery @ 2016-08-30 7:55 UTC (permalink / raw)
To: Joel Stanley
Cc: Russell King, Mark Rutland, Rob Herring, Benjamin Herrenschmidt,
Jeremy Kerr, devicetree, linux-arm-kernel, linux-kernel,
Andrew Jeffery
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
arch/arm/mach-aspeed/Kconfig | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-aspeed/Kconfig b/arch/arm/mach-aspeed/Kconfig
index 5225fbcb250d..f3f8c5c658db 100644
--- a/arch/arm/mach-aspeed/Kconfig
+++ b/arch/arm/mach-aspeed/Kconfig
@@ -5,6 +5,8 @@ menuconfig ARCH_ASPEED
select WATCHDOG
select ASPEED_WATCHDOG
select MOXART_TIMER
+ select MFD_SYSCON
+ select PINCTRL
help
Say Y here if you want to run your kernel on an ASpeed BMC SoC.
@@ -14,6 +16,7 @@ config MACH_ASPEED_G4
bool "Aspeed SoC 4th Generation"
depends on ARCH_MULTI_V5
select CPU_ARM926T
+ select PINCTRL_ASPEED_G4
help
Say yes if you intend to run on an Aspeed ast2400 or similar
fourth generation BMCs, such as those used by OpenPower Power8
@@ -23,6 +26,7 @@ config MACH_ASPEED_G5
bool "Aspeed SoC 5th Generation"
depends on ARCH_MULTI_V6
select CPU_V6
+ select PINCTRL_ASPEED_G5
help
Say yes if you intend to run on an Aspeed ast2500 or similar
fifth generation Aspeed BMCs.
--
2.9.3.1.g0db844e
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v3 2/7] mach-aspeed: Select GPIO driver
2016-08-30 7:55 [PATCH v3 0/7] aspeed: Integrate pinctrl and gpio drivers Andrew Jeffery
2016-08-30 7:55 ` [PATCH v3 1/7] mach-aspeed: Select pinctrl drivers Andrew Jeffery
@ 2016-08-30 7:55 ` Andrew Jeffery
2016-09-13 12:43 ` Joel Stanley
2016-08-30 7:55 ` [PATCH v3 3/7] aspeed-g4: Add syscon and pin controller nodes Andrew Jeffery
` (5 subsequent siblings)
7 siblings, 1 reply; 13+ messages in thread
From: Andrew Jeffery @ 2016-08-30 7:55 UTC (permalink / raw)
To: Joel Stanley
Cc: Russell King, Mark Rutland, Rob Herring, Benjamin Herrenschmidt,
Jeremy Kerr, devicetree, linux-arm-kernel, linux-kernel,
Andrew Jeffery
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
arch/arm/mach-aspeed/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-aspeed/Kconfig b/arch/arm/mach-aspeed/Kconfig
index f3f8c5c658db..5aba9598f821 100644
--- a/arch/arm/mach-aspeed/Kconfig
+++ b/arch/arm/mach-aspeed/Kconfig
@@ -7,6 +7,8 @@ menuconfig ARCH_ASPEED
select MOXART_TIMER
select MFD_SYSCON
select PINCTRL
+ select GPIOLIB
+ select GPIO_ASPEED
help
Say Y here if you want to run your kernel on an ASpeed BMC SoC.
--
2.9.3.1.g0db844e
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v3 2/7] mach-aspeed: Select GPIO driver
2016-08-30 7:55 ` [PATCH v3 2/7] mach-aspeed: Select GPIO driver Andrew Jeffery
@ 2016-09-13 12:43 ` Joel Stanley
0 siblings, 0 replies; 13+ messages in thread
From: Joel Stanley @ 2016-09-13 12:43 UTC (permalink / raw)
To: Andrew Jeffery
Cc: Russell King, Mark Rutland, Rob Herring, Benjamin Herrenschmidt,
Jeremy Kerr, devicetree, linux-arm-kernel, linux-kernel
On Tue, Aug 30, 2016 at 5:25 PM, Andrew Jeffery <andrew@aj.id.au> wrote:
> diff --git a/arch/arm/mach-aspeed/Kconfig b/arch/arm/mach-aspeed/Kconfig
> index f3f8c5c658db..5aba9598f821 100644
> --- a/arch/arm/mach-aspeed/Kconfig
> +++ b/arch/arm/mach-aspeed/Kconfig
> @@ -7,6 +7,8 @@ menuconfig ARCH_ASPEED
> select MOXART_TIMER
> select MFD_SYSCON
> select PINCTRL
> + select GPIOLIB
> + select GPIO_ASPEED
GPIO_ASPEED is a tristate, so if we select it in ARCH_ASPEED all users
of the driver will have it selected.
I think I will drop this patch so we still have the option of building
the gpio driver as a module. Otherwise, we should change the GPIO
driver to be built in.
Cheers,
Joel
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v3 3/7] aspeed-g4: Add syscon and pin controller nodes
2016-08-30 7:55 [PATCH v3 0/7] aspeed: Integrate pinctrl and gpio drivers Andrew Jeffery
2016-08-30 7:55 ` [PATCH v3 1/7] mach-aspeed: Select pinctrl drivers Andrew Jeffery
2016-08-30 7:55 ` [PATCH v3 2/7] mach-aspeed: Select GPIO driver Andrew Jeffery
@ 2016-08-30 7:55 ` Andrew Jeffery
2016-08-30 7:55 ` [PATCH v3 4/7] palmetto: Request relevant mux functions in devicetree Andrew Jeffery
` (4 subsequent siblings)
7 siblings, 0 replies; 13+ messages in thread
From: Andrew Jeffery @ 2016-08-30 7:55 UTC (permalink / raw)
To: Joel Stanley
Cc: Russell King, Mark Rutland, Rob Herring, Benjamin Herrenschmidt,
Jeremy Kerr, devicetree, linux-arm-kernel, linux-kernel,
Andrew Jeffery
The pin controller's child nodes expose the functions currently
implemented in the the g4 pin controller driver.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
arch/arm/boot/dts/aspeed-g4.dtsi | 420 +++++++++++++++++++++++++++++++++++++++
1 file changed, 420 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 22dee5937d5c..a5d6e81e318a 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -54,6 +54,426 @@
clocks = <&clk_clkin>;
};
+ syscon: syscon@1e6e2000 {
+ compatible = "aspeed,g4-scu", "syscon", "simple-mfd";
+ reg = <0x1e6e2000 0x1a8>;
+
+ pinctrl: pinctrl {
+ compatible = "aspeed,g4-pinctrl";
+
+ pinctrl_acpi_default: acpi_default {
+ function = "ACPI";
+ groups = "ACPI";
+ };
+
+ pinctrl_bmcint_default: bmcint_default {
+ function = "BMCINT";
+ groups = "BMCINT";
+ };
+
+ pinctrl_ddcclk_default: ddcclk_default {
+ function = "DDCCLK";
+ groups = "DDCCLK";
+ };
+
+ pinctrl_ddcdat_default: ddcdat_default {
+ function = "DDCDAT";
+ groups = "DDCDAT";
+ };
+
+ pinctrl_flack_default: flack_default {
+ function = "FLACK";
+ groups = "FLACK";
+ };
+
+ pinctrl_flbusy_default: flbusy_default {
+ function = "FLBUSY";
+ groups = "FLBUSY";
+ };
+
+ pinctrl_flwp_default: flwp_default {
+ function = "FLWP";
+ groups = "FLWP";
+ };
+
+ pinctrl_gpid0_default: gpid0_default {
+ function = "GPID0";
+ groups = "GPID0";
+ };
+
+ pinctrl_gpie0_default: gpie0_default {
+ function = "GPIE0";
+ groups = "GPIE0";
+ };
+
+ pinctrl_gpie2_default: gpie2_default {
+ function = "GPIE2";
+ groups = "GPIE2";
+ };
+
+ pinctrl_gpie4_default: gpie4_default {
+ function = "GPIE4";
+ groups = "GPIE4";
+ };
+
+ pinctrl_gpie6_default: gpie6_default {
+ function = "GPIE6";
+ groups = "GPIE6";
+ };
+
+ pinctrl_i2c10_default: i2c10_default {
+ function = "I2C10";
+ groups = "I2C10";
+ };
+
+ pinctrl_i2c11_default: i2c11_default {
+ function = "I2C11";
+ groups = "I2C11";
+ };
+
+ pinctrl_i2c12_default: i2c12_default {
+ function = "I2C12";
+ groups = "I2C12";
+ };
+
+ pinctrl_i2c13_default: i2c13_default {
+ function = "I2C13";
+ groups = "I2C13";
+ };
+
+ pinctrl_i2c3_default: i2c3_default {
+ function = "I2C3";
+ groups = "I2C3";
+ };
+
+ pinctrl_i2c4_default: i2c4_default {
+ function = "I2C4";
+ groups = "I2C4";
+ };
+
+ pinctrl_i2c5_default: i2c5_default {
+ function = "I2C5";
+ groups = "I2C5";
+ };
+
+ pinctrl_i2c6_default: i2c6_default {
+ function = "I2C6";
+ groups = "I2C6";
+ };
+
+ pinctrl_i2c7_default: i2c7_default {
+ function = "I2C7";
+ groups = "I2C7";
+ };
+
+ pinctrl_i2c8_default: i2c8_default {
+ function = "I2C8";
+ groups = "I2C8";
+ };
+
+ pinctrl_i2c9_default: i2c9_default {
+ function = "I2C9";
+ groups = "I2C9";
+ };
+
+ pinctrl_lpcpd_default: lpcpd_default {
+ function = "LPCPD";
+ groups = "LPCPD";
+ };
+
+ pinctrl_lpcpme_default: lpcpme_default {
+ function = "LPCPME";
+ groups = "LPCPME";
+ };
+
+ pinctrl_lpcsmi_default: lpcsmi_default {
+ function = "LPCSMI";
+ groups = "LPCSMI";
+ };
+
+ pinctrl_mdio1_default: mdio1_default {
+ function = "MDIO1";
+ groups = "MDIO1";
+ };
+
+ pinctrl_mdio2_default: mdio2_default {
+ function = "MDIO2";
+ groups = "MDIO2";
+ };
+
+ pinctrl_ncts1_default: ncts1_default {
+ function = "NCTS1";
+ groups = "NCTS1";
+ };
+
+ pinctrl_ncts3_default: ncts3_default {
+ function = "NCTS3";
+ groups = "NCTS3";
+ };
+
+ pinctrl_ncts4_default: ncts4_default {
+ function = "NCTS4";
+ groups = "NCTS4";
+ };
+
+ pinctrl_ndcd1_default: ndcd1_default {
+ function = "NDCD1";
+ groups = "NDCD1";
+ };
+
+ pinctrl_ndcd3_default: ndcd3_default {
+ function = "NDCD3";
+ groups = "NDCD3";
+ };
+
+ pinctrl_ndcd4_default: ndcd4_default {
+ function = "NDCD4";
+ groups = "NDCD4";
+ };
+
+ pinctrl_ndsr1_default: ndsr1_default {
+ function = "NDSR1";
+ groups = "NDSR1";
+ };
+
+ pinctrl_ndsr3_default: ndsr3_default {
+ function = "NDSR3";
+ groups = "NDSR3";
+ };
+
+ pinctrl_ndtr1_default: ndtr1_default {
+ function = "NDTR1";
+ groups = "NDTR1";
+ };
+
+ pinctrl_ndtr3_default: ndtr3_default {
+ function = "NDTR3";
+ groups = "NDTR3";
+ };
+
+ pinctrl_nri1_default: nri1_default {
+ function = "NRI1";
+ groups = "NRI1";
+ };
+
+ pinctrl_nri3_default: nri3_default {
+ function = "NRI3";
+ groups = "NRI3";
+ };
+
+ pinctrl_nri4_default: nri4_default {
+ function = "NRI4";
+ groups = "NRI4";
+ };
+
+ pinctrl_nrts1_default: nrts1_default {
+ function = "NRTS1";
+ groups = "NRTS1";
+ };
+
+ pinctrl_nrts3_default: nrts3_default {
+ function = "NRTS3";
+ groups = "NRTS3";
+ };
+
+ pinctrl_pwm0_default: pwm0_default {
+ function = "PWM0";
+ groups = "PWM0";
+ };
+
+ pinctrl_pwm1_default: pwm1_default {
+ function = "PWM1";
+ groups = "PWM1";
+ };
+
+ pinctrl_pwm2_default: pwm2_default {
+ function = "PWM2";
+ groups = "PWM2";
+ };
+
+ pinctrl_pwm3_default: pwm3_default {
+ function = "PWM3";
+ groups = "PWM3";
+ };
+
+ pinctrl_pwm4_default: pwm4_default {
+ function = "PWM4";
+ groups = "PWM4";
+ };
+
+ pinctrl_pwm5_default: pwm5_default {
+ function = "PWM5";
+ groups = "PWM5";
+ };
+
+ pinctrl_pwm6_default: pwm6_default {
+ function = "PWM6";
+ groups = "PWM6";
+ };
+
+ pinctrl_pwm7_default: pwm7_default {
+ function = "PWM7";
+ groups = "PWM7";
+ };
+
+ pinctrl_rgmii1_default: rgmii1_default {
+ function = "RGMII1";
+ groups = "RGMII1";
+ };
+
+ pinctrl_rmii1_default: rmii1_default {
+ function = "RMII1";
+ groups = "RMII1";
+ };
+
+ pinctrl_rom16_default: rom16_default {
+ function = "ROM16";
+ groups = "ROM16";
+ };
+
+ pinctrl_rom8_default: rom8_default {
+ function = "ROM8";
+ groups = "ROM8";
+ };
+
+ pinctrl_romcs1_default: romcs1_default {
+ function = "ROMCS1";
+ groups = "ROMCS1";
+ };
+
+ pinctrl_romcs2_default: romcs2_default {
+ function = "ROMCS2";
+ groups = "ROMCS2";
+ };
+
+ pinctrl_romcs3_default: romcs3_default {
+ function = "ROMCS3";
+ groups = "ROMCS3";
+ };
+
+ pinctrl_romcs4_default: romcs4_default {
+ function = "ROMCS4";
+ groups = "ROMCS4";
+ };
+
+ pinctrl_rxd1_default: rxd1_default {
+ function = "RXD1";
+ groups = "RXD1";
+ };
+
+ pinctrl_rxd3_default: rxd3_default {
+ function = "RXD3";
+ groups = "RXD3";
+ };
+
+ pinctrl_rxd4_default: rxd4_default {
+ function = "RXD4";
+ groups = "RXD4";
+ };
+
+ pinctrl_sd1_default: sd1_default {
+ function = "SD1";
+ groups = "SD1";
+ };
+
+ pinctrl_sgpmi_default: sgpmi_default {
+ function = "SGPMI";
+ groups = "SGPMI";
+ };
+
+ pinctrl_siopbi_default: siopbi_default {
+ function = "SIOPBI";
+ groups = "SIOPBI";
+ };
+
+ pinctrl_siopbo_default: siopbo_default {
+ function = "SIOPBO";
+ groups = "SIOPBO";
+ };
+
+ pinctrl_timer3_default: timer3_default {
+ function = "TIMER3";
+ groups = "TIMER3";
+ };
+
+ pinctrl_timer5_default: timer5_default {
+ function = "TIMER5";
+ groups = "TIMER5";
+ };
+
+ pinctrl_timer6_default: timer6_default {
+ function = "TIMER6";
+ groups = "TIMER6";
+ };
+
+ pinctrl_timer7_default: timer7_default {
+ function = "TIMER7";
+ groups = "TIMER7";
+ };
+
+ pinctrl_timer8_default: timer8_default {
+ function = "TIMER8";
+ groups = "TIMER8";
+ };
+
+ pinctrl_txd1_default: txd1_default {
+ function = "TXD1";
+ groups = "TXD1";
+ };
+
+ pinctrl_txd3_default: txd3_default {
+ function = "TXD3";
+ groups = "TXD3";
+ };
+
+ pinctrl_txd4_default: txd4_default {
+ function = "TXD4";
+ groups = "TXD4";
+ };
+
+ pinctrl_uart6_default: uart6_default {
+ function = "UART6";
+ groups = "UART6";
+ };
+
+ pinctrl_vgahs_default: vgahs_default {
+ function = "VGAHS";
+ groups = "VGAHS";
+ };
+
+ pinctrl_vgavs_default: vgavs_default {
+ function = "VGAVS";
+ groups = "VGAVS";
+ };
+
+ pinctrl_vpi18_default: vpi18_default {
+ function = "VPI18";
+ groups = "VPI18";
+ };
+
+ pinctrl_vpi24_default: vpi24_default {
+ function = "VPI24";
+ groups = "VPI24";
+ };
+
+ pinctrl_vpi30_default: vpi30_default {
+ function = "VPI30";
+ groups = "VPI30";
+ };
+
+ pinctrl_vpo12_default: vpo12_default {
+ function = "VPO12";
+ groups = "VPO12";
+ };
+
+ pinctrl_vpo24_default: vpo24_default {
+ function = "VPO24";
+ groups = "VPO24";
+ };
+
+ };
+ };
+
clk_apb: clk_apb@1e6e2008 {
#clock-cells = <0>;
compatible = "aspeed,g4-apb-clock";
--
2.9.3.1.g0db844e
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v3 4/7] palmetto: Request relevant mux functions in devicetree
2016-08-30 7:55 [PATCH v3 0/7] aspeed: Integrate pinctrl and gpio drivers Andrew Jeffery
` (2 preceding siblings ...)
2016-08-30 7:55 ` [PATCH v3 3/7] aspeed-g4: Add syscon and pin controller nodes Andrew Jeffery
@ 2016-08-30 7:55 ` Andrew Jeffery
2016-09-13 12:41 ` Joel Stanley
2016-08-30 7:55 ` [PATCH v3 5/7] aspeed-g4: Add gpio controller to devicetree Andrew Jeffery
` (3 subsequent siblings)
7 siblings, 1 reply; 13+ messages in thread
From: Andrew Jeffery @ 2016-08-30 7:55 UTC (permalink / raw)
To: Joel Stanley
Cc: Russell King, Mark Rutland, Rob Herring, Benjamin Herrenschmidt,
Jeremy Kerr, devicetree, linux-arm-kernel, linux-kernel,
Andrew Jeffery
The requested functions are parented by the pinctrl node to provide the
Palmetto's static pin configuration.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
index cc5fcf2940bf..648fb6b9e427 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
@@ -20,6 +20,20 @@
};
};
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flbusy_default &pinctrl_flwp_default
+ &pinctrl_vgahs_default &pinctrl_vgavs_default
+ &pinctrl_ddcclk_default &pinctrl_ddcdat_default
+
+ &pinctrl_pwm1_default &pinctrl_pwm2_default
+ &pinctrl_pwm3_default &pinctrl_pwm4_default
+ &pinctrl_pwm5_default &pinctrl_pwm6_default
+ &pinctrl_pwm7_default
+
+ &pinctrl_bmcint_default &pinctrl_flack_default>;
+};
+
&uart5 {
status = "okay";
};
--
2.9.3.1.g0db844e
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v3 4/7] palmetto: Request relevant mux functions in devicetree
2016-08-30 7:55 ` [PATCH v3 4/7] palmetto: Request relevant mux functions in devicetree Andrew Jeffery
@ 2016-09-13 12:41 ` Joel Stanley
2016-09-13 20:58 ` Benjamin Herrenschmidt
0 siblings, 1 reply; 13+ messages in thread
From: Joel Stanley @ 2016-09-13 12:41 UTC (permalink / raw)
To: Andrew Jeffery
Cc: Russell King, Mark Rutland, Rob Herring, Benjamin Herrenschmidt,
Jeremy Kerr, devicetree, linux-arm-kernel, linux-kernel
On Tue, Aug 30, 2016 at 5:25 PM, Andrew Jeffery <andrew@aj.id.au> wrote:
> +&pinctrl {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flbusy_default &pinctrl_flwp_default
> + &pinctrl_vgahs_default &pinctrl_vgavs_default
> + &pinctrl_ddcclk_default &pinctrl_ddcdat_default
> +
> + &pinctrl_pwm1_default &pinctrl_pwm2_default
> + &pinctrl_pwm3_default &pinctrl_pwm4_default
> + &pinctrl_pwm5_default &pinctrl_pwm6_default
> + &pinctrl_pwm7_default
> +
> + &pinctrl_bmcint_default &pinctrl_flack_default>;
> +};
It's not clear that all systems use these pins in that way. I will not
include this one for now.
Cheers,
Joel
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH v3 4/7] palmetto: Request relevant mux functions in devicetree
2016-09-13 12:41 ` Joel Stanley
@ 2016-09-13 20:58 ` Benjamin Herrenschmidt
2016-09-14 0:59 ` Joel Stanley
0 siblings, 1 reply; 13+ messages in thread
From: Benjamin Herrenschmidt @ 2016-09-13 20:58 UTC (permalink / raw)
To: Joel Stanley, Andrew Jeffery
Cc: Russell King, Mark Rutland, Rob Herring, Jeremy Kerr, devicetree,
linux-arm-kernel, linux-kernel
On Tue, 2016-09-13 at 22:11 +0930, Joel Stanley wrote:
> It's not clear that all systems use these pins in that way. I will
> not
> include this one for now.
Well, it has VGA so the VGA hsync, vsync and DDC should be there at
least...
Ben.
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v3 4/7] palmetto: Request relevant mux functions in devicetree
2016-09-13 20:58 ` Benjamin Herrenschmidt
@ 2016-09-14 0:59 ` Joel Stanley
0 siblings, 0 replies; 13+ messages in thread
From: Joel Stanley @ 2016-09-14 0:59 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: Andrew Jeffery, Russell King, Mark Rutland, Rob Herring,
Jeremy Kerr, devicetree, linux-arm-kernel, linux-kernel
On Wed, Sep 14, 2016 at 6:28 AM, Benjamin Herrenschmidt
<benh@kernel.crashing.org> wrote:
> On Tue, 2016-09-13 at 22:11 +0930, Joel Stanley wrote:
>> It's not clear that all systems use these pins in that way. I will
>> not
>> include this one for now.
>
> Well, it has VGA so the VGA hsync, vsync and DDC should be there at
> least...
True. When we enable VGA in our tree these pins will be requested as
part of the VGA driver's device node, so they don't need to be hogged
by the pinctrl node like this.
The ones I'm not clear on are bmc_flack and bmc_int. Andrew, do you
have a recommendation here?
Cheers,
Joel
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v3 5/7] aspeed-g4: Add gpio controller to devicetree
2016-08-30 7:55 [PATCH v3 0/7] aspeed: Integrate pinctrl and gpio drivers Andrew Jeffery
` (3 preceding siblings ...)
2016-08-30 7:55 ` [PATCH v3 4/7] palmetto: Request relevant mux functions in devicetree Andrew Jeffery
@ 2016-08-30 7:55 ` Andrew Jeffery
2016-08-30 7:55 ` [PATCH v3 6/7] aspeed-g5: Add syscon and pin controller nodes Andrew Jeffery
` (2 subsequent siblings)
7 siblings, 0 replies; 13+ messages in thread
From: Andrew Jeffery @ 2016-08-30 7:55 UTC (permalink / raw)
To: Joel Stanley
Cc: Russell King, Mark Rutland, Rob Herring, Benjamin Herrenschmidt,
Jeremy Kerr, devicetree, linux-arm-kernel, linux-kernel,
Andrew Jeffery
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
arch/arm/boot/dts/aspeed-g4.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index a5d6e81e318a..7c2b73c4d5ab 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -492,6 +492,16 @@
reg = <0x1e720000 0x8000>; // 32K
};
+ gpio: gpio@1e780000 {
+ #gpio-cells = <2>;
+ gpio-controller;
+ compatible = "aspeed,ast2400-gpio";
+ reg = <0x1e780000 0x1000>;
+ interrupts = <20>;
+ gpio-ranges = <&pinctrl 0 0 220>;
+ interrupt-controller;
+ };
+
timer: timer@1e782000 {
compatible = "aspeed,ast2400-timer";
reg = <0x1e782000 0x90>;
--
2.9.3.1.g0db844e
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v3 6/7] aspeed-g5: Add syscon and pin controller nodes
2016-08-30 7:55 [PATCH v3 0/7] aspeed: Integrate pinctrl and gpio drivers Andrew Jeffery
` (4 preceding siblings ...)
2016-08-30 7:55 ` [PATCH v3 5/7] aspeed-g4: Add gpio controller to devicetree Andrew Jeffery
@ 2016-08-30 7:55 ` Andrew Jeffery
2016-08-30 7:56 ` [PATCH v3 7/7] aspeed-g5: Add gpio controller to devicetree Andrew Jeffery
2016-09-13 12:44 ` [PATCH v3 0/7] aspeed: Integrate pinctrl and gpio drivers Joel Stanley
7 siblings, 0 replies; 13+ messages in thread
From: Andrew Jeffery @ 2016-08-30 7:55 UTC (permalink / raw)
To: Joel Stanley
Cc: Russell King, Mark Rutland, Rob Herring, Benjamin Herrenschmidt,
Jeremy Kerr, devicetree, linux-arm-kernel, linux-kernel,
Andrew Jeffery
The pin controller's child nodes expose the functions currently
implemented in the g5 pin controller driver.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
arch/arm/boot/dts/aspeed-g5.dtsi | 204 +++++++++++++++++++++++++++++++++++++++
1 file changed, 204 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index dd94d9361fda..24d79c88019f 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -44,6 +44,210 @@
reg = <0x1e6e2070 0x04>;
};
+ syscon: syscon@1e6e2000 {
+ compatible = "aspeed,g5-scu", "syscon", "simple-mfd";
+ reg = <0x1e6e2000 0x1a8>;
+
+ pinctrl: pinctrl {
+ compatible = "aspeed,g5-pinctrl";
+
+ pinctrl_gpid0_default: gpid0_default {
+ function = "GPID0";
+ groups = "GPID0";
+ };
+
+ pinctrl_gpid2_default: gpid2_default {
+ function = "GPID2";
+ groups = "GPID2";
+ };
+
+ pinctrl_gpie0_default: gpie0_default {
+ function = "GPIE0";
+ groups = "GPIE0";
+ };
+
+ pinctrl_i2c10_default: i2c10_default {
+ function = "I2C10";
+ groups = "I2C10";
+ };
+
+ pinctrl_i2c11_default: i2c11_default {
+ function = "I2C11";
+ groups = "I2C11";
+ };
+
+ pinctrl_i2c12_default: i2c12_default {
+ function = "I2C12";
+ groups = "I2C12";
+ };
+
+ pinctrl_i2c13_default: i2c13_default {
+ function = "I2C13";
+ groups = "I2C13";
+ };
+
+ pinctrl_i2c14_default: i2c14_default {
+ function = "I2C14";
+ groups = "I2C14";
+ };
+
+ pinctrl_i2c3_default: i2c3_default {
+ function = "I2C3";
+ groups = "I2C3";
+ };
+
+ pinctrl_i2c4_default: i2c4_default {
+ function = "I2C4";
+ groups = "I2C4";
+ };
+
+ pinctrl_i2c5_default: i2c5_default {
+ function = "I2C5";
+ groups = "I2C5";
+ };
+
+ pinctrl_i2c6_default: i2c6_default {
+ function = "I2C6";
+ groups = "I2C6";
+ };
+
+ pinctrl_i2c7_default: i2c7_default {
+ function = "I2C7";
+ groups = "I2C7";
+ };
+
+ pinctrl_i2c8_default: i2c8_default {
+ function = "I2C8";
+ groups = "I2C8";
+ };
+
+ pinctrl_i2c9_default: i2c9_default {
+ function = "I2C9";
+ groups = "I2C9";
+ };
+
+ pinctrl_mac1link_default: mac1link_default {
+ function = "MAC1LINK";
+ groups = "MAC1LINK";
+ };
+
+ pinctrl_mdio1_default: mdio1_default {
+ function = "MDIO1";
+ groups = "MDIO1";
+ };
+
+ pinctrl_mdio2_default: mdio2_default {
+ function = "MDIO2";
+ groups = "MDIO2";
+ };
+
+ pinctrl_oscclk_default: oscclk_default {
+ function = "OSCCLK";
+ groups = "OSCCLK";
+ };
+
+ pinctrl_pewake_default: pewake_default {
+ function = "PEWAKE";
+ groups = "PEWAKE";
+ };
+
+ pinctrl_pwm0_default: pwm0_default {
+ function = "PWM0";
+ groups = "PWM0";
+ };
+
+ pinctrl_pwm1_default: pwm1_default {
+ function = "PWM1";
+ groups = "PWM1";
+ };
+
+ pinctrl_pwm2_default: pwm2_default {
+ function = "PWM2";
+ groups = "PWM2";
+ };
+
+ pinctrl_pwm3_default: pwm3_default {
+ function = "PWM3";
+ groups = "PWM3";
+ };
+
+ pinctrl_pwm4_default: pwm4_default {
+ function = "PWM4";
+ groups = "PWM4";
+ };
+
+ pinctrl_pwm5_default: pwm5_default {
+ function = "PWM5";
+ groups = "PWM5";
+ };
+
+ pinctrl_pwm6_default: pwm6_default {
+ function = "PWM6";
+ groups = "PWM6";
+ };
+
+ pinctrl_pwm7_default: pwm7_default {
+ function = "PWM7";
+ groups = "PWM7";
+ };
+
+ pinctrl_rgmii1_default: rgmii1_default {
+ function = "RGMII1";
+ groups = "RGMII1";
+ };
+
+ pinctrl_rgmii2_default: rgmii2_default {
+ function = "RGMII2";
+ groups = "RGMII2";
+ };
+
+ pinctrl_rmii1_default: rmii1_default {
+ function = "RMII1";
+ groups = "RMII1";
+ };
+
+ pinctrl_rmii2_default: rmii2_default {
+ function = "RMII2";
+ groups = "RMII2";
+ };
+
+ pinctrl_sd1_default: sd1_default {
+ function = "SD1";
+ groups = "SD1";
+ };
+
+ pinctrl_spi1_default: spi1_default {
+ function = "SPI1";
+ groups = "SPI1";
+ };
+
+ pinctrl_timer4_default: timer4_default {
+ function = "TIMER4";
+ groups = "TIMER4";
+ };
+
+ pinctrl_timer5_default: timer5_default {
+ function = "TIMER5";
+ groups = "TIMER5";
+ };
+
+ pinctrl_timer6_default: timer6_default {
+ function = "TIMER6";
+ groups = "TIMER6";
+ };
+
+ pinctrl_timer7_default: timer7_default {
+ function = "TIMER7";
+ groups = "TIMER7";
+ };
+
+ pinctrl_timer8_default: timer8_default {
+ function = "TIMER8";
+ groups = "TIMER8";
+ };
+ };
+ };
+
clk_hpll: clk_hpll@1e6e2024 {
#clock-cells = <0>;
compatible = "aspeed,g5-hpll-clock";
--
2.9.3.1.g0db844e
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v3 7/7] aspeed-g5: Add gpio controller to devicetree
2016-08-30 7:55 [PATCH v3 0/7] aspeed: Integrate pinctrl and gpio drivers Andrew Jeffery
` (5 preceding siblings ...)
2016-08-30 7:55 ` [PATCH v3 6/7] aspeed-g5: Add syscon and pin controller nodes Andrew Jeffery
@ 2016-08-30 7:56 ` Andrew Jeffery
2016-09-13 12:44 ` [PATCH v3 0/7] aspeed: Integrate pinctrl and gpio drivers Joel Stanley
7 siblings, 0 replies; 13+ messages in thread
From: Andrew Jeffery @ 2016-08-30 7:56 UTC (permalink / raw)
To: Joel Stanley
Cc: Russell King, Mark Rutland, Rob Herring, Benjamin Herrenschmidt,
Jeremy Kerr, devicetree, linux-arm-kernel, linux-kernel,
Andrew Jeffery
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
arch/arm/boot/dts/aspeed-g5.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 24d79c88019f..1f6a14a0802d 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -280,6 +280,16 @@
reg = <0x1e720000 0x9000>; // 36K
};
+ gpio: gpio@1e780000 {
+ #gpio-cells = <2>;
+ gpio-controller;
+ compatible = "aspeed,ast2500-gpio";
+ reg = <0x1e780000 0x1000>;
+ interrupts = <20>;
+ gpio-ranges = <&pinctrl 0 0 220>;
+ interrupt-controller;
+ };
+
timer: timer@1e782000 {
compatible = "aspeed,ast2400-timer";
reg = <0x1e782000 0x90>;
--
2.9.3.1.g0db844e
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v3 0/7] aspeed: Integrate pinctrl and gpio drivers
2016-08-30 7:55 [PATCH v3 0/7] aspeed: Integrate pinctrl and gpio drivers Andrew Jeffery
` (6 preceding siblings ...)
2016-08-30 7:56 ` [PATCH v3 7/7] aspeed-g5: Add gpio controller to devicetree Andrew Jeffery
@ 2016-09-13 12:44 ` Joel Stanley
7 siblings, 0 replies; 13+ messages in thread
From: Joel Stanley @ 2016-09-13 12:44 UTC (permalink / raw)
To: Andrew Jeffery, Arnd Bergmann
Cc: Russell King, Mark Rutland, Rob Herring, Benjamin Herrenschmidt,
Jeremy Kerr, devicetree, linux-arm-kernel, linux-kernel
On Tue, Aug 30, 2016 at 5:25 PM, Andrew Jeffery <andrew@aj.id.au> wrote:
> Here's v3 of the Aspeed pinctrl and gpio driver integration patches. v2 of the
> integration series can be found at:
>
> https://lkml.org/lkml/2016/8/19/403
Looks good to me. I commented on the two patches that I don't think we
want to include. If you're happy with that I will send a tree to Arnd.
Arnd, the pinctrl driver is staged for 4.9. We're adding the symbol to
arch/arm/mach-aspeed, so the tree I send will have a dependency on the
pinctrl tree. How do I proceed in this case?
Cheers,
Joel
^ permalink raw reply [flat|nested] 13+ messages in thread