From: Rob Herring <robh@kernel.org>
To: Mirza Krak <mirza.krak@gmail.com>
Cc: Jon Hunter <jonathanh@nvidia.com>,
Stephen Warren <swarren@wwwdotorg.org>,
Thierry Reding <thierry.reding@gmail.com>,
Alexandre Courbot <gnurou@gmail.com>,
linux@armlinux.org.uk, pdeschrijver@nvidia.com,
Prashant Gaikwad <pgaikwad@nvidia.com>,
Michael Turquette <mturquette@baylibre.com>,
sboyd@codeaurora.org, mark.rutland@arm.com,
devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel <linux-kernel@vger.kernel.org>,
linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH v2 3/6] dt/bindings: Add bindings for Tegra GMI controller
Date: Tue, 30 Aug 2016 12:06:36 -0500 [thread overview]
Message-ID: <20160830170636.GA8741@rob-hp-laptop> (raw)
In-Reply-To: <CALw8SCVcPymDZ8NyUbeanRF0TCT1TZzL6iRDticYA42FWrEWqw@mail.gmail.com>
On Wed, Aug 24, 2016 at 09:54:47PM +0200, Mirza Krak wrote:
> 2016-08-24 17:56 GMT+02:00 Jon Hunter <jonathanh@nvidia.com>:
> +
> >> +Example with two SJA1000 CAN controllers connected to the GMI bus. We wrap the
> >> +controllers with a simple-bus node since they are all connected to the same
> >> +chip-select (CS4), in this example external address decoding is provided:
> >> +
> >> +gmi@70090000 {
> >> + compatible = "nvidia,tegra20-gmi";
> >> + reg = <0x70009000 0x1000>;
> >> + #address-cells = <1>;
> >> + #size-cells = <1>;
> >> + clocks = <&tegra_car TEGRA20_CLK_NOR>;
> >> + clock-names = "gmi";
> >> + resets = <&tegra_car 42>;
> >> + reset-names = "gmi";
> >> + ranges = <4 0x48000000 0x7ffffff>;
> >> +
> >> + status = "disabled";
> >> +
> >> + bus@4 {
> >> + compatible = "simple-bus";
> >> + reg = <4>;
> >> + #address-cells = <1>;
> >> + #size-cells = <1>;
> >> + ranges = <0 4 0x40100>;
> >
> > Does this work? I tried to add an example like this and I got ...
> >
> > Warning (reg_format): "reg" property in /gmi@70009000/bus@4 has invalid
> > length (4 bytes) (#address-cells == 1, #size-cells == 1)
>
> Shoot, to get rid of the warning it should be
>
> reg = <4 0 >;
>
> But it works either way.
The CS node should have #address-cells=2 with the first being CS# and
the second being the offset (often 0).
>
> >
> > I am wondering if we should just following the arm,pl172 example and
> > have ...
> >
> > cs4 {
> > compatible = "simple-bus";
> > #address-cells = <1>;
> > #size-cells = <1>;
> > ranges;
Empty ranges is typically wrong and due to laziness...
This should have the CS# in it.
> >
> > nvidia,snor-cs = <4>;
> > nvidia,snor-mux-mode;
> > nvidia,snor-adv-inv;
> >
> > can@0 {
> > reg = <0 0x100>;
This can be 1 cell with just the offset.
> > ...
> > };
> >
> > ...
> > };
> >
>
> That means to go back to V1 really (almost :)). Which I do not mind.
> Will give it a test run.
>
> But I am a little hesitant if will be any better/cleaner. In your example above:
>
> can@0 {
> reg = <0 0x100>;
> ...
> };
>
> Would this really translate correctly? In the pl172 example they have
> multiple ranges and address with "flash@0,0" which a range defined in
> parent node. "can@0" does not have valid match in parent node in our
> example. So I probably need add some more logic for it to properly
> translate.
pl172 has several things I don't like, so don't follow it. Mainly those
are custom CS property and 3 levels of nodes. I'm fine with 3 levels if
there is more than one device, but otherwise 2 levels with timing
properties in the child device node.
>
> I have an idea which is following:
>
> gmi@70090000 {
> status = "okay";
> #address-cells = <2>;
> #size-cells = <1>;
> ranges = <4 0 0x48000000 0x00040000>;
>
> cs4 {
cs@4,0
> compatible = "simple-bus";
> #address-cells = <2>;
1 cell here.
> #size-cells = <1>;
> ranges;
Fill this in to drop the 2nd cell on child addresses and just have the
offset.
>
> nvidia,snor-cs = <4>;
NAK, no custom CS properties.
> nvidia,snor-mux-mode;
> nvidia,snor-adv-inv;
>
> can@0 {
> compatible = "nxp,sja1000";
> reg = <4 0 0x100>;
> ...
> };
>
>
> can@40000 {
> compatible = "nxp,sja1000";
> reg = <4 0x40000 0x100>;
> ...
> };
> };
> };
>
> Do not know if above will work at all (not able to test at current
> location), anyway I will play around with it some more and get back to
> you.
>
> Best Regards
> Mirza
next prev parent reply other threads:[~2016-08-30 17:06 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-24 13:37 [PATCH v2 0/6] Add support for Tegra GMI bus controller Mirza Krak
2016-08-24 13:37 ` [PATCH v2 1/6] clk: tegra: add TEGRA20_CLK_NOR to init table Mirza Krak
2016-08-24 13:37 ` [PATCH v2 2/6] clk: tegra: add TEGRA30_CLK_NOR " Mirza Krak
2016-08-24 13:37 ` [PATCH v2 3/6] dt/bindings: Add bindings for Tegra GMI controller Mirza Krak
2016-08-24 15:56 ` Jon Hunter
2016-08-24 19:54 ` Mirza Krak
2016-08-26 4:53 ` Mirza Krak
2016-08-26 7:25 ` Jon Hunter
2016-08-29 7:38 ` Mirza Krak
2016-08-30 17:06 ` Rob Herring [this message]
2016-08-31 11:22 ` Mirza Krak
2016-09-06 10:32 ` Jon Hunter
2016-09-19 7:21 ` Mirza Krak
2016-09-30 8:02 ` Jon Hunter
2016-09-06 10:35 ` Jon Hunter
2016-08-30 15:02 ` Marcel Ziswiler
2016-08-31 9:24 ` Mirza Krak
2016-08-24 13:37 ` [PATCH v2 4/6] ARM: tegra: Add Tegra30 GMI support Mirza Krak
2016-08-24 13:37 ` [PATCH v2 5/6] ARM: tegra: Add Tegra20 " Mirza Krak
2016-08-24 13:37 ` [PATCH v2 6/6] bus: Add support for Tegra Generic Memory Interface Mirza Krak
2016-08-26 8:21 ` Jon Hunter
2016-08-30 15:01 ` [PATCH v2 0/6] Add support for Tegra GMI bus controller Marcel Ziswiler
2016-08-31 9:23 ` Mirza Krak
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