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From: Borislav Petkov <bp@alien8.de>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: "He Chen" <he.chen@linux.intel.com>,
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	x86@kernel.org, "Paolo Bonzini" <pbonzini@redhat.com>,
	"Radim Krčmář" <rkrcmar@redhat.com>,
	"Ingo Molnar" <mingo@redhat.com>,
	"H . Peter Anvin" <hpa@zytor.com>,
	"Luwei Kang" <luwei.kang@intel.com>,
	"Piotr Luc" <Piotr.Luc@intel.com>
Subject: Re: [PATCH v3] x86/cpuid: expose AVX512_4VNNIW and AVX512_4FMAPS features to kvm guest
Date: Mon, 7 Nov 2016 18:07:20 +0100	[thread overview]
Message-ID: <20161107170720.drgqul4oc3yzcqff@pd.tnic> (raw)
In-Reply-To: <alpine.DEB.2.20.1611071738480.3709@nanos>

On Mon, Nov 07, 2016 at 05:47:21PM +0100, Thomas Gleixner wrote:
> How do you make that struct definition static?

Not make it static - rename it. Sorry.

It is used only locally in that file anyway.

> Both the enum and the struct should be in processor.h obviously with
> different names so we won't trip over this once more. And the obvious
> naming is:
> 
> struct cpuid_regs {
>       u32 eax, ebx, ecx, edx;
> };
> 
> enum cpuid_regs_idx {
>      CPUID_EAX,
>      CPUID_EBX,
>      CPUID_ECX,
>      CPUID_EDX,
> };
> 
> as CR_E*X is just not intuitive at all.

Ok, that makes sense.

Also, grepping around the tree - we don't have one definitive enum
containing all the architectural registers and maybe we should have one.
We do have some PT_E*X ptrace definitions and others in entry*.S, and...

We probably should have something like:

enum regs {
        AX = 0,
        CX,
        DX,
        BX,
        SP,
        BP,
        SI,
        DI,
        R8,
        R9,
        R10,
        R11,
        R12,
        R13,
        R14,
        R15
};

in the exactly same order as they're encoded in the x86 opcodes.

Yeah, I don't see a pressing reason for that yet though but maybe
we should think about it. My angle is, avoid confusion and ad-hoc
definitions spreading around the code.

Thanks.

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

      reply	other threads:[~2016-11-07 17:07 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-04  7:07 [PATCH v3] x86/cpuid: expose AVX512_4VNNIW and AVX512_4FMAPS features to kvm guest He Chen
2016-11-04 10:52 ` Borislav Petkov
2016-11-04 14:53   ` Paolo Bonzini
2016-11-04 15:06     ` Borislav Petkov
2016-11-04 15:13       ` Paolo Bonzini
2016-11-04 15:57         ` Borislav Petkov
2016-11-04 15:58           ` Paolo Bonzini
2016-11-07 16:52         ` Thomas Gleixner
2016-11-07  2:10   ` He Chen
2016-11-07  9:05     ` Borislav Petkov
2016-11-07 16:47       ` Thomas Gleixner
2016-11-07 17:07         ` Borislav Petkov [this message]

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