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From: "Radim Krčmář" <rkrcmar@redhat.com>
To: Tom Lendacky <thomas.lendacky@amd.com>
Cc: linux-arch@vger.kernel.org, linux-efi@vger.kernel.org,
	kvm@vger.kernel.org, linux-doc@vger.kernel.org, x86@kernel.org,
	linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com,
	linux-mm@kvack.org, iommu@lists.linux-foundation.org,
	Rik van Riel <riel@redhat.com>, Arnd Bergmann <arnd@arndb.de>,
	Jonathan Corbet <corbet@lwn.net>,
	Matt Fleming <matt@codeblueprint.co.uk>,
	Joerg Roedel <joro@8bytes.org>,
	Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Larry Woodman <lwoodman@redhat.com>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Andy Lutomirski <luto@kernel.org>,
	"H. Peter Anvin" <hpa@zytor.com>,
	Andrey Ryabinin <aryabinin@virtuozzo.com>,
	Alexander Potapenko <glider@google.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Dmitry Vyukov <dvyukov@google.com>
Subject: Re: [RFC PATCH v3 13/20] x86: DMA support for memory encryption
Date: Tue, 15 Nov 2016 19:17:36 +0100	[thread overview]
Message-ID: <20161115181736.GA14060@potion> (raw)
In-Reply-To: <d5ebd13d-1278-8714-3f03-8ee7f04a2b38@amd.com>

2016-11-15 11:02-0600, Tom Lendacky:
> On 11/15/2016 8:39 AM, Radim Krčmář wrote:
>> 2016-11-09 18:37-0600, Tom Lendacky:
>>> Since DMA addresses will effectively look like 48-bit addresses when the
>>> memory encryption mask is set, SWIOTLB is needed if the DMA mask of the
>>> device performing the DMA does not support 48-bits. SWIOTLB will be
>>> initialized to create un-encrypted bounce buffers for use by these devices.
>>>
>>> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
>>> ---
>>> diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
>>> @@ -64,13 +66,15 @@ static struct dma_map_ops swiotlb_dma_ops = {
>>>   * pci_swiotlb_detect_override - set swiotlb to 1 if necessary
>>>   *
>>>   * This returns non-zero if we are forced to use swiotlb (by the boot
>>> - * option).
>>> + * option). If memory encryption is enabled then swiotlb will be set
>>> + * to 1 so that bounce buffers are allocated and used for devices that
>>> + * do not support the addressing range required for the encryption mask.
>>>   */
>>>  int __init pci_swiotlb_detect_override(void)
>>>  {
>>>  	int use_swiotlb = swiotlb | swiotlb_force;
>>>  
>>> -	if (swiotlb_force)
>>> +	if (swiotlb_force || sme_me_mask)
>>>  		swiotlb = 1;
>>>  
>>>  	return use_swiotlb;
>> 
>> We want to return 1 even if only sme_me_mask is 1, because the return
>> value is used for detection.  The following would be less obscure, IMO:
>> 
>> 	if (swiotlb_force || sme_me_mask)
>> 		swiotlb = 1;
>> 
>> 	return swiotlb;
> 
> If we do that then all DMA would go through the swiotlb bounce buffers.

No, that is decided for example in swiotlb_map_page() and we need to
call pci_swiotlb_init() to register that function.

> By setting swiotlb to 1 we indicate that the bounce buffers will be
> needed for those devices that can't support the addressing range when
> the encryption bit is set (48 bit DMA). But if the device can support
> the addressing range we won't use the bounce buffers.

If we return 0 here, then pci_swiotlb_init() will not be called =>
dma_ops won't be set to swiotlb_dma_ops => we won't use bounce buffers.

>> We setup encrypted swiotlb and then decrypt it, but sometimes set it up
>> decrypted (late_alloc) ... why isn't the swiotlb set up decrypted
>> directly?
> 
> When swiotlb is allocated in swiotlb_init(), it is too early to make
> use of the api to the change the page attributes. Because of this,
> the callback to make those changes is needed.

Thanks. (I don't know page table setup enough to see a lesser evil. :])

>>> @@ -541,7 +583,7 @@ static phys_addr_t
>>>  map_single(struct device *hwdev, phys_addr_t phys, size_t size,
>>>  	   enum dma_data_direction dir)
>>>  {
>>> -	dma_addr_t start_dma_addr = phys_to_dma(hwdev, io_tlb_start);
>>> +	dma_addr_t start_dma_addr = swiotlb_phys_to_dma(hwdev, io_tlb_start);
>> 
>> We have decrypted io_tlb_start before, so shouldn't its physical address
>> be saved without the sme bit?  (Which changes a lot ...)
> 
> I'm not sure what you mean here, can you elaborate a bit more?

The C-bit (sme bit) is a part of the physical address.
If we know that a certain physical page should be accessed as
unencrypted (the bounce buffer) then the C-bit is 0.
I'm wondering why we save the physical address with the C-bit set when
we know that it can't be accessed that way (because we remove it every
time).

The naming is a bit confusing, because physical addresses are actually
virtualized by SME -- maybe we should be calling them SME addresses?

  reply	other threads:[~2016-11-15 18:17 UTC|newest]

Thread overview: 78+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-10  0:34 [RFC PATCH v3 00/20] x86: Secure Memory Encryption (AMD) Tom Lendacky
2016-11-10  0:34 ` [RFC PATCH v3 01/20] x86: Documentation for AMD Secure Memory Encryption (SME) Tom Lendacky
2016-11-10 10:51   ` Borislav Petkov
2016-11-14 17:15     ` Tom Lendacky
2016-11-10  0:34 ` [RFC PATCH v3 02/20] x86: Set the write-protect cache mode for full PAT support Tom Lendacky
2016-11-10 13:14   ` Borislav Petkov
2016-11-11  1:26     ` Kani, Toshimitsu
2016-11-14 16:51       ` Tom Lendacky
2016-11-10  0:34 ` [RFC PATCH v3 03/20] x86: Add the Secure Memory Encryption cpu feature Tom Lendacky
2016-11-11 11:53   ` Borislav Petkov
2016-11-10  0:35 ` [RFC PATCH v3 04/20] x86: Handle reduction in physical address size with SME Tom Lendacky
2016-11-15 12:10   ` Joerg Roedel
2016-11-15 12:14     ` Borislav Petkov
2016-11-15 14:40       ` Tom Lendacky
2016-11-15 15:33         ` Borislav Petkov
2016-11-15 16:06           ` Tom Lendacky
2016-11-15 16:33             ` Borislav Petkov
2016-11-15 17:08               ` Tom Lendacky
2016-11-15 21:22       ` Tom Lendacky
2016-11-15 21:33         ` Borislav Petkov
2016-11-15 22:01           ` Tom Lendacky
2016-11-15 14:32     ` Tom Lendacky
2016-11-10  0:35 ` [RFC PATCH v3 05/20] x86: Add Secure Memory Encryption (SME) support Tom Lendacky
2016-11-10  0:35 ` [RFC PATCH v3 06/20] x86: Add support to enable SME during early boot processing Tom Lendacky
2016-11-14 17:29   ` Borislav Petkov
2016-11-14 18:18     ` Tom Lendacky
2016-11-14 20:01       ` Borislav Petkov
2016-11-10  0:35 ` [RFC PATCH v3 07/20] x86: Provide general kernel support for memory encryption Tom Lendacky
2016-11-10  0:36 ` [RFC PATCH v3 08/20] x86: Add support for early encryption/decryption of memory Tom Lendacky
2016-11-16 10:46   ` Borislav Petkov
2016-11-16 19:22     ` Tom Lendacky
2016-11-10  0:36 ` [RFC PATCH v3 09/20] x86: Insure that boot memory areas are mapped properly Tom Lendacky
2016-11-17 12:20   ` Borislav Petkov
2016-11-19 18:12     ` Tom Lendacky
2016-11-10  0:36 ` [RFC PATCH v3 10/20] Add support to access boot related data in the clear Tom Lendacky
2016-11-11 16:17   ` Kani, Toshimitsu
2016-11-14 16:24     ` Tom Lendacky
2016-11-17 15:55   ` Borislav Petkov
2016-11-19 18:33     ` Tom Lendacky
2016-11-20 23:04       ` Borislav Petkov
2016-12-07 13:19   ` Matt Fleming
2016-12-09 14:26     ` Tom Lendacky
2016-11-10  0:36 ` [RFC PATCH v3 11/20] x86: Add support for changing memory encryption attribute Tom Lendacky
2016-11-17 17:39   ` Borislav Petkov
2016-11-19 18:48     ` Tom Lendacky
2016-11-21  8:27       ` Borislav Petkov
2016-11-10  0:37 ` [RFC PATCH v3 12/20] x86: Decrypt trampoline area if memory encryption is active Tom Lendacky
2016-11-17 18:09   ` Borislav Petkov
2016-11-19 18:50     ` Tom Lendacky
2016-11-10  0:37 ` [RFC PATCH v3 13/20] x86: DMA support for memory encryption Tom Lendacky
2016-11-15 14:39   ` Radim Krčmář
2016-11-15 17:02     ` Tom Lendacky
2016-11-15 18:17       ` Radim Krčmář [this message]
2016-11-15 20:33         ` Tom Lendacky
2016-11-15 15:16   ` Michael S. Tsirkin
2016-11-15 18:29     ` Tom Lendacky
2016-11-15 19:16       ` Michael S. Tsirkin
2016-11-22 11:38       ` Borislav Petkov
2016-11-22 15:22         ` Michael S. Tsirkin
2016-11-22 15:41           ` Borislav Petkov
2016-11-22 20:41             ` Michael S. Tsirkin
2016-11-10  0:37 ` [RFC PATCH v3 14/20] iommu/amd: Disable AMD IOMMU if memory encryption is active Tom Lendacky
2016-11-14 16:32   ` Joerg Roedel
2016-11-14 16:48     ` Tom Lendacky
2016-11-10  0:37 ` [RFC PATCH v3 15/20] x86: Check for memory encryption on the APs Tom Lendacky
2016-11-22 19:25   ` Borislav Petkov
2016-11-29 18:00     ` Tom Lendacky
2016-11-10  0:37 ` [RFC PATCH v3 16/20] x86: Do not specify encrypted memory for video mappings Tom Lendacky
2016-11-10  0:38 ` [RFC PATCH v3 17/20] x86/kvm: Enable Secure Memory Encryption of nested page tables Tom Lendacky
2016-11-10  0:38 ` [RFC PATCH v3 18/20] x86: Access the setup data through debugfs un-encrypted Tom Lendacky
2016-11-10  0:38 ` [RFC PATCH v3 19/20] x86: Add support to make use of Secure Memory Encryption Tom Lendacky
2016-11-24 12:50   ` Borislav Petkov
2016-11-29 18:40     ` Tom Lendacky
2016-11-10  0:38 ` [RFC PATCH v3 20/20] " Tom Lendacky
2016-11-22 18:58   ` Borislav Petkov
2016-11-26 20:47   ` Borislav Petkov
2016-11-29 18:48     ` Tom Lendacky
2016-11-29 19:56       ` Borislav Petkov

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