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From: Peter Zijlstra <peterz@infradead.org>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: LKML <linux-kernel@vger.kernel.org>,
	x86@kernel.org, Borislav Petkov <bp@alien8.de>,
	Bruce Schlobohm <bruce.schlobohm@intel.com>,
	Roland Scheidegger <rscheidegger_lists@hispeed.ch>,
	Kevin Stanton <kevin.b.stanton@intel.com>,
	Allen Hung <allen_hung@dell.com>
Subject: Re: [patch 2/2] x86/tsc: Force TSC_ADJUST register to value >= zero
Date: Tue, 13 Dec 2016 14:43:58 +0100	[thread overview]
Message-ID: <20161213134358.GV3207@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <20161213131211.397588033@linutronix.de>

On Tue, Dec 13, 2016 at 01:14:17PM -0000, Thomas Gleixner wrote:
> @@ -429,8 +447,13 @@ void check_tsc_sync_target(void)
>  	 * that the warp is not longer detectable when the observed warp
>  	 * value is used. In the worst case the adjustment needs to go
>  	 * through a 3rd run for fine tuning.
> +	 *
> +	 * But we must make sure that the value doesn't become negative
> +	 * otherwise TSC deadline timer will create an interrupt storm.
>  	 */
>  	cur->adjusted += cur_max_warp;
> +	if (cur->adjusted < 0)
> +		cur->adjusted = 0;
>  

So depending on how horrid we want to make this we could work around
this by increasing the ADJUST of the other CPUs by the amount we're
negative.

But yes, yuck.

  reply	other threads:[~2016-12-13 13:44 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-12-13 13:14 [patch 0/2] tsc/adjust: Cure suspend/resume issues and prevent TSC deadline timer irq storm Thomas Gleixner
2016-12-13 13:14 ` [patch 1/2] x86/tsc: Validate TSC_ADJUST after resume Thomas Gleixner
2016-12-13 13:22   ` Peter Zijlstra
2016-12-13 13:23     ` Thomas Gleixner
2016-12-15 10:52   ` [tip:x86/timers] " tip-bot for Thomas Gleixner
2016-12-13 13:14 ` [patch 2/2] x86/tsc: Force TSC_ADJUST register to value >= zero Thomas Gleixner
2016-12-13 13:43   ` Peter Zijlstra [this message]
2016-12-13 15:49     ` Thomas Gleixner
2016-12-15 10:53   ` [tip:x86/timers] " tip-bot for Thomas Gleixner
2016-12-16 11:46   ` [patch 2/2] " Thomas Gleixner
2016-12-16 11:52     ` Ingo Molnar
2016-12-16 11:53       ` Thomas Gleixner
2016-12-16 13:33     ` Thomas Gleixner
2016-12-13 16:34 ` [patch 0/2] tsc/adjust: Cure suspend/resume issues and prevent TSC deadline timer irq storm Roland Scheidegger
2016-12-13 16:46   ` Thomas Gleixner
2016-12-14  1:36     ` Roland Scheidegger
2016-12-14  7:31       ` Thomas Gleixner
2016-12-14 20:59         ` Thomas Gleixner
2016-12-14 21:40           ` Thomas Gleixner
2016-12-14 22:54             ` Roland Scheidegger
2016-12-15  9:31               ` Thomas Gleixner
2017-01-26 23:40                 ` Stanton, Kevin B

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