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From: Roland Scheidegger <rscheidegger_lists@hispeed.ch>
To: Thomas Gleixner <tglx@linutronix.de>,
	LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Peter Zijlstra <peterz@infradead.org>,
	Borislav Petkov <bp@alien8.de>,
	Bruce Schlobohm <bruce.schlobohm@intel.com>,
	Kevin Stanton <kevin.b.stanton@intel.com>,
	Allen Hung <allen_hung@dell.com>
Subject: Re: [patch 0/2] tsc/adjust: Cure suspend/resume issues and prevent TSC deadline timer irq storm
Date: Tue, 13 Dec 2016 17:34:11 +0100	[thread overview]
Message-ID: <33d4286c-3f77-1274-34b7-bc62d2c146a4@hispeed.ch> (raw)
In-Reply-To: <20161213131115.764824574@linutronix.de>

Am 13.12.2016 um 14:14 schrieb Thomas Gleixner:
> Roland reported interesting TSC ADJUST register wreckage on his DELL
> machine, which seems to populate that MSR with a random number generator.

FWIW, I thought about the actual values some more and I don't actually
think they are all that random any more: the behavior is consistent with
the bios trying to zero the TSC of all cpus. If I understand this right,
writing a zero to TSC would cause somewhat small negative values in the
TSC_ADJ register at boot time, and larger negative values at suspend
time (at least if the TSC just stops when suspended and isn't reset) -
exactly what I'm seeing.
(And of course the different TSC_ADJ values would be because the bios is
writing TSC without any thoughts of synchronization, just one cpu after
another).

> 
> Deeper investagation into fixing this wreckage unearthed another special
> feature which is designed by Intel: Negative TSC adjuste values cause
> interrupt storms on the TSC deadline timer. Further details in patch 2/2

This actually looks like quite a serious hw bug to me, shouldn't there
be an errata for such a bug?

And I still don't quite understand why the lockup doesn't happen after a
warm boot, there must be something different there...

(I didn't have the chance to test the patch yet.)

Roland

  parent reply	other threads:[~2016-12-13 16:34 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-12-13 13:14 [patch 0/2] tsc/adjust: Cure suspend/resume issues and prevent TSC deadline timer irq storm Thomas Gleixner
2016-12-13 13:14 ` [patch 1/2] x86/tsc: Validate TSC_ADJUST after resume Thomas Gleixner
2016-12-13 13:22   ` Peter Zijlstra
2016-12-13 13:23     ` Thomas Gleixner
2016-12-15 10:52   ` [tip:x86/timers] " tip-bot for Thomas Gleixner
2016-12-13 13:14 ` [patch 2/2] x86/tsc: Force TSC_ADJUST register to value >= zero Thomas Gleixner
2016-12-13 13:43   ` Peter Zijlstra
2016-12-13 15:49     ` Thomas Gleixner
2016-12-15 10:53   ` [tip:x86/timers] " tip-bot for Thomas Gleixner
2016-12-16 11:46   ` [patch 2/2] " Thomas Gleixner
2016-12-16 11:52     ` Ingo Molnar
2016-12-16 11:53       ` Thomas Gleixner
2016-12-16 13:33     ` Thomas Gleixner
2016-12-13 16:34 ` Roland Scheidegger [this message]
2016-12-13 16:46   ` [patch 0/2] tsc/adjust: Cure suspend/resume issues and prevent TSC deadline timer irq storm Thomas Gleixner
2016-12-14  1:36     ` Roland Scheidegger
2016-12-14  7:31       ` Thomas Gleixner
2016-12-14 20:59         ` Thomas Gleixner
2016-12-14 21:40           ` Thomas Gleixner
2016-12-14 22:54             ` Roland Scheidegger
2016-12-15  9:31               ` Thomas Gleixner
2017-01-26 23:40                 ` Stanton, Kevin B

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