linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
* [PATCH] arm64: errata: Provide macro for major and minor cpu revisions
@ 2017-01-11 12:11 Robert Richter
  2017-01-12 15:33 ` Will Deacon
  0 siblings, 1 reply; 3+ messages in thread
From: Robert Richter @ 2017-01-11 12:11 UTC (permalink / raw)
  To: Catalin Marinas, Will Deacon
  Cc: Robert Richter, linux-arm-kernel, linux-kernel

Definition of cpu ranges are hard to read if the cpu variant is not
zero. Provide MIDR_CPU_FULL_REV() macro to describe the full hardware
revision of a cpu including variant and (minor) revision.

Signed-off-by: Robert Richter <rrichter@cavium.com>
---
 arch/arm64/include/asm/cputype.h |  3 +++
 arch/arm64/kernel/cpu_errata.c   | 15 +++++++++------
 arch/arm64/kernel/cpufeature.c   |  8 +++-----
 3 files changed, 15 insertions(+), 11 deletions(-)

diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index 26a68ddb11c1..983e59cbdd54 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -56,6 +56,9 @@
 	(0xf			<< MIDR_ARCHITECTURE_SHIFT) | \
 	((partnum)		<< MIDR_PARTNUM_SHIFT))
 
+#define MIDR_CPU_FULL_REV(var, rev) \
+	(((var)	<< MIDR_VARIANT_SHIFT) | (rev))
+
 #define MIDR_CPU_MODEL_MASK (MIDR_IMPLEMENTOR_MASK | MIDR_PARTNUM_MASK | \
 			     MIDR_ARCHITECTURE_MASK)
 
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
index b75e917aac46..63b61e981e2f 100644
--- a/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@ -79,8 +79,9 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
 	/* Cortex-A57 r0p0 - r1p2 */
 		.desc = "ARM erratum 832075",
 		.capability = ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE,
-		MIDR_RANGE(MIDR_CORTEX_A57, 0x00,
-			   (1 << MIDR_VARIANT_SHIFT) | 2),
+		MIDR_RANGE(MIDR_CORTEX_A57,
+			   MIDR_CPU_FULL_REV(0, 0),
+			   MIDR_CPU_FULL_REV(1, 2)),
 	},
 #endif
 #ifdef CONFIG_ARM64_ERRATUM_834220
@@ -88,8 +89,9 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
 	/* Cortex-A57 r0p0 - r1p2 */
 		.desc = "ARM erratum 834220",
 		.capability = ARM64_WORKAROUND_834220,
-		MIDR_RANGE(MIDR_CORTEX_A57, 0x00,
-			   (1 << MIDR_VARIANT_SHIFT) | 2),
+		MIDR_RANGE(MIDR_CORTEX_A57,
+			   MIDR_CPU_FULL_REV(0, 0),
+			   MIDR_CPU_FULL_REV(1, 2)),
 	},
 #endif
 #ifdef CONFIG_ARM64_ERRATUM_845719
@@ -113,8 +115,9 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
 	/* Cavium ThunderX, T88 pass 1.x - 2.1 */
 		.desc = "Cavium erratum 27456",
 		.capability = ARM64_WORKAROUND_CAVIUM_27456,
-		MIDR_RANGE(MIDR_THUNDERX, 0x00,
-			   (1 << MIDR_VARIANT_SHIFT) | 1),
+		MIDR_RANGE(MIDR_THUNDERX,
+			   MIDR_CPU_FULL_REV(0, 0),
+			   MIDR_CPU_FULL_REV(1, 1)),
 	},
 	{
 	/* Cavium ThunderX, T81 pass 1.0 */
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index fdf8f045929f..f12b13de24f4 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -720,13 +720,11 @@ static bool has_useable_gicv3_cpuif(const struct arm64_cpu_capabilities *entry,
 static bool has_no_hw_prefetch(const struct arm64_cpu_capabilities *entry, int __unused)
 {
 	u32 midr = read_cpuid_id();
-	u32 rv_min, rv_max;
 
 	/* Cavium ThunderX pass 1.x and 2.x */
-	rv_min = 0;
-	rv_max = (1 << MIDR_VARIANT_SHIFT) | MIDR_REVISION_MASK;
-
-	return MIDR_IS_CPU_MODEL_RANGE(midr, MIDR_THUNDERX, rv_min, rv_max);
+	return MIDR_IS_CPU_MODEL_RANGE(midr, MIDR_THUNDERX,
+		MIDR_CPU_FULL_REV(0, 0),
+		MIDR_CPU_FULL_REV(1, MIDR_REVISION_MASK));
 }
 
 static bool runs_at_el2(const struct arm64_cpu_capabilities *entry, int __unused)
-- 
2.11.0

^ permalink raw reply related	[flat|nested] 3+ messages in thread
* Re: [PATCH] arm64: errata: Provide macro for major and minor cpu revisions
  2017-01-11 12:11 [PATCH] arm64: errata: Provide macro for major and minor cpu revisions Robert Richter
@ 2017-01-12 15:33 ` Will Deacon
  2017-01-12 18:41   ` Robert Richter
  0 siblings, 1 reply; 3+ messages in thread
From: Will Deacon @ 2017-01-12 15:33 UTC (permalink / raw)
  To: Robert Richter; +Cc: Catalin Marinas, linux-arm-kernel, linux-kernel

On Wed, Jan 11, 2017 at 01:11:42PM +0100, Robert Richter wrote:
> Definition of cpu ranges are hard to read if the cpu variant is not
> zero. Provide MIDR_CPU_FULL_REV() macro to describe the full hardware
> revision of a cpu including variant and (minor) revision.
> 
> Signed-off-by: Robert Richter <rrichter@cavium.com>
> ---
>  arch/arm64/include/asm/cputype.h |  3 +++
>  arch/arm64/kernel/cpu_errata.c   | 15 +++++++++------
>  arch/arm64/kernel/cpufeature.c   |  8 +++-----
>  3 files changed, 15 insertions(+), 11 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
> index 26a68ddb11c1..983e59cbdd54 100644
> --- a/arch/arm64/include/asm/cputype.h
> +++ b/arch/arm64/include/asm/cputype.h
> @@ -56,6 +56,9 @@
>  	(0xf			<< MIDR_ARCHITECTURE_SHIFT) | \
>  	((partnum)		<< MIDR_PARTNUM_SHIFT))
>  
> +#define MIDR_CPU_FULL_REV(var, rev) \
> +	(((var)	<< MIDR_VARIANT_SHIFT) | (rev))

Minor nit, but could you rename this to MIDR_CPU_VAR_REV instead please?
The revision field *is* the bottom 4 bits, so "full" rev doesn't really
make a lot of sense.

If you repost with that change, I'll pick it up for 4.11.

Thanks,

Will

^ permalink raw reply	[flat|nested] 3+ messages in thread
* Re: [PATCH] arm64: errata: Provide macro for major and minor cpu revisions
  2017-01-12 15:33 ` Will Deacon
@ 2017-01-12 18:41   ` Robert Richter
  0 siblings, 0 replies; 3+ messages in thread
From: Robert Richter @ 2017-01-12 18:41 UTC (permalink / raw)
  To: Will Deacon; +Cc: Catalin Marinas, linux-arm-kernel, linux-kernel

On 12.01.17 15:33:15, Will Deacon wrote:
> On Wed, Jan 11, 2017 at 01:11:42PM +0100, Robert Richter wrote:
> > Definition of cpu ranges are hard to read if the cpu variant is not
> > zero. Provide MIDR_CPU_FULL_REV() macro to describe the full hardware
> > revision of a cpu including variant and (minor) revision.
> > 
> > Signed-off-by: Robert Richter <rrichter@cavium.com>
> > ---
> >  arch/arm64/include/asm/cputype.h |  3 +++
> >  arch/arm64/kernel/cpu_errata.c   | 15 +++++++++------
> >  arch/arm64/kernel/cpufeature.c   |  8 +++-----
> >  3 files changed, 15 insertions(+), 11 deletions(-)
> > 
> > diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
> > index 26a68ddb11c1..983e59cbdd54 100644
> > --- a/arch/arm64/include/asm/cputype.h
> > +++ b/arch/arm64/include/asm/cputype.h
> > @@ -56,6 +56,9 @@
> >  	(0xf			<< MIDR_ARCHITECTURE_SHIFT) | \
> >  	((partnum)		<< MIDR_PARTNUM_SHIFT))
> >  
> > +#define MIDR_CPU_FULL_REV(var, rev) \
> > +	(((var)	<< MIDR_VARIANT_SHIFT) | (rev))
> 
> Minor nit, but could you rename this to MIDR_CPU_VAR_REV instead please?
> The revision field *is* the bottom 4 bits, so "full" rev doesn't really
> make a lot of sense.

Yeah, this is that I had in my first version. I wasn't sure on the
naming, so I am fine with your proposal.

Will resubmit.

Thanks,

-Robert

^ permalink raw reply	[flat|nested] 3+ messages in thread
end of thread, other threads:[~2017-01-12 18:42 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-01-11 12:11 [PATCH] arm64: errata: Provide macro for major and minor cpu revisions Robert Richter
2017-01-12 15:33 ` Will Deacon
2017-01-12 18:41   ` Robert Richter

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).